O documento discute mitos e realidades da descarga eletrostática (ESD), apresentando:
1) Mitos comuns sobre ESD e seus efeitos nos sistemas;
2) Requisitos técnicos e padrões de ESD para indústria e automotivo;
3) Parâmetros importantes de datasheets.
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Myths and Realities of ESD
Nexperia Application Seminar - 22 June 2022 - 15:00
About the seminar
Join Hueliquis Fernandes & Yoshinori Kanno as they review common myths and realities of
ESD
In this seminar you will learn:
• Common ESD myths, its importance, and effects on systems
• Technical ESD requirements and standards for industrial and automotive
• Key data sheet parameters
• Important applications and protection examples
• ESD Resources available to engineers
Every attendee will receive electronic copies of our popular ESD application
handbooks.
ESD Background
• ESD in Handling, Manufacturing, and the Field
• Device Level ESD in discrete components
• HBM / MM / CDM evaluation methods
About Hueliquis Fernandes:
Business Development manager - Alliance Rep
Huéliquis is an experienced businessperson.
In the past 25+ years he worked for
Future Electronics, Motorola/Freescale,
ST Microelectronics and Renesas.
About Yoshinori Kanno:
Field Applications Engineer - Alliance Rep
Yoshinori is graduated in Electronics Engineering
and has a MSc Degree in Digital Signal
Processing. In the past 20+ years he worked
for Philips/NXP and at Global Distributors.
Hueliquis Fernandes Yoshinori Kanno
Dwayne Mott
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Contents
Nexperia Introduction
Myths and realities of ESD
What is ESD ?
ESD Device standards and tests
HBM / CDM / MM / AECQ
ESD system level tests
IEC 61000-4-2
IEC 61000-4-5
Important datasheet parameters
Common protection topologies
Applications & Solutions
Automotive – LIN / CAN / Ethernet
Industrial / Consumer – HDMI / USB / GPIO
Resources
5. Nexperia •
Nexperia business highlights
Company Presentation 5
1
in small-signal diodes
and transistors
in ESD protection
devices
2
in Automotive
Power MOSFETs
>$2.0bn
Annual revenue
Units made annually
Global leadership positions
share
market
Global
9.0%
2
in small-signal
MOSFETs
in Logic devices
> bn
100
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Nexperia: a lifetime of “firsts”
A century of electronics history
nexperia.com
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1920s 1930s 1940s 1950s 1960s 1970s 1980s 1990s 2000s 2010s
1927 Philips acquires
Mullard and Valvo
1920 Mullard Radio Valve
Company founded
1924 RRF GmbH
(Valvo) formed in
Hamburg
1961 Signetics
founded in Silicon
Valley
1975 Philips
acquires Signetics
2006 Philips
Semiconductors
becomes NXP
2017 NXP Standard
Products becomes Nexperia
1969 Industry
standard SOT23
2002 LFPAK, the
toughest Power-
SO8
2012
Smallest
Logic “GX5”
2001 First
leadless SOD882
/ SOT883
1953 First transistor
production, the Valvo
OC71
2018
Smallest
Logic “GX4”
2019
Launch
GaN FET
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33%
33%
17%
6%
8%
2%
EMS & MultiMarket
Mobile & Wearables
Automotive
Computing
Consumer
Industrial & Power
Nexperia Protection & Filtering
Market Leader in ESD Protection
nexperia.com
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Nexperia Vs Competition
• Major Market Share Gain 2016-2019
• Leading segments Mobile & Automotive
• Continuous growth in Distribution & EMS
S…
O…
Nexperia
1
2
3
4 S…
2021 Split by Market segment Market mega trends
Miniaturization
Moore’s Law => modern IC’s
more & more vulnerable to ESD
Increasing bandwidth
Everything is connected (5G) =>
EMI worsening
Large Package offering
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Myths and Realities of ESD
Common Myths
There is no ESD in humid environments.
No need to worry about ESD outside of manufacturing environments.
A simple capacitor will eliminate ESD.
My part already has ESD protection built in. Isn’t that good enough??
ESD didn’t cause my part to immediately fail so I’m safe.
External ESD protection is expensive.
11. ESD – Electro Static Discharge
Material / environmental influences affect charge separation
Many materials have potential
to cause ESD events
10 20 30 40 50 60 70 80 90 100 Relative Humidity in %
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
U in kV
Synthetic fibres (ie carpet / car)
wool
Antistatic
fibres
e.g. offices without humidity control
(in the winter)
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Typical values for the electrostatic
voltage to which a person can be
charged when in contact with
said materials.
13. ESD – Protection
Strategies inside ICs
• Integrated circuits (ICs) are usually protected by internal
measures against ESD damage.
• This protection is usually only sufficient for
manufacturing processes!
• Devices with external interfaces (e.g., CAN, 100Base-T1,
USB, HDMI, ...) usually require additional external ESD
protection!
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15. ICs become more sensitive
Increased performance and density lower the SoC ESD robustness
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HBM kV
Years
1975 1990 2005 2020
0
0.5
1
2
4
6
Current
HBM target level
Projected
HBM target level
max
min
Source:
ESDA, 2016
Duvvy/Miller, 2009
ICs becoming more sensitive
• Gate thickness and chip size (channel length)
decreases
• Maximum gate voltage decreasing
• New Processes are optimized for area and
performance
1
1
HBM targets will be lowered
• Targets will be lowered to meet device level ESD
robustness
• Targets already lowered down
• This trend is applicable for all systems
2
2
IC robustness will decrease and require
more dedicated discrete ESD solutions
IC area ESD area to achieve 2 kV HBM
50nm
12.5nm
8nm
4.15nm
<1.5nm
Gate Oxide Thickness
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ESD – Electro Static Discharge
• ICs can be destroyed (ESD) during placement.
• ESD "on-chip protection" protects against
defects during production.
• Qualification by standards (JEDEC)
• Human Body Model (HBM)
• Machine Model (MM)
• Charged Device Model (CDM)
• ESD pulses are given to all IC pins.
Device level System level
• ESD threatens also boards and (complete)
devices.
• Special diodes are added on the board to avoid
destruction by ESD.
• "System Level" ESD standards
• IEC 61000-4-2 / IEC 61000-4-5
• ESD pulses are given to certain accessible
interfaces. Individual components are not tested!
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ESD – Device Level Testing: HBM
• HBM was developed to simulate the discharge of a human
body to a grounded device (IC).
• To replicate an RC network is used:
• R = 1500 ohms
• C = 100 pF
• ANSI / ESDA / JEDEC JS-001-2012 for Semiconductor
Components AEC–Q101-1 for automotive
• Different from standard IEC 61000-4-2 for devices
(system level test)
Human Body Model
DC High
Voltage
supply
DUT
(device
under
Test)
Rcharge
(Mega Ohms)
Rdischarge
(1.5 kOhms)
Ccharge
(100 pF)
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Low current – long duration
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ESD – Device Level Testing: CDM
• CDM emulates the process of charging / discharging that can occur in production
environments.
• For example, ICs that are poured from plastic tubes and hit a metallic surface.
• It is conceivable that charges have accumulated
on the metal pins of an IC or on the package, ultimately
discharging through a single grounded pin.
• The discharge current is limited only by parasitic
impedances and capacitance.
• AEC-Q101-005 for Automotive
Charged Device Model
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Very high current –
very short pulse duration
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ESD – System Level Testing: IEC 61000-4-2/4-5
Electrostatic discharge immunity test
Contact discharge Air discharge
Level
Test voltage
Level
Test voltage
kV kV
1 2 1 2
2 4 2 4
3 6 3 8
4 8 4 15
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IEC 61000-4-2
Waveform
IEC 61000-4-5
8/20 Waveform
Automotive goes up to 30KV
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ESD Robustness
• ESD Robustness of the device alone
• This value does not allow to draw conclusion about system level
ESD robustness
ESD Robustness / ESD Rating / ESD Tolerance
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• PESD2IVN24-T:
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ESD – Maximum Working Voltage
• PESD2IVN24-T
Reverse Working Maximum Voltage VRWM
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ESD – Leakage Current
Maximum Reverse Current IRM
PESD5V0V1BLD IP4369CX4
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ESD – Peak Pulse Current – Surge Pulses
• PESD2IVN24-T
Maximum current of a single event
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Nexperia’s ESD Protection Topologies
ESD Protection Concepts for Different Application Needs
pi-filter protection
R
I O
Rail-to-rail
protection
IO
Buffer solution
O
I
Uni- / bi-
directional diode
IO
IO
• High Cd
• Low complexity
• Good clamping
• Low Cd
• Med complexity
• Standard clamping
• High Cd ,insertion loss
• High complexity
• Improved clamping
• Low Cd
• Highest complexity
• Best clamping
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Characteristics of ESD Protections
Classical Zener (Bidirectional, Rail to Rail, Filter)
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VRWM: Reverse standoff voltage
VBR: Breakdown voltage
VCL: Clamping voltage
IRM: Maximum reverse current
IPP: Maximum surge current
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Characteristics of new ESD Protections
Newer Snap Back (Buffer)
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Vh
-Vh
VCL
-VCL
Vt
-Vt
VRWM: Reverse standoff voltage
VBR: Breakdown voltage
VCL: Clamping voltage
IRM: Maximum reverse current
IPP: Maximum surge current
Vt: Trigger voltage
Vh: Holding voltage
Reducing VCL -> Improving Protection Robustness
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Placing ESD protection right behind the
connector
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e.g. EMI Scanner: Investigation of different protection strategies on USB 3.x Board
ESD put close to incoming
Surge pulse enable
better SoC protection
(less current into SoC)
Board inductance should be behind ESD protection
for most efficient system-level protection
31. Impact of the package on RF and ESD
performance
• Nexperia high-speed packages
are optimized for RF and ESD
performance
• A low package inductance also means a high
resonance frequency to maximize the differential
pass-band.
• A low package inductance is reducing peak
clamping voltages.
• Integrated Common Mode Filter with ESD up to
10 GHz in low-inductance Wafer-Level CSP
packages offer a further peak voltage reduction
Narrow pads
to reduce
return loss
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ESD applications overview
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LIN/ UART
CAN/FD/XL
FlexRay
Ethernet
10/100/1000
BASE-T1
Ethernet
MGBASE-T1
Infotainment
USBx.y/HDMI
Video Links
GMSL,APIX,
FPDLink
SerDes Antenna/5G
Speed 20 kbit/s
2 Mbit/s
5 Mbit/s
10 Mbit/s
10 Mbit/s up to
1 Gbit/s
Up to 10
Gbit/s
480Mbit/s
1.3 Gbit/s up to
12 Gbit/s
up to 16
Gbit/s
~Mbit/s
Schematic
ESD >15 kV >15 kV >15 kV >15kV >10 kV > 10 kV > 10 kV >10kV
CD < 100 pF < 30 pF < 2 pF <0.5pF 1.5 to 0.2 pF < 0.5 pF < 0.5 pF <0.5pF
Topology Multiple Buffer Buffer Buffer Multiple Multiple Multiple Buffer
VRWM >24 V >24 V >24 V >24V
>12 V for
automotive
< 5 V behind CMC
>12 V for
automotive
< 5 V behind
CMC
>12 V for
automotive
< 5 V behind
CMC
5.5V – 30V
VBR / Vtrigger > 25 V > 25 V 100 V 100V <20V - - -
Package
SOD323
DFN1006BD-2
SOT23
SOT323
DFN1110D-3
DFN1412D-3
DFN1006BD-2
SOT23
DFN1006BD-2
DFN2510A-10
DFN2510D-10
DFN1006BD-2
SOT23
DFN2510A-10
DFN2510D-10
DFN1006BD-2
SOT23
DFN2510A-10
DFN2510D-10
DFN1006BD-2
DFN2510A-10
DFN2510D-10
DFN1006BD-2
DFN2510A-10
DFN2510D-10
DFN1006BD-2
Nexperia
Products
PESD1IVNx
PESD2IVNx
PESD2CANFDx
PESDxETH1x PESDxETH1x
PESD2USBx
PESD4USBx
PESDxVF1Bx
PESDxC1x
PCMFx
PESD2USBx
PESD4USBx
PESDxVF1Bx
PESDxC1x
PCMFx
PESD4USBx
PESDxETH1x
PESD2USBx
PESDxVF1Bx
PESDxVF1Bx
35. ESD Application Handbooks
PDF & Hardcopy
nexperia.com
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• What is ESD and it’s causes
• Failure symptoms
• Protection Methods
• Testing standards & simulation
methods
• Covering a multitude of applications
• Common interfaces
• High Speed interfaces
• Unique Version dedicated to
automotive
Application Handbooks are NOT a
product marketing reference
Link ESD
36. Service & Support
Find out more about Nexperia and our products & services
nexperia.com
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Nexperia Internet
www.nexperia.com
• Search Function
• Cross Reference
• Parametric Search
• Package Search
• Product Overview
2
1
1
2
[Path to Datasheets, Product
Brochures, Application Examples, … ]
Documentation Center
Link Selection Guide
• Overview on all our
Discrete, Logic and
MOSFET devices
− Diodes & Transistors
− Protection & Filtering
− MOSFETs
− Logic
− Packages