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International Journal of Modern Engineering Research (IJMER)
              www.ijmer.com                 Vol.2, Issue.4, July-Aug 2012 pp-1903-1907        ISSN: 2249-6645

                              Multilevel Converter for Ac–Dc Harmonic
                               Immunity in VSC Hvdc Transmission
                             1
                              Polisetty Hema Sundar, 2Aswani Kumar Eedara
                       1
                        Mtech Student Scholar Department of Electrical and Electronics Engineering,
                        SASI Inst. Of Technology and Engg. , Tadepalligudem, W.G.Dist., A.P, India.
                                    2
                                      Head of the Dept. of Electrical & Electronics Engg.,
                         SASI Inst. of Technology and Engg. Tadepalligudem,W.G.Dist., A.P, India
                                   Email:1hemasundar10@gmail.com, 2aswani@sasi.ac.in

Abstract: The concept of multilevel inverters, introduced        cost, investing in smart grid technologies has become a
about 20 years ago entails performing power conversion in        serious focus for utilities [1].
multiple voltage steps to obtain improved power quality,                   Advanced technologies, such as flexible
lower     switching       losses,   better     electromagnetic   alternating current transmission system (FACTS) and
compatibility, and higher voltage capability. The benefits       voltage-source converter (VSC)-based high-voltage dc
are especially clear for medium-voltage drives in industrial     (HVDC) power transmission systems, are essential for the
applications and are being considered for future naval ship      restructuring of the power systems into more automated,
propulsion systems. Several topologies for multilevel            electronically controlled smart grids. An overview of the
inverters have been proposed over the years; the most            recent advances of HVDC based on VSC technologies is
popular cascaded H-bridge apart from other multilevel            offered in [2]. The most important control and modeling
inverters is the capability of utilizing different dc voltages   methods of VSC-based HVDC systems and the list of
on the individual H-bridge cells which results in splitting      existing installations are also available in [2]
the power conversion amongst higher-voltage lower-
frequency and lower-voltage higher-frequency inverters.
Control methods based on selective harmonic elimination
pulse-width modulation (SHE-PWM) techniques offer the
lowest possible number of switching transitions. This
feature also results in the lowest possible level of converter
switching losses. For this reason, they are very attractive
techniques for the voltage-source-converter-(VSC) based
high-voltage dc (HVDC) power transmission systems. The                    .
paper discusses optimized modulation patterns which offer         Fig. 1. Phase of the two-level VSC for the HVDC power
controlled harmonic immunity between the ac and dc side.                           transmission system[7].
The application focuses on the conventional two-level
converter when its dc-link voltage contains a mix of low-
frequency harmonic components. Simulation and
experimental results are presented to confirm the validity of
the proposed switching patterns. Finally a five level
Multilevel converter topology is applied for this application

Keywords-Amplitude modulation (AM), dc-ac power
conversion, harmonic control, HVDC, insulated-gate
bipolar transistor (IGBT), power electronics, power                               Fig. 2. Three-phase two-level VSC.
transmission system, pulse-width modulation, voltage-
source converter (VSC).                                                     The first generation of utility power converters is
                                                                 based on current-source converter (CSC) topologies [3], [4].
                                                                 Today, many projects still use CSCs due to their ultra-high
                 I.    INTRODUCTION                              power capabilities. With the invention of fully controlled
          The continuous growth of electricity demand and        power semiconductors, such as insulated-gate bipolar
ever increasing society awareness of climate change issues       transistors (IGBTs) and integrated gate-commutated
directly affect the development of the electricity grid          thyristors (IGCTs) [5], the VSC topologies are more
infrastructure. The utility industry faces continuous pressure   attractive due to their four-quadrant power-flow
to transform the way the electricity grid is managed and         characteristics [6]. A typical configuration of the VSC-
operated. On one hand, the diversity of supply aims to           based HVDC power transmission system is shown in Fig. 1
increase the energy mix and accommodate more and                 as it is shown in [7] and [8].
various sustainable energy sources. On the other hand, there                With the advancement of power electronics and
is a clear need to improve the efficiency, reliability, energy   emergence of new multilevel converter topologies, it is
security, and quality of supply.With the breadth of benefits     possible to work at voltage levels beyond the classic
that the smart grid can deliver, the improvements in             semiconductor limits. The multilevel converters achieve
technology capabilities, and the reduction in technology         high-voltage switching by means of a series of voltage
                                                                 steps, each of which lies within the ratings of the individual
                                                     www.ijmer.com                                             1903 | P a g e
International Journal of Modern Engineering Research (IJMER)
               www.ijmer.com               Vol.2, Issue.4, July-Aug 2012 pp-1903-1907               ISSN: 2249-6645
power devices. Among the multilevel Converters [1-4], the         the auxiliary controller is implemented in the negative-
cascaded H-bridge topology (CHB) is particularly attractive       sequence d-q frame.
in high-voltage applications, because it requires the least                  The objective of this paper is to discuss the
number of components to synthesize the same number of             effectiveness of optimized modulation based on
voltage levels.                                                   precalculated SHE-PWM in a two-level three-phase VSC to
         Additionally, due to its modular structure, the          make the ac side immune from the fluctuations of the dc
hardware implementation is rather simple and the                  link without the use of passive components. However, since
maintenance operation is easier than alternative multilevel       the VSC studied here does not include a closed-loop
converters. The multilevel voltage source inverter is             controller, strategies to compensate unbalances are not
recently applied in many industrial applications such as ac       addressed in this paper.
power supplies, static VAR compensators, drive systems,                      This paper is organized in the following way. In
etc. One of the significant advantages of multilevel              Section II, a brief analysis of the VSC and the modulation
configuration is the harmonic reduction in the output             method is provided. Section III contains the characteristics
waveform without increasing switching frequency or                of the method on a VSC with dc-side ripple voltage. Section
decreasing the inverter power output [5-11]. The output           IV provides extensive experimental results to support the
voltage waveform of a multilevel inverter is composed of          theoretical arguments. Conclusions are documented in
the number of levels of voltages, typically obtained from         Section V.
capacitor voltage sources. The so-called multilevel starts
from three levels. As the number of levels reach infinity, the    II.     Analysis Of The Pwm Converter And She-Pwm
output THD approaches zero. The number of the achievable                     The optimized SHE-PWM technique is
voltage levels, however, is limited by voltage unbalance          investigated on a two level three-phase VSC topology with
problems voltage clamping requirement, circuit layout, and        IGBT technology, shown in Fig. 2. A typical periodic two-
packaging constraints.                                            level SHE-PWM waveform is shown in Fig. 3.
         On the other hand, optimized modulation methods              The waveforms of the line-to-neutral voltages can be
offer many advantages toward tight control of converter-          expressed as follows:
generated harmonics [19]. A minimization method to find
the complete set of solutions by solving the SHE-PWM
equations for two-level inverters is discussed in [20]. In this
paper, the dc-link voltage is assumed to be constant. In [10],
a method is proposed to prevent the dc-link ripple voltage
from creating low-order harmonics on the ac side of fixed
and variable frequency inverters. However, only one of the                                                          (1)
multiple SHE-PWM sets [20] of solutions is reported.              When         is the operating frequency of the ac, and
         An investigation of the harmonic interaction
between the ac and dc side for STATCOM is presented in                  is the dc-link voltage.
[21] including the so-called dynamic SHE-PWM scheme
based on precalculated angles for better THD. However, the
dynamic SHE-PWM scheme is applied only for a three-
level converter and can be applied only for known
magnitude and frequency of the ripple. Another method for           Fig. 3. Typical two-level PWM switching waveform with
improving the harmonic performance of a two-level VSC                               five angles perquarter cycle.
with SHE-PWM is studied in [22]. However, only one set
of SHE-PWM solutions is considered for the method of
[22] which requires the exact values of magnitude, phase,
and frequency of the ripple in order to be implemented.
         Control strategies to compensate unbalances are
reported in the literature. Mild imbalances caused by
unbalanced loads of the ac side are regulated by using
separate control loops for the positive- and negative-
sequence components of the voltage as proposed in [23].
Efficient control of unbalanced compensator currents can be
achieved by a control algorithm based on the D-STATCOM
model [24]. D-STATCOM allows separate control of
positive- and negative-sequence currents and decoupled
current control of the d-q frame. An advanced strategy
based on direct power control under unbalanced grid
voltage conditions has been recently presented for a doubly
fed induction generator [25]. To take the full advantages of
VSCs for HVDC power transmission systems, an auxiliary
controller is added to the main controller which is
conventionally implemented in the positive-sequence d-q             Fig. 4. Solution trajectories. (a) Per-unit modulation index
frame [26]. To compensate for unbalanced ac-side loads,             over a complete periodic cycle. (b) Five angles in radians.


                                                     www.ijmer.com                                               1904 | P a g e
International Journal of Modern Engineering Research (IJMER)
              www.ijmer.com               Vol.2, Issue.4, July-Aug 2012 pp-1903-1907        ISSN: 2249-6645

Thus, the line-to-line voltages are given by                      III.   Cascaded H-Bridge Multilevel Converter
                                                                2.1 Full H-Bridge


                                                                                  S1
                                                                                                                 S3
                                                (2)
                                                                                                       Vout
The SHE-PWM method offers numerical solutions which                    Vdc
are calculated through the Fourier series expansion [20] of
the waveform                                                                      S4
                                                                                                                 S2



                                                                                       Figure. 6 Full H-Bridge

                                                                             Switches Turn ON                     Voltage Level
   Where N+1 are the angles that need to be found.                           S1,S2                                Vdc
         Using five switching angles per quarter-wave in                     S3,S4                                -Vdc
(N=4)SHE-PWM, k= 5, 7, 11, 13 to eliminate the 5th, 7th,                     S4,D2                                0
11th,and 13th harmonics. During the case of a balanced
load, the third and all other harmonics that are multiples of                   Table 1. Switching table for H-Bridge
three are cancelled, due to the 120 symmetry of the
switching function of the three-phase converter. The even                Fig.6 shows the Full H-Bridge Configuration. By
harmonics are cancelled due to the half-wave quarter-wave       using single H-Bridge we can get 3 voltage levels. The
symmetry of the angles, being constrained by                    number output voltage levels of cascaded Full H-Bridge are
                                                                given by 2n+1 and voltage step of each level is given by
                                                                Vdc/n. Where n is number of H-bridges connected in
                                                                cascaded. The switching table is given in Table 1 and 2.




                               ZS
Fig. 5. Simulation results for SHE-PWM eliminating 5th,
7th, 11th, and 13th harmonics. (a) DC-link voltage. (b)
Solution trajectories to eliminate harmonics and intersection             Table 2. Switching table for Cascaded H-Bridge
points with the modulating signal (M=0.75). (c) Line-to-
neutral voltage. (d) Line-to-line voltage. (e) and (f)                     Switches Turn On                 Voltage Level
Positive- and negative-sequence line-to-line voltage spectra,
respectively.                                                                S1, S2                                   Vdc
                                                                             S1,S2,S5,S6                              2Vdc
                                                                             S4,D2,S8,D6                              0
                                                                             S3,S4                                    -Vdc
                                                                             S3,S4,S7,S8                              -2Vdc



                                                      www.ijmer.com                                                   1905 | P a g e
International Journal of Modern Engineering Research (IJMER)
              www.ijmer.com                  Vol.2, Issue.4, July-Aug 2012 pp-1903-1907        ISSN: 2249-6645


        IV.       SIMULATION RESULTS

4.1 Modeling of Cascaded H-Bridge Multilevel Converter
         Fig.7 shows the Matlab/Simulink Model of five
level Cascaded H-Bridge multilevel converter. Each H-
bridge DC voltage is 50 V. In order to generate three phase
output such legs are connected in star/delta. Each llege
gating pulses are displaced by 120 degrees.


                                                                                        Figure. 10 Nine Level Line Voltage

                                                                        Fig.10 shows the Level shifted Carrier PWM wave form.
                                                                        Here four carriers each are level shifted by 0.5 in positive
                                                                        and negative side are compared with sine wave.




           Figure. 7 Matlab/SImulink Model of CHB




                                                                                 Figure. 11 Carrier Signals of Level Shifted PWM

                                                                        Fig.11 shows the phase voltage of level shifted carrier
                                                                        PWM CHB inverter. Fig.12&13 shows the phase and line
                                                                        voltage of level shifted carrier PWM CHB inverter. Here
                                                                        phase voltage has five voltage levels where as line voltage
                                                                        has nine voltage levels.



      Figure. 8 Carrier Signals of Phase Shifted Carrier PWM

Fig.8 shows the Phase shifted Carrier PWM wave form.
Here four carriers each are phase shifted by 90 degrees are
compared with sine wave.




                                                                                        Figure. 12 Five Level Phase Voltage




                   Figure. 9 Five Level output

Fig.9 shows the phase voltage of phase shifted carrier PWM
CHB inverter. Fig.10 shows the line voltage of phase
shifted carrier PWM CHB inverter. Here phase voltage has
five voltage levels where as line voltage has nine voltage
levels.
                                                                                        Figure. 13 Nine Level Line Voltage



                                                               www.ijmer.com                                                  1906 | P a g e
International Journal of Modern Engineering Research (IJMER)
                www.ijmer.com                 Vol.2, Issue.4, July-Aug 2012 pp-1903-1907        ISSN: 2249-6645
                  V.      CONCLUSIONS                                   [17] M. N. Anwar and M. Teimor, ―An analytical method for
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converter. The proposed converter produces more voltage                      Proc. 37th IAS Annu.Meeting IEEE Industry Applications
                                                                             Conf., Dearborn, MI, Oct. 2002, vol. 2, pp. 803–810.
levels with less number of switches compared to H- bridge               [18] F. D. Kieferndorf, M. Forster, and T. A. Lipo, ―Reduction of
configuration. This will reduce number of gate drivers and                   dc-bus capacitor ripple current with PAM/PWM converter,‖
protection circuits which in turn reduces the cost and                       IEEE Trans. Ind. Appl., vol. 40, no. 2, pp. 607–614, Mar.
complexity of the circuit. Finally a five level single H-                    2004.
bridge is proposed. A SIMULINK based model is                           [19] P. N. Enjeti, P. D. Ziogas, and J. F. Lindsay, ―Programmed
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                                                                             evaluation,‖ IEEE Trans. Ind.Appl., vol. 26, no. 2, pp. 302–
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[5]    P. Steimer, O. Apeldoorn, E. Carroll, and A. Nagel, ―IGCT        [23] C. Hochgraf and R. H. Lasseter, ―Statcom controls for
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       Conf., Seattle, WA, Jun. 1993, pp. 408–415.                                         P. HEMA SUNDAR, pursuing M.Tech
[7]    J. Arrillaga, Y. H. Liu, and N. RWatson, Flexible Power                             in SASI institute of Technology and
       Transmission: The HVDC options. Hoboken, NJ: Wiley,                                 Engineering with the specialization
       2007.                                                                               Power Electronics. I completed my
[8]    G. Asplund, ―Application of HVDC light to power system                              under graduation in the stream of
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[9]    P. N. Enjeti, P. D. Ziogas, and M. Ehsani,
                                                                        Engineering, Tadepalligudem, Andhra Pradesh. My areas of
       ―UnbalancedPWMconverter analysis and corrective
       measures,‖ in Proc. IEEE Industry Applications Soc. Annu.        intrest are Power Electronic drive systems, Harmonic
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[10]   P. N. Enjeti and W. Shireen, ―A new technique to reject dc-
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       Electron., vol. 7, no. 1, pp. 171–180, Jan. 1992.                                    the B.Tech. degree in Electrical and
[11]   J. Y. Lee and Y. Y. Sun, ―Adaptive harmonic control in                               Electronics Engineering from the JNTU
       PWM inverters with fluctuating input voltage,‖ IEEE Trans.                           college of Engineering Hyderabad,
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                                                                                            India in 2005 and the M.E. degree in
[12]   S. Funabiki and Y. Sawada, ―Computative decision of pulse
       width in three-phase PWM inverter,‖ in Proc. IEEE Industry                           Power Systems from the University
       Applications Soc. Annu. Meet., Pittsburgh, PA, Oct. 1988,        College of Engineering Osmania university Hyderabad in
       pp. 694–699.                                                     2008.He worked as Project Trainee at GE-consumer and
[13]   T. Kato, ―Precise PWM waveform analysis of inverter for          Industrial Hyderabad for one year. He has been on the
       selected harmonic elimination,‖ in Proc. IEEE Industry           faculty of SASI Institute of Technology and Engineering at
       Appl. Soc. Annu. Meeting, Piscataway, NJ, Sep. 1986, vol. 1,     Tadepalligudem as an Assistant Professor in Department of
       pp. 611–616.                                                     Electrical and Electronics Engineering Since 2008.He has
[14]   B. P. McGrath and D. G. Holmes, ―A general analytical            been working as Head of the Department of E.E.E. since
       method for calculating inverter dc-link current harmonics,‖
       in Proc. IEEE Ind. Appl. Soc. Annu. Meeting, Edmonton,
                                                                        MAY 2012. He is member of IAENG .He has one
       AB, Canada, Oct. 2008, pp. 1–8.                                  international journal publication. He is presently doing his
[15]   A. M. Cross, P. D. Evans, and A. J. Forsyth, ―DC link            research in the area of Power Electronics applications in
       current in PWM inverters with unbalanced and nonlinear           Power systems at JNTUK.His areas of interest are FACTS
       loads,‖ Proc. Inst. Elect. Eng., Elect. Power Appl., vol. 146,   Controllers, Evolutionary algorithms, Modeling and
       no. 6, pp. 620–626, Nov. 1999.                                   simulation of Power Electronics and Power Systems.
[16]   M. H. Bierhoff and F. W. Fuchs, ―DC-link harmonics of
       three-phase voltage-source converters influenced by the
       pulsewidth-modulation strategy—An analysis,‖ IEEE Trans.
       Ind. Electron., vol. 55, no. 5, pp. 2085–2092, May 2008.
                                                            www.ijmer.com                                                1907 | P a g e

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Ap2419031907

  • 1. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.2, Issue.4, July-Aug 2012 pp-1903-1907 ISSN: 2249-6645 Multilevel Converter for Ac–Dc Harmonic Immunity in VSC Hvdc Transmission 1 Polisetty Hema Sundar, 2Aswani Kumar Eedara 1 Mtech Student Scholar Department of Electrical and Electronics Engineering, SASI Inst. Of Technology and Engg. , Tadepalligudem, W.G.Dist., A.P, India. 2 Head of the Dept. of Electrical & Electronics Engg., SASI Inst. of Technology and Engg. Tadepalligudem,W.G.Dist., A.P, India Email:1hemasundar10@gmail.com, 2aswani@sasi.ac.in Abstract: The concept of multilevel inverters, introduced cost, investing in smart grid technologies has become a about 20 years ago entails performing power conversion in serious focus for utilities [1]. multiple voltage steps to obtain improved power quality, Advanced technologies, such as flexible lower switching losses, better electromagnetic alternating current transmission system (FACTS) and compatibility, and higher voltage capability. The benefits voltage-source converter (VSC)-based high-voltage dc are especially clear for medium-voltage drives in industrial (HVDC) power transmission systems, are essential for the applications and are being considered for future naval ship restructuring of the power systems into more automated, propulsion systems. Several topologies for multilevel electronically controlled smart grids. An overview of the inverters have been proposed over the years; the most recent advances of HVDC based on VSC technologies is popular cascaded H-bridge apart from other multilevel offered in [2]. The most important control and modeling inverters is the capability of utilizing different dc voltages methods of VSC-based HVDC systems and the list of on the individual H-bridge cells which results in splitting existing installations are also available in [2] the power conversion amongst higher-voltage lower- frequency and lower-voltage higher-frequency inverters. Control methods based on selective harmonic elimination pulse-width modulation (SHE-PWM) techniques offer the lowest possible number of switching transitions. This feature also results in the lowest possible level of converter switching losses. For this reason, they are very attractive techniques for the voltage-source-converter-(VSC) based high-voltage dc (HVDC) power transmission systems. The . paper discusses optimized modulation patterns which offer Fig. 1. Phase of the two-level VSC for the HVDC power controlled harmonic immunity between the ac and dc side. transmission system[7]. The application focuses on the conventional two-level converter when its dc-link voltage contains a mix of low- frequency harmonic components. Simulation and experimental results are presented to confirm the validity of the proposed switching patterns. Finally a five level Multilevel converter topology is applied for this application Keywords-Amplitude modulation (AM), dc-ac power conversion, harmonic control, HVDC, insulated-gate bipolar transistor (IGBT), power electronics, power Fig. 2. Three-phase two-level VSC. transmission system, pulse-width modulation, voltage- source converter (VSC). The first generation of utility power converters is based on current-source converter (CSC) topologies [3], [4]. Today, many projects still use CSCs due to their ultra-high I. INTRODUCTION power capabilities. With the invention of fully controlled The continuous growth of electricity demand and power semiconductors, such as insulated-gate bipolar ever increasing society awareness of climate change issues transistors (IGBTs) and integrated gate-commutated directly affect the development of the electricity grid thyristors (IGCTs) [5], the VSC topologies are more infrastructure. The utility industry faces continuous pressure attractive due to their four-quadrant power-flow to transform the way the electricity grid is managed and characteristics [6]. A typical configuration of the VSC- operated. On one hand, the diversity of supply aims to based HVDC power transmission system is shown in Fig. 1 increase the energy mix and accommodate more and as it is shown in [7] and [8]. various sustainable energy sources. On the other hand, there With the advancement of power electronics and is a clear need to improve the efficiency, reliability, energy emergence of new multilevel converter topologies, it is security, and quality of supply.With the breadth of benefits possible to work at voltage levels beyond the classic that the smart grid can deliver, the improvements in semiconductor limits. The multilevel converters achieve technology capabilities, and the reduction in technology high-voltage switching by means of a series of voltage steps, each of which lies within the ratings of the individual www.ijmer.com 1903 | P a g e
  • 2. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.2, Issue.4, July-Aug 2012 pp-1903-1907 ISSN: 2249-6645 power devices. Among the multilevel Converters [1-4], the the auxiliary controller is implemented in the negative- cascaded H-bridge topology (CHB) is particularly attractive sequence d-q frame. in high-voltage applications, because it requires the least The objective of this paper is to discuss the number of components to synthesize the same number of effectiveness of optimized modulation based on voltage levels. precalculated SHE-PWM in a two-level three-phase VSC to Additionally, due to its modular structure, the make the ac side immune from the fluctuations of the dc hardware implementation is rather simple and the link without the use of passive components. However, since maintenance operation is easier than alternative multilevel the VSC studied here does not include a closed-loop converters. The multilevel voltage source inverter is controller, strategies to compensate unbalances are not recently applied in many industrial applications such as ac addressed in this paper. power supplies, static VAR compensators, drive systems, This paper is organized in the following way. In etc. One of the significant advantages of multilevel Section II, a brief analysis of the VSC and the modulation configuration is the harmonic reduction in the output method is provided. Section III contains the characteristics waveform without increasing switching frequency or of the method on a VSC with dc-side ripple voltage. Section decreasing the inverter power output [5-11]. The output IV provides extensive experimental results to support the voltage waveform of a multilevel inverter is composed of theoretical arguments. Conclusions are documented in the number of levels of voltages, typically obtained from Section V. capacitor voltage sources. The so-called multilevel starts from three levels. As the number of levels reach infinity, the II. Analysis Of The Pwm Converter And She-Pwm output THD approaches zero. The number of the achievable The optimized SHE-PWM technique is voltage levels, however, is limited by voltage unbalance investigated on a two level three-phase VSC topology with problems voltage clamping requirement, circuit layout, and IGBT technology, shown in Fig. 2. A typical periodic two- packaging constraints. level SHE-PWM waveform is shown in Fig. 3. On the other hand, optimized modulation methods The waveforms of the line-to-neutral voltages can be offer many advantages toward tight control of converter- expressed as follows: generated harmonics [19]. A minimization method to find the complete set of solutions by solving the SHE-PWM equations for two-level inverters is discussed in [20]. In this paper, the dc-link voltage is assumed to be constant. In [10], a method is proposed to prevent the dc-link ripple voltage from creating low-order harmonics on the ac side of fixed and variable frequency inverters. However, only one of the (1) multiple SHE-PWM sets [20] of solutions is reported. When is the operating frequency of the ac, and An investigation of the harmonic interaction between the ac and dc side for STATCOM is presented in is the dc-link voltage. [21] including the so-called dynamic SHE-PWM scheme based on precalculated angles for better THD. However, the dynamic SHE-PWM scheme is applied only for a three- level converter and can be applied only for known magnitude and frequency of the ripple. Another method for Fig. 3. Typical two-level PWM switching waveform with improving the harmonic performance of a two-level VSC five angles perquarter cycle. with SHE-PWM is studied in [22]. However, only one set of SHE-PWM solutions is considered for the method of [22] which requires the exact values of magnitude, phase, and frequency of the ripple in order to be implemented. Control strategies to compensate unbalances are reported in the literature. Mild imbalances caused by unbalanced loads of the ac side are regulated by using separate control loops for the positive- and negative- sequence components of the voltage as proposed in [23]. Efficient control of unbalanced compensator currents can be achieved by a control algorithm based on the D-STATCOM model [24]. D-STATCOM allows separate control of positive- and negative-sequence currents and decoupled current control of the d-q frame. An advanced strategy based on direct power control under unbalanced grid voltage conditions has been recently presented for a doubly fed induction generator [25]. To take the full advantages of VSCs for HVDC power transmission systems, an auxiliary controller is added to the main controller which is conventionally implemented in the positive-sequence d-q Fig. 4. Solution trajectories. (a) Per-unit modulation index frame [26]. To compensate for unbalanced ac-side loads, over a complete periodic cycle. (b) Five angles in radians. www.ijmer.com 1904 | P a g e
  • 3. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.2, Issue.4, July-Aug 2012 pp-1903-1907 ISSN: 2249-6645 Thus, the line-to-line voltages are given by III. Cascaded H-Bridge Multilevel Converter 2.1 Full H-Bridge S1 S3 (2) Vout The SHE-PWM method offers numerical solutions which Vdc are calculated through the Fourier series expansion [20] of the waveform S4 S2 Figure. 6 Full H-Bridge Switches Turn ON Voltage Level Where N+1 are the angles that need to be found. S1,S2 Vdc Using five switching angles per quarter-wave in S3,S4 -Vdc (N=4)SHE-PWM, k= 5, 7, 11, 13 to eliminate the 5th, 7th, S4,D2 0 11th,and 13th harmonics. During the case of a balanced load, the third and all other harmonics that are multiples of Table 1. Switching table for H-Bridge three are cancelled, due to the 120 symmetry of the switching function of the three-phase converter. The even Fig.6 shows the Full H-Bridge Configuration. By harmonics are cancelled due to the half-wave quarter-wave using single H-Bridge we can get 3 voltage levels. The symmetry of the angles, being constrained by number output voltage levels of cascaded Full H-Bridge are given by 2n+1 and voltage step of each level is given by Vdc/n. Where n is number of H-bridges connected in cascaded. The switching table is given in Table 1 and 2. ZS Fig. 5. Simulation results for SHE-PWM eliminating 5th, 7th, 11th, and 13th harmonics. (a) DC-link voltage. (b) Solution trajectories to eliminate harmonics and intersection Table 2. Switching table for Cascaded H-Bridge points with the modulating signal (M=0.75). (c) Line-to- neutral voltage. (d) Line-to-line voltage. (e) and (f) Switches Turn On Voltage Level Positive- and negative-sequence line-to-line voltage spectra, respectively. S1, S2 Vdc S1,S2,S5,S6 2Vdc S4,D2,S8,D6 0 S3,S4 -Vdc S3,S4,S7,S8 -2Vdc www.ijmer.com 1905 | P a g e
  • 4. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.2, Issue.4, July-Aug 2012 pp-1903-1907 ISSN: 2249-6645 IV. SIMULATION RESULTS 4.1 Modeling of Cascaded H-Bridge Multilevel Converter Fig.7 shows the Matlab/Simulink Model of five level Cascaded H-Bridge multilevel converter. Each H- bridge DC voltage is 50 V. In order to generate three phase output such legs are connected in star/delta. Each llege gating pulses are displaced by 120 degrees. Figure. 10 Nine Level Line Voltage Fig.10 shows the Level shifted Carrier PWM wave form. Here four carriers each are level shifted by 0.5 in positive and negative side are compared with sine wave. Figure. 7 Matlab/SImulink Model of CHB Figure. 11 Carrier Signals of Level Shifted PWM Fig.11 shows the phase voltage of level shifted carrier PWM CHB inverter. Fig.12&13 shows the phase and line voltage of level shifted carrier PWM CHB inverter. Here phase voltage has five voltage levels where as line voltage has nine voltage levels. Figure. 8 Carrier Signals of Phase Shifted Carrier PWM Fig.8 shows the Phase shifted Carrier PWM wave form. Here four carriers each are phase shifted by 90 degrees are compared with sine wave. Figure. 12 Five Level Phase Voltage Figure. 9 Five Level output Fig.9 shows the phase voltage of phase shifted carrier PWM CHB inverter. Fig.10 shows the line voltage of phase shifted carrier PWM CHB inverter. Here phase voltage has five voltage levels where as line voltage has nine voltage levels. Figure. 13 Nine Level Line Voltage www.ijmer.com 1906 | P a g e
  • 5. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.2, Issue.4, July-Aug 2012 pp-1903-1907 ISSN: 2249-6645 V. CONCLUSIONS [17] M. N. Anwar and M. Teimor, ―An analytical method for This paper presents Novel Hybrid H-Bridge multilevel selecting dc-link-capacitor of a voltage stiff inverter,‖ in converter. The proposed converter produces more voltage Proc. 37th IAS Annu.Meeting IEEE Industry Applications Conf., Dearborn, MI, Oct. 2002, vol. 2, pp. 803–810. levels with less number of switches compared to H- bridge [18] F. D. Kieferndorf, M. Forster, and T. A. Lipo, ―Reduction of configuration. This will reduce number of gate drivers and dc-bus capacitor ripple current with PAM/PWM converter,‖ protection circuits which in turn reduces the cost and IEEE Trans. Ind. Appl., vol. 40, no. 2, pp. 607–614, Mar. complexity of the circuit. Finally a five level single H- 2004. bridge is proposed. A SIMULINK based model is [19] P. N. Enjeti, P. D. Ziogas, and J. F. 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My areas of ―UnbalancedPWMconverter analysis and corrective measures,‖ in Proc. IEEE Industry Applications Soc. Annu. intrest are Power Electronic drive systems, Harmonic Meet., San Diego, CA, Oct. 1989, pp. 861–870. studies in power systems. [10] P. N. Enjeti and W. Shireen, ―A new technique to reject dc- link voltage ripple for inverters operating on programmedPWM waveforms,‖ IEEE Trans. Power ASWANI KUMAR EEDARA received Electron., vol. 7, no. 1, pp. 171–180, Jan. 1992. the B.Tech. degree in Electrical and [11] J. Y. Lee and Y. Y. Sun, ―Adaptive harmonic control in Electronics Engineering from the JNTU PWM inverters with fluctuating input voltage,‖ IEEE Trans. college of Engineering Hyderabad, Ind. Electron., vol. IE-33, no. 1, pp. 92–98, Feb. 1986. India in 2005 and the M.E. degree in [12] S. Funabiki and Y. Sawada, ―Computative decision of pulse width in three-phase PWM inverter,‖ in Proc. IEEE Industry Power Systems from the University Applications Soc. Annu. Meet., Pittsburgh, PA, Oct. 1988, College of Engineering Osmania university Hyderabad in pp. 694–699. 2008.He worked as Project Trainee at GE-consumer and [13] T. Kato, ―Precise PWM waveform analysis of inverter for Industrial Hyderabad for one year. He has been on the selected harmonic elimination,‖ in Proc. IEEE Industry faculty of SASI Institute of Technology and Engineering at Appl. Soc. Annu. Meeting, Piscataway, NJ, Sep. 1986, vol. 1, Tadepalligudem as an Assistant Professor in Department of pp. 611–616. Electrical and Electronics Engineering Since 2008.He has [14] B. P. McGrath and D. G. Holmes, ―A general analytical been working as Head of the Department of E.E.E. since method for calculating inverter dc-link current harmonics,‖ in Proc. IEEE Ind. Appl. Soc. Annu. Meeting, Edmonton, MAY 2012. He is member of IAENG .He has one AB, Canada, Oct. 2008, pp. 1–8. international journal publication. He is presently doing his [15] A. M. Cross, P. D. Evans, and A. J. Forsyth, ―DC link research in the area of Power Electronics applications in current in PWM inverters with unbalanced and nonlinear Power systems at JNTUK.His areas of interest are FACTS loads,‖ Proc. Inst. Elect. Eng., Elect. Power Appl., vol. 146, Controllers, Evolutionary algorithms, Modeling and no. 6, pp. 620–626, Nov. 1999. simulation of Power Electronics and Power Systems. [16] M. H. Bierhoff and F. W. Fuchs, ―DC-link harmonics of three-phase voltage-source converters influenced by the pulsewidth-modulation strategy—An analysis,‖ IEEE Trans. Ind. Electron., vol. 55, no. 5, pp. 2085–2092, May 2008. www.ijmer.com 1907 | P a g e