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POLITECNICO DI MILANO



  Task Scheduling Techniques on
Dynamically Reconfigurable Systems
       Reconfigurable Computing Italian Meeting
                    19 December 2008
        Room S01, Politecnico di Milano - Milan (Italy)


          Roberto Cordone: cordone@dti.unimi.it
         Francesco Redaelli: fredalli@elet.polimi.it
Outline

    Aims

    ILP model
    Heuristic solution
    Experimental Results

    Concluding Remarks




2
Aims

    (A1) Definition of a formal model for
    the scheduling problem in a partially
    dynamically reconfigurable scenario

    (A2) Development of a heuristic
    method to solve in reasonable time
    the proposed scheduling problem

    (A3) Validation of the proposed ILP
    model and heuristic scheduler



3
An ILP model for placement and scheduling

    It derives from the general model by a heuristic definition of
        partitioning and mapping
    1. choose a specific partition xs and build the TDG:
        •   each node i is a task
        •   each arc (i,j) a precedence induced by one or more
            precedences between the operations in i and those in j
    2. choose a specific mode mi for each task i:
       size, reconfiguration and latency depend on I


    3. each RU is a column of a FPGA (U = {1,…,|U|}),
       the device is homogeneous and γu is uniform:
       a task can be implemented anywhere, given enough RUs
    4. Additional (technological) constraint:
       limited number of simultaneous reconfigurations
4
The decision variables



    pihk = 1 if task i is present on the device at time h
    starting from column k; pihk = 0 otherwise
    rih = 1 if the reconfiguration of task i starts at time h ;
    rih = 0 otherwise
    mi = 1 if task i exploits module reuse (no reconfiguration);
    mi = 0 otherwise
    τi is the start time of task i (reconfiguration if no module reuse,
    execution otherwise)
    ti is the execution start time of task i



5
The placement and scheduling model (1)

     Minimize the completion time


    Subject to

         Different tasks do not overlap



         A task has a single leftmost RU




         A task cannot be placed too far on the right



6
The placement and scheduling model (2)
    A task either exploits module reuse or it is reconfigured



    If there is no module reuse, the task starts with the
    reconfiguration




    If there is module reuse, the task is directly executed




    If no module reuse occurs, the execution start follows the task
    start at least by the reconfiguration time



7
The placement and scheduling model (3)

    A task is removed at the end of its execution



    A task occupies the device continuously from the start to the
    execution end




    All precedences are respected



    The number of simultaneous reconfigurations is limited



8
The placement and scheduling model (4)

    Let aij = 1 if tasks i and j are mapped onto the same mode;
       aij = 0 otherwise
       If a task exploits module reuse, its execution is preceded by the
       execution of a compatible task using the same RUs




       If a task exploits module reuse and its execution is preceded by
       an incompatible task on overlapping RUs, a compatible task must
       be executed between them using the same RUs as the first one




       for

9
Napoleon
                 Reconfiguration-Aware Scheduler 1 of 2
     Napoleon: heuristic reconfiguration-aware scheduler, list-based
     with priority function the ALAP value of a node. It allows out of
     order scheduling for particular task graphs.


     It tries to exploits at best
        • Configuration prefetching
        • Module reuse


     It also uses anti-fragmentation techniques to improve the quality
     of the solution


     It tries to build a solution taking into account the constraints
     found in the ILP formulation of the problem
10
Napoleon
               Reconfiguration-Aware Scheduler 2 of 2

     Anti-Fraqmentation Techniques:

                                             limited deconfiguration
         farthest placement




                        Ti: execution of task i
                        Ri: configuration of task i
11
Experimental Results
      GLPK [http://gnuwin32.sourceforge.net/packages/glpk.htm]
      has been used to solve the ILP instances
      Benchmark

         Ten task graphs with ten nodes [BBD06a]

         9135 task graphs with a number of nodes in a 10-1000 range



                                                       ASAPLIU
                     ASAPB           ASAPS
      ASAP
                                                       ALAPLIU
                     ALAPB           ALAPS
      ALAP
                                                       DyASAPLIU
                     DyASAPB         DyASAPS
      DyASAP

     They have been chosen as the most representative for
     the solution of our problem in the literature

12
Results 1 of 3




     [BBD06a] S. Banerjee, E. Bozorgzadeh, N. D. Dutt
     “Integrating physical constraints in HW-SW Partitioning for
     Architectures with partial dynamic reconfiguration”, IEEE
     Transactions on very large scale integration system, vol.
     14, no. 11, november 2006
13
Results 3 of 3




     9135 task graphs with a number of nodes in a 10-1000 range




14
Conclusions and Future Works
     Conclusions:
        ILP model formulation for the scheduling problem in a partially
        dynamically reconfigurable scenario --> (A1)
        Napoleon heuristic method based on the ILP formulation --> (A2)
        Napoleon obtains schedule length (in average) 18.6% better than
        the other algorithms --> (A3)

     Future works
        Integrate Napoleon into a general framework, to create a
        scheduling/reconfiguration-aware partitioning
        Integrate Napoleon in DRESD-HLR to complete the design flow to
        implement large applications onto partially dynamically
        reconfigurable devices
        Try new anti-fragmentation techniques


15
Questions




16

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RCIM 2008 - Modello Scheduling

  • 1. POLITECNICO DI MILANO Task Scheduling Techniques on Dynamically Reconfigurable Systems Reconfigurable Computing Italian Meeting 19 December 2008 Room S01, Politecnico di Milano - Milan (Italy) Roberto Cordone: cordone@dti.unimi.it Francesco Redaelli: fredalli@elet.polimi.it
  • 2. Outline Aims ILP model Heuristic solution Experimental Results Concluding Remarks 2
  • 3. Aims (A1) Definition of a formal model for the scheduling problem in a partially dynamically reconfigurable scenario (A2) Development of a heuristic method to solve in reasonable time the proposed scheduling problem (A3) Validation of the proposed ILP model and heuristic scheduler 3
  • 4. An ILP model for placement and scheduling It derives from the general model by a heuristic definition of partitioning and mapping 1. choose a specific partition xs and build the TDG: • each node i is a task • each arc (i,j) a precedence induced by one or more precedences between the operations in i and those in j 2. choose a specific mode mi for each task i: size, reconfiguration and latency depend on I 3. each RU is a column of a FPGA (U = {1,…,|U|}), the device is homogeneous and γu is uniform: a task can be implemented anywhere, given enough RUs 4. Additional (technological) constraint: limited number of simultaneous reconfigurations 4
  • 5. The decision variables pihk = 1 if task i is present on the device at time h starting from column k; pihk = 0 otherwise rih = 1 if the reconfiguration of task i starts at time h ; rih = 0 otherwise mi = 1 if task i exploits module reuse (no reconfiguration); mi = 0 otherwise τi is the start time of task i (reconfiguration if no module reuse, execution otherwise) ti is the execution start time of task i 5
  • 6. The placement and scheduling model (1) Minimize the completion time Subject to Different tasks do not overlap A task has a single leftmost RU A task cannot be placed too far on the right 6
  • 7. The placement and scheduling model (2) A task either exploits module reuse or it is reconfigured If there is no module reuse, the task starts with the reconfiguration If there is module reuse, the task is directly executed If no module reuse occurs, the execution start follows the task start at least by the reconfiguration time 7
  • 8. The placement and scheduling model (3) A task is removed at the end of its execution A task occupies the device continuously from the start to the execution end All precedences are respected The number of simultaneous reconfigurations is limited 8
  • 9. The placement and scheduling model (4) Let aij = 1 if tasks i and j are mapped onto the same mode; aij = 0 otherwise If a task exploits module reuse, its execution is preceded by the execution of a compatible task using the same RUs If a task exploits module reuse and its execution is preceded by an incompatible task on overlapping RUs, a compatible task must be executed between them using the same RUs as the first one for 9
  • 10. Napoleon Reconfiguration-Aware Scheduler 1 of 2 Napoleon: heuristic reconfiguration-aware scheduler, list-based with priority function the ALAP value of a node. It allows out of order scheduling for particular task graphs. It tries to exploits at best • Configuration prefetching • Module reuse It also uses anti-fragmentation techniques to improve the quality of the solution It tries to build a solution taking into account the constraints found in the ILP formulation of the problem 10
  • 11. Napoleon Reconfiguration-Aware Scheduler 2 of 2 Anti-Fraqmentation Techniques: limited deconfiguration farthest placement Ti: execution of task i Ri: configuration of task i 11
  • 12. Experimental Results GLPK [http://gnuwin32.sourceforge.net/packages/glpk.htm] has been used to solve the ILP instances Benchmark Ten task graphs with ten nodes [BBD06a] 9135 task graphs with a number of nodes in a 10-1000 range ASAPLIU ASAPB ASAPS ASAP ALAPLIU ALAPB ALAPS ALAP DyASAPLIU DyASAPB DyASAPS DyASAP They have been chosen as the most representative for the solution of our problem in the literature 12
  • 13. Results 1 of 3 [BBD06a] S. Banerjee, E. Bozorgzadeh, N. D. Dutt “Integrating physical constraints in HW-SW Partitioning for Architectures with partial dynamic reconfiguration”, IEEE Transactions on very large scale integration system, vol. 14, no. 11, november 2006 13
  • 14. Results 3 of 3 9135 task graphs with a number of nodes in a 10-1000 range 14
  • 15. Conclusions and Future Works Conclusions: ILP model formulation for the scheduling problem in a partially dynamically reconfigurable scenario --> (A1) Napoleon heuristic method based on the ILP formulation --> (A2) Napoleon obtains schedule length (in average) 18.6% better than the other algorithms --> (A3) Future works Integrate Napoleon into a general framework, to create a scheduling/reconfiguration-aware partitioning Integrate Napoleon in DRESD-HLR to complete the design flow to implement large applications onto partially dynamically reconfigurable devices Try new anti-fragmentation techniques 15