This document discusses retargetable compilers for reconfigurable computing. It describes several research projects including the Delft Workbench, LimboWARE, VIRGIL and YaRA that aim to develop retargetable compilers that can generate code for different reconfigurable architectures. The document outlines the goals, programming models, workflows and architectures of these projects.

1. M etodologie di P rogettazine H ardware e S oftware Reconfigurable Computing - Design Flow -

5. Retargetable Compilers

11. Delft Workbench Workflow Re- targeted Compiler Binary Code SimpleScalar Performance Statistics FPGA int fact(int n) { if(n<1) return n else return(n*fact(n-1)); } Human Directives call f(.) HDL Architecture REVISE C2C NO Part I Part II Part III … … Code f(.) HDL

21. VIRGIL: Workflow HLR

22. VIRGIL: The Compiler

23. VIRGIL: The architecture YaRA - FPGA Layers

25. Questions