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Number Representation and
Arithmetic
Operations
Number in a computer system is
represented by a string of bits, called a
binary number.
Integers
Consider an n-bit vector
B = bn−1 . . . b1b0 where bi = 0 or 1 for 0 ≤ i ≤ n
− 1.
This vector can represent an unsigned
integer value
V(B) in the range 0 to 2 n − 1, where
V(B) = bn−1 × 2 n-1 +・ ・ ・+b1 × 21 + b0 × 20
 We need to represent both positive and negative
numbers.
 Three systems are used for representing such
numbers:
 Sign-and-magnitude
 1’s-complement
 2’s-complement
 In all three systems, the leftmost bit is 0 for positive
numbers and 1 for negative numbers.
 Positive values have identical representations in all
systems, but negative values have different
representations
 In the sign-and-magnitude system, negative values
are represented by changing the most significant bit
b3 from 0 to 1 in the B vector of the corresponding
positive value.
 For example,
 In 1’s-complement representation, negative values are obtained by
complementing each bit of the corresponding positive number
 Thus, the representation for −3 is obtained by complementing each bit
in the vector 0011 to yield 1100.
 Bit complementing, is done to convert a negative number to the
corresponding positive value.
 Converting either way is referred to as forming the 1’s-complement of a
given number.
 For n-bit numbers, this operation is equivalent to subtracting the
number from 2n − 1.
 In 4-bit numbers we subtract from 24 − 1 = 15, or 1111 in binary.
 For e.g. to represent -3 in 1’s complement system subtract 3 from 15 or
1111
 15-3 =121100 or 1111 or 0011(3) 1100(change 1’s to 0’s and 0’s to
1’s
0011
-------------
• Finally, in the 2’s-complement system, forming
the 2’s-complement of an n-bit number is done
by subtracting the number from 2n.
• Hence, the 2’s complement of a number is
obtained by adding 1 to the 1’s-complement of
that number.
• Note that there are distinct representations for
+0 and −0 in both the sign-and magnitude and
1’s-complement systems, but the 2’s-
complement system has only one
representation for 0.
• For 4-bit numbers, the value −8 is represent
able in the 2’s-complement system but not in
the other systems.
Addition of Unsigned Integers
• Consider Addition of 1-bit numbers.
• The sum of 1 and 1 is the 2-bit vector 10, which represents
the value 2.The sum is 0 and the carry-out is 1.
• In order to add multiple-bit numbers, add bit pairs starting
from the low-order (right) end of the bit vectors,
propagating carries toward the high-order (left) end.
• The carry-out from a bit pair becomes the carry-in to the
next bit pair to the left.
• The carry-in must be added to a bit pair in generating the
sum and carry-out at that position.
• For example, if both bits of a pair are 1 and the carry-in is
1, then the sum is 1 and the carry-out is 1, which
represents the value 3.
Addition of 1 bit numbers
Addition and Subtraction of
Signed Integers
• Three systems are introduced for representing positive
and negative numbers, or, simply, signed numbers.
• These systems differ only in the way they represent
negative values.
•
• The sign-and-magnitude system is the simplest
representation, but it is not much suitable for addition and
subtraction operations.
• The 1’s-complement method is somewhat better.
• The 2’s-complement system is the most efficient method
for performing addition and subtraction operations.
• To understand 2’s-complement arithmetic,
consider addition modulo N (abbreviated as
mod N).
• It’s a graphical device for the description of
addition of unsigned integers
• mod N is a circle with the values 0 through N −
1 marked along its perimeter,
The decimal values 0 through 15 are represented by their 4-bit binary
values 0000 through 1111 around the outside of the circle.
In terms of decimal values, the operation (7 + 5) mod 16 yields the
value 12.
To perform this operation graphically, locate 7 (0111) on the outside
of the circle and then move 5 units in the clockwise direction to arrive
• Similarly, (9 + 14) mod 16 = 7; this is modeled on
the circle by locating 9 (1001) and moving 14
units in the clockwise direction past the zero
position to arrive at the answer 7 (0111).
This graphical technique works for the computation of (a + b) mod 16 for any
unsigned integers a and b
To perform addition, locate a and move b units in the clockwise direction to
arrive at
• Reinterpret the binary vectors outside the circle to
represent the signed integers from −8 through +7 in
the 2’s-complement representation as shown inside
the circle.
• Let us apply the mod 16 addition technique to the
example of adding +7 to −3.
• The 2’s-complement representation for these numbers
is 0111 and 1101, respectively.
• To add these numbers, locate 0111 on the circle . Then
move 1101 (13) steps in the clockwise direction to
arrive at 0100, which yields the correct answer of +4.
• Note that the 2’s-complement representation of −3 is
interpreted as an unsigned value for the number of
steps to move.
Simple addition of signed number
• To add +7 to −3. The 2’s-complement
representation for these numbers is 0111
and 1101, respectively
Rules for addition and subtraction of n bit signed
numbers using 2’s complement
• To add two numbers, add their n-bit
representations, ignoring the carry-out bit from the
most significant bit (MSB) position. The sum will
be the algebraically correct value in 2’s-
complement representation if the actual result is in
the range −2n−1 through+2n−1 − 1.
• To subtract two numbers X and Y , that is, to
perform X − Y, form the 2’s-complement of Y , then
add it to X using the add rule. Again, the result will
be the algebraically correct value in 2’s-
complement representation if the actual result is in
the range −2n−1 through+2n−1 − 1.
examples
• To add ,just do bit by bit addition and ignore
the carry out.
• In all of these 4-bit examples, the answers fall
within the representable range of −8 through
+7.
• When answers do not fall within the
representable range, we say that arithmetic
overflow has occurred.
subtraction
The subtraction operation requires forming the 2’s-complement of the
subtrahend (the bottom value) i.e form the 2’s-complement of a number, form
the bit complement of the number and add 1.
Sign extension
• To represent a value using a larger number of bits
add as many number of sign bits to the left, i.e to
MSB.
• If the value is positive add as many number of zeros
to the left i.e to MSB.
• E.g +4 …..using 4 bits… 0100
Using 8 bits…. 00000100
4 zeros added to MSB
• If the value is negative add as many number of 1’s to
the left
• E.g -4 Using 4 bits… 1100
Using 8 bits….11111100
4 ones added to MSB
• Overflow in Integer Arithmetic
• Using 2’s-complement representation, n bits can
represent values in the range −2n−1 to +2n−1 − 1. For
example, the range of numbers that can be
represented by 4 bits is −8 through +7.
• When the actual result of an arithmetic operation is
outside the representable range, then an arithmetic
overflow has occurred.
• When adding unsigned numbers, a carry-out of 1
from the most significant bit position indicates that
an overflow has occurred.
• This is not always true when adding signed
numbers.
• For example, using 2’s-complement
representation for 4-bit signed numbers, if we
add +7 and +4,
• +7---- 0111
• +4---- 0100
• 1011--- repesentation for
-5
• carry out is 0 an incorrect
result.
• -4------1100
• -6------1010
• 10110 -------incorrect
• carry out is 1 ……
• overflow may occur only if both summands have the
same sign.
• The addition of numbers with different signs cannot
cause overflow because the result is always within the
representable range.
• To detect overflow when adding two numbers in 2’s-
complement representation.
• Examine the signs of the two summands and the
sign of the result.
• When both summands have the same sign, an
overflow has occurred when the sign of the sum is not
the same as the signs of the summands.
• Floating-Point Numbers
• If we use a full word in a 32-bit word length computer to
represent a signed integer in 2’s-complement
representation, the range of values that can be
represented is −231 to +231 − 1. In decimal terms, this
range is somewhat smaller than −1010 to +1010.
• The same 32-bit patterns can also be interpreted as
fractions in the range −1 to +1 −2−31
• Assume that the implied binary point is just to the right
of the sign bit; that is,between bit b31 and bit b30 at the
left end of the 32-bit representation.
• In this case, the magnitude of the smallest fraction
representable is approximately 10−10.
• Neither of these two fixed-point number
representations has a range that is sufficient for
many scientific and engineering calculations.
• To have a binary number representation that can
easily accommodate both very large integers and
very small fractions, a computer must be able to
represent numbers and operate on them in such a
way that the position of the binary point is variable
and is automatically adjusted as computation
proceeds.
• In this case, the binary point is said to float, and
the numbers are called floating-point numbers.
• Since the position of the binary point in a
floating-point number varies, it must be
indicated explicitly in the representation.
• For E.g,
• 6.0247 × 1023
• 3.7291 × 10−27
• −1.0341 × 102
• −7.3000 × 10−14 and so on.
• 5 significant digits of precision.
• The scale factors 1023, 10−27, 102, and 10−14
indicate the actual position of the decimal point
with respect to the significant digits.
• Binary floating-point number can be represented by:
• a sign for the number
• some significant bits
• a signed scale factor exponent for an implied base of 2
• IEEE (Institute of Electrical and Electronics
Engineers)standard for 32-bit floating-point number
representation uses a sign bit, 23 significant bits, and 8
bits for a signed exponent of the scale factor, which has
an implied base of 2.
• In decimal terms, the range of numbers represented is
roughly
• + 10-38 to 10+8 which is adequate for most scientific and
engineering calculations.
• 64-bit representation will be used to accommodate more
significant bits and more bits for the signed exponent,
Character Representation
• The most common encoding scheme for characters is ASCII
(American Standard Code for Information Interchange).
• Alphanumeric characters, operators, punctuation symbols, and
control characters are represented by 7-bit codes.
• It is convenient to use an 8-bit byte to represent and store a
character.
• The code occupies the low-order seven bits. The high-order bit is
usually set to 0.
• The codes for the alphabetic and numeric characters are in
increasing sequential order when interpreted as unsigned binary
numbers. This facilitates sorting operations on alphabetic and
numeric data.
• The low-order four bits of the ASCII codes for the decimal digits 0 to
9 are the first ten values of the binary number system.
• This 4-bit encoding is referred to as the binary-coded decimal (BCD)
code.
module 1_class_numbers.pptx

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module 1_class_numbers.pptx

  • 2. Number in a computer system is represented by a string of bits, called a binary number. Integers Consider an n-bit vector B = bn−1 . . . b1b0 where bi = 0 or 1 for 0 ≤ i ≤ n − 1. This vector can represent an unsigned integer value V(B) in the range 0 to 2 n − 1, where V(B) = bn−1 × 2 n-1 +・ ・ ・+b1 × 21 + b0 × 20
  • 3.  We need to represent both positive and negative numbers.  Three systems are used for representing such numbers:  Sign-and-magnitude  1’s-complement  2’s-complement  In all three systems, the leftmost bit is 0 for positive numbers and 1 for negative numbers.  Positive values have identical representations in all systems, but negative values have different representations  In the sign-and-magnitude system, negative values are represented by changing the most significant bit b3 from 0 to 1 in the B vector of the corresponding positive value.  For example,
  • 4.
  • 5.  In 1’s-complement representation, negative values are obtained by complementing each bit of the corresponding positive number  Thus, the representation for −3 is obtained by complementing each bit in the vector 0011 to yield 1100.  Bit complementing, is done to convert a negative number to the corresponding positive value.  Converting either way is referred to as forming the 1’s-complement of a given number.  For n-bit numbers, this operation is equivalent to subtracting the number from 2n − 1.  In 4-bit numbers we subtract from 24 − 1 = 15, or 1111 in binary.  For e.g. to represent -3 in 1’s complement system subtract 3 from 15 or 1111  15-3 =121100 or 1111 or 0011(3) 1100(change 1’s to 0’s and 0’s to 1’s 0011 -------------
  • 6. • Finally, in the 2’s-complement system, forming the 2’s-complement of an n-bit number is done by subtracting the number from 2n. • Hence, the 2’s complement of a number is obtained by adding 1 to the 1’s-complement of that number. • Note that there are distinct representations for +0 and −0 in both the sign-and magnitude and 1’s-complement systems, but the 2’s- complement system has only one representation for 0. • For 4-bit numbers, the value −8 is represent able in the 2’s-complement system but not in the other systems.
  • 7. Addition of Unsigned Integers • Consider Addition of 1-bit numbers. • The sum of 1 and 1 is the 2-bit vector 10, which represents the value 2.The sum is 0 and the carry-out is 1. • In order to add multiple-bit numbers, add bit pairs starting from the low-order (right) end of the bit vectors, propagating carries toward the high-order (left) end. • The carry-out from a bit pair becomes the carry-in to the next bit pair to the left. • The carry-in must be added to a bit pair in generating the sum and carry-out at that position. • For example, if both bits of a pair are 1 and the carry-in is 1, then the sum is 1 and the carry-out is 1, which represents the value 3.
  • 8. Addition of 1 bit numbers
  • 9. Addition and Subtraction of Signed Integers • Three systems are introduced for representing positive and negative numbers, or, simply, signed numbers. • These systems differ only in the way they represent negative values. • • The sign-and-magnitude system is the simplest representation, but it is not much suitable for addition and subtraction operations. • The 1’s-complement method is somewhat better. • The 2’s-complement system is the most efficient method for performing addition and subtraction operations.
  • 10. • To understand 2’s-complement arithmetic, consider addition modulo N (abbreviated as mod N). • It’s a graphical device for the description of addition of unsigned integers • mod N is a circle with the values 0 through N − 1 marked along its perimeter,
  • 11. The decimal values 0 through 15 are represented by their 4-bit binary values 0000 through 1111 around the outside of the circle. In terms of decimal values, the operation (7 + 5) mod 16 yields the value 12. To perform this operation graphically, locate 7 (0111) on the outside of the circle and then move 5 units in the clockwise direction to arrive
  • 12. • Similarly, (9 + 14) mod 16 = 7; this is modeled on the circle by locating 9 (1001) and moving 14 units in the clockwise direction past the zero position to arrive at the answer 7 (0111). This graphical technique works for the computation of (a + b) mod 16 for any unsigned integers a and b To perform addition, locate a and move b units in the clockwise direction to arrive at
  • 13. • Reinterpret the binary vectors outside the circle to represent the signed integers from −8 through +7 in the 2’s-complement representation as shown inside the circle. • Let us apply the mod 16 addition technique to the example of adding +7 to −3. • The 2’s-complement representation for these numbers is 0111 and 1101, respectively. • To add these numbers, locate 0111 on the circle . Then move 1101 (13) steps in the clockwise direction to arrive at 0100, which yields the correct answer of +4. • Note that the 2’s-complement representation of −3 is interpreted as an unsigned value for the number of steps to move.
  • 14. Simple addition of signed number • To add +7 to −3. The 2’s-complement representation for these numbers is 0111 and 1101, respectively
  • 15. Rules for addition and subtraction of n bit signed numbers using 2’s complement • To add two numbers, add their n-bit representations, ignoring the carry-out bit from the most significant bit (MSB) position. The sum will be the algebraically correct value in 2’s- complement representation if the actual result is in the range −2n−1 through+2n−1 − 1. • To subtract two numbers X and Y , that is, to perform X − Y, form the 2’s-complement of Y , then add it to X using the add rule. Again, the result will be the algebraically correct value in 2’s- complement representation if the actual result is in the range −2n−1 through+2n−1 − 1.
  • 16. examples • To add ,just do bit by bit addition and ignore the carry out. • In all of these 4-bit examples, the answers fall within the representable range of −8 through +7. • When answers do not fall within the representable range, we say that arithmetic overflow has occurred.
  • 17. subtraction The subtraction operation requires forming the 2’s-complement of the subtrahend (the bottom value) i.e form the 2’s-complement of a number, form the bit complement of the number and add 1.
  • 18. Sign extension • To represent a value using a larger number of bits add as many number of sign bits to the left, i.e to MSB. • If the value is positive add as many number of zeros to the left i.e to MSB. • E.g +4 …..using 4 bits… 0100 Using 8 bits…. 00000100 4 zeros added to MSB • If the value is negative add as many number of 1’s to the left • E.g -4 Using 4 bits… 1100 Using 8 bits….11111100 4 ones added to MSB
  • 19. • Overflow in Integer Arithmetic • Using 2’s-complement representation, n bits can represent values in the range −2n−1 to +2n−1 − 1. For example, the range of numbers that can be represented by 4 bits is −8 through +7. • When the actual result of an arithmetic operation is outside the representable range, then an arithmetic overflow has occurred. • When adding unsigned numbers, a carry-out of 1 from the most significant bit position indicates that an overflow has occurred. • This is not always true when adding signed numbers.
  • 20. • For example, using 2’s-complement representation for 4-bit signed numbers, if we add +7 and +4, • +7---- 0111 • +4---- 0100 • 1011--- repesentation for -5 • carry out is 0 an incorrect result. • -4------1100 • -6------1010 • 10110 -------incorrect • carry out is 1 ……
  • 21. • overflow may occur only if both summands have the same sign. • The addition of numbers with different signs cannot cause overflow because the result is always within the representable range. • To detect overflow when adding two numbers in 2’s- complement representation. • Examine the signs of the two summands and the sign of the result. • When both summands have the same sign, an overflow has occurred when the sign of the sum is not the same as the signs of the summands.
  • 22. • Floating-Point Numbers • If we use a full word in a 32-bit word length computer to represent a signed integer in 2’s-complement representation, the range of values that can be represented is −231 to +231 − 1. In decimal terms, this range is somewhat smaller than −1010 to +1010. • The same 32-bit patterns can also be interpreted as fractions in the range −1 to +1 −2−31 • Assume that the implied binary point is just to the right of the sign bit; that is,between bit b31 and bit b30 at the left end of the 32-bit representation. • In this case, the magnitude of the smallest fraction representable is approximately 10−10.
  • 23. • Neither of these two fixed-point number representations has a range that is sufficient for many scientific and engineering calculations. • To have a binary number representation that can easily accommodate both very large integers and very small fractions, a computer must be able to represent numbers and operate on them in such a way that the position of the binary point is variable and is automatically adjusted as computation proceeds. • In this case, the binary point is said to float, and the numbers are called floating-point numbers.
  • 24. • Since the position of the binary point in a floating-point number varies, it must be indicated explicitly in the representation. • For E.g, • 6.0247 × 1023 • 3.7291 × 10−27 • −1.0341 × 102 • −7.3000 × 10−14 and so on. • 5 significant digits of precision. • The scale factors 1023, 10−27, 102, and 10−14 indicate the actual position of the decimal point with respect to the significant digits.
  • 25. • Binary floating-point number can be represented by: • a sign for the number • some significant bits • a signed scale factor exponent for an implied base of 2 • IEEE (Institute of Electrical and Electronics Engineers)standard for 32-bit floating-point number representation uses a sign bit, 23 significant bits, and 8 bits for a signed exponent of the scale factor, which has an implied base of 2. • In decimal terms, the range of numbers represented is roughly • + 10-38 to 10+8 which is adequate for most scientific and engineering calculations. • 64-bit representation will be used to accommodate more significant bits and more bits for the signed exponent,
  • 26. Character Representation • The most common encoding scheme for characters is ASCII (American Standard Code for Information Interchange). • Alphanumeric characters, operators, punctuation symbols, and control characters are represented by 7-bit codes. • It is convenient to use an 8-bit byte to represent and store a character. • The code occupies the low-order seven bits. The high-order bit is usually set to 0. • The codes for the alphabetic and numeric characters are in increasing sequential order when interpreted as unsigned binary numbers. This facilitates sorting operations on alphabetic and numeric data. • The low-order four bits of the ASCII codes for the decimal digits 0 to 9 are the first ten values of the binary number system. • This 4-bit encoding is referred to as the binary-coded decimal (BCD) code.

Notas do Editor

  1. For example, using 2’s-complement representation for 4-bit signed numbers, if we add +7 and +4, the sum vector is 1011, which is the representation for −5, an incorrect result