Device Modeling of CMOS Op-Amp using PSpice

1. L=10u Two Stage CMOS Op-Amp, Initial Parameters.
8
3
PARAMETERS:
VR = 2.6u
M2
pmos_tr
L = 10u
W = 125u
M4
nmos_tr
L = 10u
W = 107u
M6
nmos_tr
L = 10u
W = 4.3m
M8
pmos_tr
W = 20.8u
L = 10u
(Inv erting: +)
(Inv erting: -)
M5
pmos_tr
L = 10u
W = 20.8u
M1
pmos_tr
L = 10u
W = 125u
M3
nmos_tr
L = 10u
W = 107u
77
6
M7
pmos_tr
W = 42u
L = 10u
9
I1
{VR}
Cc
0.58pF
1
2
4
5
L=10u for all MOSFETs
WM8=WM5: IDD=I1*2

2. I1 = 2.6u, 26u, 260u, 2.6m [A]
Gain - AV Ibais เพิ่มขึ้นที่โครงสร้าง MOSFET คงที่
• AV ลดลง
– เพิ่มขึ้น: go2 and/or go4 ,go6 and/or go7
– ลดลง: gm2, gm6
• VOH, VOL ลดลง
– RDS(ON) ของ M ที่ติดกับ VDD และ VSS เพิ่มขึ้น
Frequency
1.0Hz 1.0KHz 1.0MHz10mHz
P(V(out))- P(V(in))-180
-240d
-210d
-180d
-150d
-120d
-90d
-60d
-30d
0d
DB(V(out)/V(in))
0
100
SEL>>
Gain - AV
V_V1
-2.0V 0V 2.0V-2.5V
V(RL:1)
-5.0V
0V
5.0V

3. M8 vs. Ibias
Sweep VDD-VSS ที่ W:M8=20.8u Sweep VDD-VSS ที่ W:M8=20.8u, 208u, 2.08m
V_Vdd
-5.0V -4.5V -4.0V
ID(M8)
100nA
1.0uA
10uA
100uA
1.0mA
10mA
V(4,5)
0V
1.0V
2.0V
SEL>>
(679.758m)
(559.477m)
(489.510m)
V_Vdd
-5.0V -4.5V -4.0V
ID(M8)
100nA
1.0uA
10uA
100uA
1.0mA
10mA
PARAMETERS:
VR = 20.8u
M8
pmos_tr
W = {VR}
L = 10u
4
5

4. I1 = 2.6u, 26u, 260u, 2.6m [A]
Output Voltage Swing ที่ W:M8=20.8u Output Voltage Swing ที่ W:M8=2.08m
V_V1
-2.0V 0V 2.0V
V(RL:1)
-5.0V
0V
5.0V
V_V1
-2.0V 0V 2.0V
V(RL:1)
-5.0V
0V
5.0V
Frequency
1.0Hz 1.0KHz 1.0MHz10mHz
P(V(out))- P(V(in))-180
-240d
-180d
-120d
-60d
0d
DB(V(out)/V(in))
0
100
SEL>>
Frequency
1.0Hz 1.0KHz 1.0MHz10mHz
P(V(out))- P(V(in))-180
-240d
-180d
-120d
-60d
0d
DB(V(out)/V(in))
0
100
SEL>>

5. I1 = 2.6u, 26u, 260u, 2.6m [A]
Output Voltage Swing ที่ W:M8=20.8u Output Voltage Swing ที่ W: M5 และ M8=2.08m
V_V1
-2.0V 0V 2.0V
V(RL:1)
-5.0V
0V
5.0V
V_V1
-2.0V 0V 2.0V
V(RL:1)
-5.0V
0V
5.0V
Frequency
1.0Hz 1.0KHz 1.0MHz10mHz
P(V(out))- P(V(in))-180
-240d
-180d
-120d
-60d
0d
DB(V(out)/V(in))
0
100
SEL>>
Frequency
1.0Hz 1.0KHz 1.0MHz10mHz
P(V(out))- P(V(in))-180
-240d
-180d
-120d
-60d
0d
DB(V(out)/V(in))
0
100
SEL>>

6. 8
3
20.8u
PARAMETERS:
W8 = 20.8u
Ibias = 1.2u
Isrcmx = 0.5m
20.8u
M2
pmos_tr
L = 10u
W = 125u
M4
nmos_tr
L = 10u
W = 107u
M6
nmos_tr
L = 10u
W = 4.3m
M8
pmos_tr
W = {W8}
L = 10u
(Inv erting: +)
(Inv erting: -)
M5
pmos_tr
L = 10u
W = {W8}
M1
pmos_tr
L = 10u
W = 125u
M3
nmos_tr
L = 10u
W = 107u
77
6
M7
pmos_tr
W = {W8*(Isrcmx/Ibias)}
L = 10u
9
I1
{Ibias}
Cc
0.58pF
1
2
4
5
Frequency
1.0Hz 1.0KHz 1.0MHz10mHz
P(V(out))- P(V(in))-180
-240d
-180d
-120d
-60d
0d
DB(V(out)/V(in))
-50
50
100
150
SEL>>

7. ISOURCE[MAX], VOH@ISOURCE Configuration Circuit VOH vs. ISOURCE
VOH
20.8u
M8
pmos_tr
W = {W8}
L = 10u
9 M7
pmos_tr
W = {W8*(Isrcmx/Ibias)}
L = 10u
I1
{Ibias}
PARAMETERS:
W8 = {20.8m}
Ibias = 1.2m
Isrcmx = 0.5
0
Vdd
3Vdc
0
Vss
0Vdc
54
4
5
ISRC
0
I_ISRC
10mA 100mA 1.0A
V(VOH) 2.85
2.5V
3.0V
VOH=2.85@ISOURCE=250mA

8. I_I1
10mA 100mA 250mA
V(4) 0.15
0V
250mV
500mV
W6 minimum possible
Result: W6 > 22 VOL vs. ISINK
VOL=0.15@ISINK=250mA
M6
nmos_tr
L = 10u
W = {W6}
0 0
Vss
0Vdc
4 5
4
5
I1
0Adc
PARAMETERS:
W6 = 22