Final paper presented in the RF Microwave Circuits Class

1. EERF6311 - Final Design Project, Sachin Kumar Asokan
A Novel Planar Three Way Power Divider
Authors: Jui-Chieh Chiu, Jhi-Ming Lin, and Yeong-Her Wang
Review paper summary: This paper was published on August 2006
and it addresses the problems faced in the implementation of a power
divider from a RF perspective and in MMIC design. This planar three way
power divider proposes a circuit which is planar in nature when compared
to the existing Wilkinson power divider which has a 3-D structure which
increases the complexity in high frequency circuit design. This proposed
circuit also has improved RF performance on return loss, insertion loss,
and isolation. Also, from a MMIC design standpoint, the circuit
dimensions are greatly reduced. This design reduces the circuit
dimension, number of resistors and also provides dc block function which
makes it feasible for implementation on printed circuit boards and
MMIC’s.
The operating frequency of the design is at 2.4GHz and the analysis of
data is done over a range of 0.1-5GHz. The circuit was fabricated on a
low-cost FR-4 PCB with a dielectric constant of 4.4 and a thickness of
2.4mm. The FR-4 substrate as such is not the ideal substrate to use as it
is lossy and it’s dielectric constant changes with respect to frequency.
The main advantage of the FR-4 substrate is its low cost. The accuracy of
the design was improved by de-embedding the microstrip to SMA
launchers while modelling and during simulation, the S parameters of the
chip resistors were taken into consideration. The loss tangent of the
substrate was taken to be 0.02. The proposed design is thereby easy to
fabricate and design.
The analysis usually used for analyzing power dividers are the even-odd
mode analysis. While this kind of analysis might work for an even mode
power divider (2-way power divider), it is not technically correct to analyze
an even-mode in a three-way power divider since the in-phase excitation
and equal amplitude are a necessary condition to correctly analyze the
circuit. The impedance matching of different microstrip lines to
successfully transform an incoming signal into three parts is the prime
focus for the analysis of the circuit.
Figure 1a. Schematic diagram of the proposed three-way power divider
As seen from Figure1a. , the input power is split into three equal parts
with the same amplitude with the help of proper impedance matching.
The second section implements coupled line technology to provide the
required impedance transformation to the output signals. A symmetrical
4 coupled line structure with the same spacing, S is used to couple the
input signals. The third section is the output section which desires at
achieving good isolation amongst each other and match with the output
port. There are just two isolation resistors when compared to the
conventional three resistor design as seen in the Wilkinson power divider.
This is how the planar form is achieved in the proposed circuit thereby
there is the difference in the internal structure of the microstrip lines
connecting them. All the ports of the proposed power divider are
impedance matched to provide three in-phase and equal amplitude
power signals at the output ports.
Figure 1b. A N-way, equal split Wilkinson Power Divider
The conventional design as stated by Pozar uses 3 resistors to
achieve the same 3-way power split at the output ports. This can be
observed from Figure 1b. The conventional design does achieve
good isolation and return loss but the three dimensional structure of it
causes complexities when it comes to integrating this on to a printed
circuit board or MMIC.
The purpose of this paper is to increase the efficiency and reduce the
complexity of the Wilkinson power dividers in printed circuit boards
and in monolithic microwave integrated circuits. The proposed project
reduces the three dimensional structure of the Wilkinson power
divider into a planar form which is easier to implement. The proposed
project also ensures better RF performances at the design frequency
of 2.4GHz. The key factor is the addition of just two isolation resistors
when compared to three in the conventional design (Figure 2). This
pays off when it comes to implementing this circuits on printed boards
and MMIC’s. The size comes down and thereby the cost can be
reduced as well. The circuit is novel in its own way as the proposed
circuit also helps in blocking dc.
The results observed from the simulations done for the design
(Figure4) are very similar to the ones seen in the proposed paper.
The input return loss is greater than 35dB. The output return loss is
greater than 14dB. The insertion loss observed is greater than 5dB as
compared to the 4.8dB stated in the paper. The isolation between the
ports is greater than 13dB between ports 2 and 4 while the isolation is
greater than 24dB between ports 2 and 3, ports 3 and 4. All the
values are calculated at the design frequency of 2.4GHz.
The proposed circuit leads to an advancement in technology by two
things. First thing is the reduction in size as explained above. The
second thing is the expansion in bandwidth of the system. From
Figure 3, Figure 5 and Figure 6 it can be seen that the usable
bandwidth of the power divider has been increased. Usually a 10dB
return loss can be considered a good value for return loss of a circuit,
we see that from the simulated design, the return loss (both input and
output) is more than 10dB in the frequency range of 1.5GHz-3.8GHz.
The effective bandwidth has therefore been enhanced. This implies
that the proposed circuit can be used for a wider frequency range of
applications. Therefore the improvement in RF performance and
reduction in size leads to a successful design.
References:
[1] D. M. Pozar, Microwave Engineering, 2nd ed. New York: Wiley,
1998, Pg.328-334
[2] Jui-Chieh Chiu, Jhi-Ming Lin, Yeong-Her Wang, "A Novel Planar
Three Way Power Divider," IEEE MICROWAVE AND WIRELESS
COMPONENTS LETTERS, VOL. 16, NO. 8, AUGUST 2006
[3] E. J. Wilkinson, “An N-way power divider,” IEEE Trans. Microw.
Theory Tech., vol. MTT-8, pp. 116–118, Jan. 1960

2. Figure 2. Ideal design schematic (Design#1) Figure 3. Ideal design port parameters (Design#1)
Figure 4. Schematic of the proposed circuit (Design#3) Figure 5. Measured and simulated insertion loss and isolation(Design#3)
Figure 6. Measured and simulated return loss (Design#3) Figure 7. Photograph of the fabricated three-way power divider