SEMINAR

1. Presentation of Seminar on
OVERSHOOT VOLTAGE REDUCTION IN IoT
APPLICATIONS
Presented by
KNR19EE013 – ANUSREE P
under the guidance of
Dr. HITHU ANAND
DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING
GOVT.COLLEGE OF ENGINEERING KANNUR-670563
Oct 2022

2. OVERVIEW
• INTRODUCTION
• TRANSIENTS IN IoT APPLICATIONS
• CONVENTIONAL TECHNIQUES
• ANALYSIS OF OVERSHOOT REDUCTION TECHNIQUES
• ACTIVE ENERGY RECYCLING TECHNIQUE
• MULTIPHASE ACTIVE ENERGY RECYLING TECHNIQUE
• MP-AER LOGIC
• CONCLUSION
• REFERENCE
2

3. INTRODUCTION
• A transient voltage is temporary unwanted voltage in an electrical circuit.
• These transients are undesirable as they result in reduction of net efficiency of the
system and damage the core components.
• Internet-of-Things (IoT) devices are widely used in SCADA, smart metering,
building automation, smart grid and connected public lighting.
• More information is sent and received by Wi-Fi systems, which contains control
chips.
• The chips are fabricated in an advanced nanometer process and powered by low
voltages.
3

4. INTRODUCTION (Cont.)
• High voltage transients can damage these chips.
• The Wi-Fi link controllers, network controllers, RF front end components etc. can
get damaged by high voltages.
• These components are expensive and thus difficult to replace.
• So it is important to protect these components from high voltage transients.
4

5. TRANSIENTS IN IoT APPLICATIONS
• An IEEE 802.11ac Wi-Fi system of IoT device requires cascaded low dropout
(LDO) regulator [2].
• LDO regulator filters out any interference from switching regulator.
• They cause power loss and reduces efficiency to less than 70% [3].
Fig.1. Power management for IoT electronic device. (a)Method 1
with LDO regulator. (b)Method 2 with direct supply by the switching
regulator
5

6. TRANSIENTS IN IoT APPLICATION (Cont.)
• The Wi-Fi system is directly supplied energy through a single switching regulator .
• This increases efficiency.
• The absence of LDO regulator result in transfer of large output variation to the
Wi-Fi system.
• The Wi-Fi control chip may be damaged by the output overshoot voltage under
heavy load changes.
• The maximum load change occurs when the IoT device transits from active
transmission mode to power saving mode (PSM).
6

7. TRANSIENTS IN IoT APPLICATIONS (Cont.)
• The Constant on Time (COT) control techniques has stability problem [5].
• The insertion of additional current information increases the COT stability.
• A poor transient response occurs.
• When using a small output capacitor in the switching regulator the peak output
voltage increases by more than 150% of rated voltage.
• The maximum allowable voltage of the core device is 110% of rated voltage.
• As a result, the Wi-Fi system's reliability and the converter's efficiency both
decrease.
7

8. Fig.2.(a) COT buck converter with additional current information. (b)Extra on-time
causes low load transient response due to opposite trend between inductor current and
output voltage ripple.
TRANSIENTS IN IOT APPLICATIONS (Cont.)
8

9. CONVENTIONAL TECHNIQUES
• Usually overshoot voltage is reduced by consuming the redundant energy in the
system.
• Clamped Zener diodes can be used for this technique but results in the reduction
of efficiency of the system.
• Conventional techniques to reduce output overshoot voltage are :
A. Overshoot Reduction Technique (OSR)
B. Dummy Load Technique (DL)
9

10. CONVENTIONAL TECHNIQUES (Cont.)
A. Overshoot Reduction Technique (OSR)
• A voltage feedback signal is sent back to the OSR detector.
• A reference voltage that is 110% of the rated output voltage is set in the
detector.
• The detector compares both voltages and blocks the pulse width modulation
signal to low-side power n-type MOSFET.
• The inductor current is conducted by the body diode of the low-side power n-
type MOSFET.
• The slope of the discharge current of the inductor current increases by
(𝑉𝑂𝑈𝑇+ 𝑉𝐷)/𝑉𝑂𝑈𝑇.
• The redundant power loss ∆𝑃𝐿𝑂𝑆𝑆 is 95mW.
10

11. CONVENTIONAL TECHNIQUES (Cont.)
Fig.4.Circuit implementation of
OSR technique.
Fig.5.Explanation waveforms of OSR
technique
11

12. CONVENTIONAL TECHNIQUES (Cont.)
B. Dummy Load Technique (DL)
• A voltage feedback signal is sent back to the DL controller.
• A reference voltage that is 110% of the rated output voltage is set in the
controller.
• The 2 voltages are compared and one or more energy dissipation paths are
created immediately.
• This technique internally sinks current to discharge redundant charges.
• The redundant power loss ∆𝑃𝐿𝑂𝑆𝑆 is 78mW.
12

13. CONVENTIONAL TECHNIQUES (Cont.)
Fig.6. Circuit implementation of
DL technique
Fig.7. Explanation waveforms of
DL technique operation
13

14. ANALYSIS OF OVERSHOOT REDUCTION TECHNIQUES
• The Wi-Fi system rapidly enters the
PSM at 𝑡𝑜, and the loading current
𝐼𝐿𝑂𝐴𝐷 decreases to 𝐼2 at 𝑡1 where the
load slew rate is,
slew rate = ∆𝐼𝐿𝑂𝐴𝐷/(𝑡1- 𝑡𝑜) (1)
• The output voltage reaches
∆𝑉𝑂𝑈𝑇(𝑃𝐸𝐴𝐾) at the time 𝑡𝑝 , which is
determined when the inductor current
is equal to 𝐼2.
Fig. 3. Output overshoot voltage in
conventional COT dc-dc buck converter when
loading current changes from heavy to light.
14

15. ANALYSIS OF OVERSHOOT REDUCTION TECHNIQUES
(Cont.)
• The transient output voltage variation is calculated by the principle of capacitor
charge balance,
∆𝑉𝑂𝑈𝑇=
𝑡𝑝 −𝑡1 . ∆𝐼𝐿𝑂𝐴𝐷
𝐶𝑂𝑈𝑇
(2)
where , ∆𝑉𝑂𝑈𝑇 is transient output voltage variation, 𝑡𝑝 is peak time, 𝐶𝑂𝑈𝑇 is
capacitance of output capacitor and ∆𝐼𝐿𝑂𝐴𝐷 is load change.
• The load change is given by,
∆𝐼𝐿𝑂𝐴𝐷 =
∆𝑉𝑂𝑈𝑇
𝐿
. (𝑡𝑝 - 𝑡0) (3)
• The redundant power loss is given by ,
∆P𝐿𝑂𝑆𝑆 = 𝐼𝐿,𝑇𝑅
. ∆𝑉𝑂𝑈𝑇/2 (4)
where, 𝐼𝐿,𝑇𝑅
is the average inductor current during transient response period.
15

16. ANALYSIS OF OVERSHOOT REDUCTION TECHNIQUES
(Cont.)
𝑉𝐵𝐴𝑇 (V) 2.7 – 3.63 𝐶𝑂𝑈𝑇 (μF) 4.7
𝑉𝑂𝑈𝑇(𝑟𝑎𝑡𝑒𝑑) (V) 1 L (μH) 2.2
𝑓𝑠𝑤 (𝑀𝐻𝑧) 1 – 2 ∆𝐼𝐿𝑂𝐴𝐷/∆t (A/μs) 1
∆𝑉𝑂𝑈𝑇(𝑃𝐸𝐴𝐾)
(%)
10% Loading current
change step ∆𝐼𝐿𝑂𝐴𝐷
(A)
1.4 (from 1.7 to
0.3)
Table 1. Design specifications of the DC-DC buck converter
Substituting the design values from the table to equations (2), (3) and (4) we get
∆P𝐿𝑂𝑆𝑆 around 134mW, which decreases efficiency.
16

17. ACTIVE ENERGY RECYCLING TECHNIQUE
• The AER uses an asynchronous boost converter.
• It stores additional energy through path 1 and recycles energy through path 2.
• 33-nH bond wire inductance (La) is applied to reduce overshoot voltage
immediately.
• If gate control signal of Ma balances during 𝑇𝑆𝑜𝑛 and 𝑇𝑆𝑜𝑓𝑓, inductor current flows
through path 1 & 2.
• The output redundant energy is stored in La during 𝑇𝑆𝑜𝑛 and recycled to battery
during 𝑇𝑆𝑜𝑓𝑓.
• The optimised 𝑇𝑆𝑜𝑓𝑓 is given by,
𝑇𝑆𝑜𝑓𝑓 =
𝐼𝐿𝑎_𝑝𝑒𝑎𝑘 .𝐿𝑎
𝑉𝑂𝑈𝑇−𝑉𝐵𝐴𝑇
(5)
where 𝐼𝐿𝑎_𝑝𝑒𝑎𝑘 is the peak current of inductor La, 𝑉𝑂𝑈𝑇 is output voltage and 𝑉𝐵𝐴𝑇
is the battery voltage.
17

18. ACTIVE ENERGY RECYCLING TECHNIQUE (Cont.)
Fig.8. COT buck converter with AER
technique.
18

19. ACTIVE ENERGY RECYCLING TECHNIQUE (Cont.)
19
Fig.9. Operation waveforms of AER technique.

20. ACTIVE ENERGY RECYCLING TECHNIQUE (Cont.)
• It is difficult to obtain accurate 𝑇𝑆𝑜𝑓𝑓
due to the small inductance value.
• Too short 𝑇𝑆𝑜𝑓𝑓 results in instability in
inductor current.
• Too long 𝑇𝑆𝑜𝑓𝑓 results in resonant
effect.
• Thus overvoltage reduction
performance is degraded.
Fig.10. (a) unstable operation caused by too short
𝑇𝑆𝑜𝑓𝑓. (b) Reduce recycling switching frequency
caused by too long 𝑇𝑆𝑜𝑓𝑓.
20

21. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
• The MP-AER technique uses the multiphase technique to remove the need of
precise 𝑇𝑆𝑜𝑓𝑓.
• The power conversion efficiency of the system can be improved up to 23%.
• This technique contains :
a) MP-AER controller
b) 4 Bond wire inductances ( La, Lb, Lc, Ld )
c) Schottky diodes ( Da, Db, Dc, Dd)
d) Low – side MOSFETs ( Ma, Mb, Mc, Md )
e) Four-phase drivers
21

22. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
Fig.11. MP-AER Technique.
22

23. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
• Ma is turned on when 𝑉𝑂𝑈𝑇 > 𝑉𝑅𝐸𝐹2 and redundant energy is stored in La during
1a.
• The stored energy from La is fed to the battery through the diode during 2a.
• The resonant effect occurs during 3a.
• Mb is designed to turn on to have Lb with a positive inductance current slope in
duration 1b which covers durations 2a and 2b.
• 𝑇𝑆𝑜𝑛,𝑏 > 𝑇𝑆𝑜𝑓𝑓,𝑎
• Lb stores redundant energy as well as the resonant energy from La.
• Advantages :
Redundant energy is continuously stored in any of the 4 bond wire
inductances.
Higher recycling frequency without the need of precise 𝑇𝑆𝑜𝑓𝑓.
23

24. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
Fig.12.Equivalent circuit of MP-AER technique
24

25. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
25
Fig.13. Explanation of the usage of multiphase
architecture for recycling resonant energy.

26. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
• m1 is the storing energy slope and m2 is the feeding back slope.
m1 =
𝑉𝑂𝑈𝑇
𝐿𝑎
(6)
m2 =
𝑉𝑂𝑈𝑇 −𝑉𝐵𝐴𝑇
𝐿𝑎
(7)
• The MP-AER technique is enabled by the signal 𝐸𝑁𝑂𝑉𝑅.
• 𝑇𝑆𝑜𝑛 of each phase is 33ns and is determined by the 𝑇𝑆𝑜𝑛 generator.
• The MP-AER logic and four-phase drivers generate four interleaving driving
signals 𝑉𝐺𝑎, 𝑉𝐺𝑏, 𝑉𝐺𝑐 and 𝑉𝐺𝑑.
• These signals control the charging and discharging of bond wire inductance
current 𝐼𝐿𝑎, 𝐼𝐿𝑏, 𝐼𝐿𝑐 and 𝐼𝐿𝑑.
• Each of the four phases are triggered in turn.
26

27. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
• The inductance current is increased during 𝑇𝑆𝑜𝑛.
• The inductance current decreases to zero to attain a stable energy recycling control
during 𝑇𝑆𝑜𝑓𝑓.
• The sum of 𝑇𝑆𝑜𝑓𝑓 and resonant time is three times 𝑇𝑆𝑜𝑛.
• The equivalent switching frequency of MP-AER technique during transient time
of COT buck converter is four times of the original single phase.
27

28. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
Fig.13. Operation of MP-AER technique
28

29. MULTIPHASE ACTIVE ENERGY RECYCLING TECHNIQUE
(Cont.)
29
Fig.14.Output OSR within MP-AER
technique

30. MP-AER LOGIC
• When 𝑉𝑂𝑈𝑇 > 𝑉𝑅𝐸𝐹2, 𝑉𝐷𝑅𝑉_𝑂𝑆 is set logically high and 𝑉𝐷𝑅𝑉_𝑂𝑆𝐵 is sent to the 𝑇𝑆𝑂𝑁
generator to enable constant charging current.
• 𝑇𝑆𝑂𝑁 generator repeatedly generates a reset signal every 33ns .
Fig.15.Circuit implementation of MP-AER Logic
30

31. RESULTS
• In conventional COT buck converter when the load changes from 1.7 to 0.3 A,
∆𝑉𝑂𝑈𝑇 is 507mV, ∆𝑇𝑅 is 16µs and redundant power loss is 63.3mW.
• Under same load changes, ∆𝑉𝑂𝑈𝑇 is 95mV, ∆𝑇𝑅 is 5.2µs and redundant power loss
is 18.6mW when MP-AER technique is implemented (81.3% improvement).
• The MP-AER technique is enabled for 4.2µs and the four phase interleaving
driving signals effectively recycle energy to derive 98mW recycling energy.
• Thus, the MP-AER technique provides a reduced output variation smaller than
100mV in case of a sudden heavy load change.
• Peak efficiency of 93% is obtained when the input voltage is 3V and the loading
current is 300mA and high speed operation with only 10ns on-time period.
31

32. RESULT (Cont.)
PARAMETERS CONVERTER OSR DL MP-AER
∆𝐼𝐿𝑂𝐴𝐷/∆t (A/μs) 1.4/1.4 1.4/1.4 1.4/1.4 1.4/1.4
∆𝑉𝑂𝑈𝑇(𝑚𝑉) 540 330 150 95
∆𝑇𝑅(μs) 18 6.3 5.5 5.2
𝑃𝐿𝑂𝑆𝑆(𝑚𝑊) 0 88 178 18.6
Peak power
efficiency(%)
93 91 88 93
Table 2.Comparison of specification and performance
32

33. CONCLUSION
• Overshoot voltages are highly undesirable in IoT operations.
• Through MP-AER technique output overshoot can be suppressed without
sacrificing the efficiency of the system.
• By using bond wires to recover additional energy the overshoot voltage can be
suppressed while improving the power conversion efficiency.
• Experimental results show 93% peak efficiency at 3V input voltage and 300mA
loading current.
• Thus the efficiency is increased by 23% by using MP-AER technique.
33

34. REFERENCE
[1] J.J Lee, S.H Yang et al., (2021) “ Multiphase active energy recycling technique
for overshoot voltage reduction in Internet of things applications.” IEEE J.Emerging and
selected topics in power electronics, Vol.9, No.1, pp.58-67, February 2021.
[2] W.-C. Chen et al.,(2014) “±3% voltage variation and 95% efficiency 28nm constant on-
time controlled step-down switching regulator directly sup plying to Wi-Fi systems,”
Symp. VLSI Circuits Dig. Tech. Papers, pp.1-4, June 2014
[3] M.-W. Chien et al.,(2015) “Suppressing output overshoot voltage technique with
47.1mw/µs power-recycling rate and 93% peak efficiency DC-DC converter for
multi-core processors,” Proc. Conf. 41st Eur. Solid-State Circuits (ESSCIRC), pp. 188–
191, September 2015.
34

35. REFERENCES (Cont.)
[4] M. El-Nozahi, A. Amer et al.,(2010)“High PSR low drop-out regulator with feed-forward
ripple cancellation technique,” IEEE J. Solid-State Circuits, vol. 45, no. 3, pp. 565–577,
March 2010.
[5] J. Guo and K.-N. Leung, (2010) “A 6-μ W chip-area-efficient output capacitorless LDO
in 90-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1896–1905,
September 2010.
35

36. THANK YOU
36