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Sir Usman Hummayu
Muhammad Umar Riaz   Muhammad Uzair Rasheed



           Muhammad Shuaib Aslam
Topic :

    Microprocessor
 8 Bit
    16 Bit
           32 Bit




                     4
Introduction to 8 bit(8085)
Microprocessor




  Presented by- Muhammad Umar Riaz
  2009-CPE-30
  Department of Computer Engineering UCE&T
  Multan
Microprocessor

 Brain of the computer
 silicon chip that contains a CPU
 First microprocessors emerged in the early
  1970.
 A microprocessor is designed to perform
  arithmetic and logic operations
8BIT MICROPROCSSORS



         8085
INTRODUCTION

The features of INTEL 8085 are :
•   It is an 8 bit processor.
•   It is a single chip N-MOS device with 40 pins.
•   It has multiplexed address and data bus.(AD0-AD7).
•   It works on 5 Volt dc power supply.
•   The maximum clock frequency is 3 MHz while
    minimum frequency is 500kHz.
•   It provides 74 instructions with 5 different addressing
    modes.
8085 INTRODUCTION

 It provides 16 address lines so it can access 2^16 =64K
  bytes of memory.
 It generates 8 bit I/O address so it can access 2^8=256 input
  ports.
  It provides Acc ,one flag register ,6 general purpose registers
  and two special purpose registers(SP,PC).
 It provides serial lines SID ,SOD.So serial peripherals can be
  interfaced with 8085 directly.
8085 ARCHITECTURE
Arithmetic and Logical group

   Accumulator: It is 8 bit general purpose register.
       It is connected to ALU.
       So most of the operations are done in Acc.
   Temporary register: It is not available for user
       All the arithmetic and logical operations are done in the
        temporary register but user can’t access it.
   Flag: It is a group of 5 flip flops used to know status of various
        operations done.
       The Flag Register along with Accumulator is called PSW
   or Program Status Word.
Arithmetic and Logical group

     Flag Register is given by:

 S      Z        X      AC        X       P        X       CY
     S:Sign flag is set when result of an operation is negative.
     Z:Zero flag is set when result of an operation is 0.
     Ac:Auxiliary carry flag is set when there is a carry out of lower
        nibble or lower four bits of the operation.
     CY:Carry flag is set when there is carry generated by an
        operation.
     P:Parity flag is set when result contains even number of 1’s.
     Rest are don’t care flip flops.
Register Group

    Temporary registers (W,Z):These are not available for user.
     These are loaded only when there is an operation being
     performed.
    General purpose:There are six general purpose registers in
     8085 namely B,C,D,E,H,L.These are used for various data
     manipulations.
    Special purpose :There are two special purpose registers in
     8085:
1.   SP :Stack Pointer.
2.   PC:Program Counter.
Register Group

  Stack Pointer: This is a temporary storage memory 16 bit register.
    Since there are only 6 general purpose registers, there is a
    need to reuse them .
   Whenever stack is to be used previous values are PUSHED on
    stack and then after the program is over these values are
    POPED back.
  Program Counter: It is 16 bit register used to point the location
    from which the next instruction is to be fetched.
   When a single byte instruction is executed PC is automatically
    incremented by 1.
   Upon reset PC contents are set to 0000H and next instruction
    is fetched onwards.
INSTRUCTION REGISTER,DECODER &
CONTROL

 Instruction register:When an instruction is fetched , it is
  executed in instruction register.This register takes the
  Opcode value only.
 Instruction decoder: It decodes the instruction from
  instruction register and then to control block.
 Timing and control:This is the control section of µP.It
  accepts clock input .
INSTRUCTIONS SET OF 8085

    DATA TRANSFER GROUP
    MOV Rd, Rs.(Move data from Rs to Rd).
    Example:
    MOV C,B. Move the content of register B to C.
    Initially                 After execution
    B=10H.                    B=10H.
    C=20H.                      C=10H.
    Flags Affected :No flags affected.
    Addressing mode: Register.
ARITHMETIC GROUP

ADD R (ADD register content with Acc and result in A ).
Example:
ADD C. (ADD the content of C with A).
Suppose the Data at C register is 10H.
Initially             After execution
. C= 10H ,A=10H          A=20H,C=10H.
Flags Affected :All flags are modified.
Addressing mode: Register
LOGICAL GROUP

ANA R (Logically AND register content with Acc and result in A
  ).
Example:
ANA C (AND the content of C with A).
Suppose the Data at C register is 10H.
Initially             After execution
C= 10H ,A=10H           A=10H,C=10H.
Flags Affected :S,Z,P are modified Cy=reset,AC=set.
Addressing mode:Register.
8085 Memory Interfacing

•   Generally µP 8085 can address 64 kB of memory .
•   Generally EPROMS are used as program memory and RAM as
    data memory.
•   We can interface Multiple RAMs and EPROMS to single µP .
•   Memory interfacing includes 3 steps :
1. Select the chip.
2. Identify register.
3. Enable appropriate buffer.
8085 Memory Interfacing

 The diagram of 2k interfacing is shown below:
                                                              3:8DECODER
                                                   A15- A11


      8085
                                                                    CS
                                  A15-A8


                 ALE
                                                  A10- A0       2K Byte
                                 Latch                          Memory
                       AD7-AD0           A7- A0                  Chip



       WR RD   IO/M                      D7- D0

                                                               RD    WR
8085 Memory Interfacing

   •In this example we saw that some address lines are used for
   interfacing while others are for decoding.
   •It is called absolute decoding.
   •We sometimes don’t requires that many address lines.So
   we ignore them.But this may lead to shadowing or multiple
   address.
   •This type of decoding is called linear decoding or partial
   decoding.
   •In partial decoding wastage of address takes place but it
   requires less hardware and cost is also less as compared with
   absolute one.
Introduction to 16 bit(8086)
Microprocessor




  Presented by- Muhammad Uzair Rasheed
  2009-CPE-03
  Department of Computer Engineering UCE&T
  BZU Multan
The first 16 bit Microprocessor 8080

    16-bit address bus (1974)
      Used in Altair computer
      (early hobbyist PC)
  Characteristics
    6 m process
    4500 transistors
    2 MHz
    8-bit word size
8086 / 8088

   16-bit processor (1978-9)
     IBM PC and PC XT
     Revolutionary products
 Characteristics
     3 m process
     29k transistors
     5-10 MHz
     16-bit word size


                                Slid
                                e
                                25
16 bit    Microprocessor(8086)


  INTEL launched 8086 in 1978
  8086 is a 16-bit microprocessor with
    16-bit Data Bus
    20-bit Address Bus
8086 Internal Architecture

       8086 employs parallel processing
       8086 CPU has two parts which operate at the
        same time
         Bus Interface Unit
         Execution Unit             8086 CPU

       CPU functions               Bus Interface
    1.    Fetch                      Unit (BIU)


    2.    Decode
                                   Execution Unit
    3.    Execute                      (EU)
Bus Interface Unit

   Sends out addresses for memory locations.
   Fetches Instructions from memory.
   Reads/Writes data to memory.
   Sends out addresses for I/O ports.
   Reads/Writes data to Input/Output ports.
Execution Unit



 Tells BIU (addresses) where to fetch instructions
  or data.
 Decodes & Executes instructions.
Architecture Diagram of 8086
Memory
              ∑                                      Interface


  EXTRA SEGMENT (ES)                                    BIU
  CODE SEGMENT (CS)
                             6   5   4   3   2   1
  STACK SEGMENT (SS)
  DATA SEGMENT (DS)          Instruction
INSTRUCTION POINTER (IP)     Queue



                                                     Instruction
                                                      Decoder
    AH            AL
    BH            BL       ARITHMETIC
    CH            CL       LOGIC UNIT
                                                      CONTROL
    DH            DL                                   SYSTEM
   STACK POINTER (SP)
   BASE POINTER (BP)       OPERANDS
   SOURCE INDEX (SI)         FLAGS
                                                        EU
 DESTINATION INDEX (DI)
Execution Unit

 Main components are
   Instruction Decoder
   Control System
   Arithmetic Logic Unit
   General Purpose Registers
   Flag Register
   Pointer & Index registers
Instruction Decoder
 Translates instructions fetched from memory
  into a series of actions which EU carries out.
             Control System
Generates control signals to perform the
 internal operations of the microprocessor.

         Arithmetic Logic Unit
EU has a 16-bit ALU which can
 ADD, SUBTRACT, AND, OR, increment, decre
 ment, complement.
General Purpose Registers

 EU has 8 general purpose        AH        AL
    registers.
                                  BH        BL
   Can be individually used
    for storing 8-bit data.       CH        CL
   AL register is also called    DH        DL
    Accumulator.
   Two registers can also be    AH    AL    AX
    combined to form 16-bit
                                 BH    BL    BX
    registers.
   The valid register pairs     CH    CL    CX
    are – AX, BX, CX, DX.
                                 DH    DL    DX
Flag Register

 8086 has a 16-bit flag register.
 Contains 9 active flags.
 There are two types of flags in 8086
   Conditional flags – six flags, set or reset by EU on
    the basis of results of some arithmetic operations.
   Control flags – three flags, used to control certain
    operations of the processor.
Bus Interface Unit

 Main Components are
   Instruction Queue
   Segment Registers
   Instruction Pointer
Memory
              ∑                                      Interface


  EXTRA SEGMENT (ES)                                    BIU
  CODE SEGMENT (CS)
                             6   5   4   3   2   1
  STACK SEGMENT (SS)
  DATA SEGMENT (DS)          Instruction
INSTRUCTION POINTER (IP)     Queue



                                                     Instruction
                                                      Decoder
    AH            AL
    BH            BL       ARITHMETIC
    CH            CL       LOGIC UNIT
                                                      CONTROL
    DH            DL                                   SYSTEM
   STACK POINTER (SP)
   BASE POINTER (BP)       OPERANDS
   SOURCE INDEX (SI)         FLAGS
                                                        EU
 DESTINATION INDEX (DI)
Instruction Queue
 8086 employs parallel processing.
 When EU is busy decoding or executing current
  instruction, the buses of 8086 may not be in use.
 At that time, BIU can use buses to fetch upto six
  instruction bytes for the following instructions.
 BIU stores these pre-fetched bytes in a FIFO
  register called Instruction Queue.
 When EU is ready for its next instruction, it
  simply reads the instruction from the queue in
  BIU.
Pipelining

 EU of 8086 does not have to wait in
  between for BIU to fetch next instruction
  byte from memory.
 So the presence of a queue in 8086 speeds
  up the processing.
 Fetching the next instruction while the
  current instruction executes is called
  pipelining.
Memory Segmentation

 8086 has a 20-bit address bus
 So it can address a maximum of 1MB of
  memory
 8086 can work with only four 64KB segments
  at a time within this 1MB range
 These four memory segments are called
     Code segment
     Stack segment
     Data segment
     Extra segment
Memory
        64KB Memory             1      0000016
        Segment                 2

                                3
                                4
                                4

                                5
Only 4 such segments can be     6
addressed at a time             7

                                8
                                        1MB
                                9
                                        Address
                                10      Range
                                11

                                12

                                13

                                14

                                15

                                16     FFFFF16
Code Segment
 That part of memory from where BIU is
  currently fetching instruction code bytes.
              Stack Segment
A section of memory set aside to store
 addresses and data while a subprogram
 executes.
        Data & Extra Segments
Used for storing data values to be used in the
 program.
Memory
Code Segment      1      0000016
                  2

                  3

                  4
 Data & Extra     5

 Segments         6

                  7

                  8
                          1MB
                  9       Address
                  10      Range
                  11

                  12

                  13

                  14

                  15

Stack Segment     16     FFFFF16
Instruction Pointer (IP)
  Register

 a 16-bit register.
 Holds 16-bit offset, of the next instruction byte
  in the code segment.
Stack Segment (SS) Register
 Stack Pointer (SP) Register


 It is located in BIU.
 SP register holds a 16-bit offset from the start
  of stack segment.
 It is located in EU
Other Pointer & Index
Registers
 Base Pointer (BP) register.
 Source Index (SI) register.
 Destination Index (DI) register.


 Can be used for temporary storage of data
 Main use is to hold data in one of the
  segments.
Introduction to 32
bit(80386) Microprocessor




  Presented by- Muhammad Shuaib Aslam
  2009-CPE-15
  Department of Computer Engineering UCE&T
  Multan
Microprocessor

 Microprocessor is multipurpose, programmable
 logic device that reads the binary instruction from
 storage device called memory, accepts the binary
 data as input and processes data according to those
 instructions, and provides the results as output.
 Actually microprocessor is a semiconductor chip
 consisting of electronic circuit. It is capable of
 performing various computing functions and making
 decisions to change the sequence of program
 Execution.
 Microprocessor is broadly divided into three parts.
 Arithmetic logic Unit :
 Arithmetic logic unit, the part of a computer that performs all
    arithmetic computations, such as addition and multiplication,
    and all comparison operations. The ALU is one component of
    the CPU (central processing unit).
 Registers:
 A register is one of a small set of data holding places that are
  part of a computer processor . A register may hold a
  computer instruction , a storage address, or any kind of data
 Control Unit :
 The control unit is the circuitry that controls the flow of
  information through the processor, and coordinates the
  activities of the other units within it.

History of 80386
   The Intel 80386, also known as the i386, or just 386, was a
    32-bit microprocessor introduced by Intel in 1985. The first
    versions had 275,000 transistors and were used as the
    central processing unit (CPU) of many workstations and
    high end personal computers of the time.
   The 80386 could correctly execute most code intended for
    earlier 16-bit x86 processors such as the 8088 and 80286
    that. Following the same tradition, modern 64-bit x86
    processors are able to run most programs written for older
    chips, all the way back to the original 16-bit 8086 of 1978.
    Over the years, successively newer implementations of the
    same architecture have become several hundreds of times
    faster than the original 80386 (and thousands of times
    faster than the 8086).
 The 80386 was launched in October 1985, but full-
  function chips were first delivered in the third quarter of
  1986. Mainboards for 80386-based computer systems
  were and expensive at first, but manufacturing was
  rationalized upon the 80386's mainstream adoption.
  The first personal computer to make use of the 80386
  was designed and manufactured by Compaq and
  marked the first time a fundamental component in the
  IBM PC compatible de facto-standard was updated by a
  company other than IBM.
 In May 2006, Intel announced that 80386 production
  would stop at the end of September 2007Although it
  had long been obsolete as a personal computer CPU,
  Intel and others had continued making the chip for
  embedded systems. Such systems using an 80386 or
  one of many derivatives are common in aerospace
  technology, among others.
•The Instruction unit decodes the opcode bytes received
from the 16-byte instruction code queue and arranges
them in a 3- instruction decoded instruction queue.
•After decoding them pass it to the control section for
deriving the necessary control signals. The barrel shifter
increases the speed of all shift and rotate operations.
• The multiply / divide logic implements the bit-shift-rotate
algorithms to complete the operations in minimum time.
•Even 32- bit multiplications can be executed within one
microsecond by the multiply / divide logic.
THE END
Gursharan Singh Tatla
                    mailme@gursharansingh.in 56
www.eazynotes.com

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MicroProcessors

  • 1.
  • 3. Muhammad Umar Riaz Muhammad Uzair Rasheed Muhammad Shuaib Aslam
  • 4. Topic : Microprocessor  8 Bit  16 Bit  32 Bit 4
  • 5. Introduction to 8 bit(8085) Microprocessor  Presented by- Muhammad Umar Riaz  2009-CPE-30  Department of Computer Engineering UCE&T Multan
  • 6. Microprocessor  Brain of the computer  silicon chip that contains a CPU  First microprocessors emerged in the early 1970.  A microprocessor is designed to perform arithmetic and logic operations
  • 8.
  • 9. INTRODUCTION The features of INTEL 8085 are : • It is an 8 bit processor. • It is a single chip N-MOS device with 40 pins. • It has multiplexed address and data bus.(AD0-AD7). • It works on 5 Volt dc power supply. • The maximum clock frequency is 3 MHz while minimum frequency is 500kHz. • It provides 74 instructions with 5 different addressing modes.
  • 10. 8085 INTRODUCTION  It provides 16 address lines so it can access 2^16 =64K bytes of memory.  It generates 8 bit I/O address so it can access 2^8=256 input ports. It provides Acc ,one flag register ,6 general purpose registers and two special purpose registers(SP,PC).  It provides serial lines SID ,SOD.So serial peripherals can be interfaced with 8085 directly.
  • 12. Arithmetic and Logical group Accumulator: It is 8 bit general purpose register.  It is connected to ALU.  So most of the operations are done in Acc. Temporary register: It is not available for user  All the arithmetic and logical operations are done in the temporary register but user can’t access it. Flag: It is a group of 5 flip flops used to know status of various operations done.  The Flag Register along with Accumulator is called PSW or Program Status Word.
  • 13. Arithmetic and Logical group Flag Register is given by: S Z X AC X P X CY S:Sign flag is set when result of an operation is negative. Z:Zero flag is set when result of an operation is 0. Ac:Auxiliary carry flag is set when there is a carry out of lower nibble or lower four bits of the operation. CY:Carry flag is set when there is carry generated by an operation. P:Parity flag is set when result contains even number of 1’s. Rest are don’t care flip flops.
  • 14. Register Group  Temporary registers (W,Z):These are not available for user. These are loaded only when there is an operation being performed.  General purpose:There are six general purpose registers in 8085 namely B,C,D,E,H,L.These are used for various data manipulations.  Special purpose :There are two special purpose registers in 8085: 1. SP :Stack Pointer. 2. PC:Program Counter.
  • 15. Register Group Stack Pointer: This is a temporary storage memory 16 bit register. Since there are only 6 general purpose registers, there is a need to reuse them .  Whenever stack is to be used previous values are PUSHED on stack and then after the program is over these values are POPED back. Program Counter: It is 16 bit register used to point the location from which the next instruction is to be fetched.  When a single byte instruction is executed PC is automatically incremented by 1.  Upon reset PC contents are set to 0000H and next instruction is fetched onwards.
  • 16. INSTRUCTION REGISTER,DECODER & CONTROL  Instruction register:When an instruction is fetched , it is executed in instruction register.This register takes the Opcode value only.  Instruction decoder: It decodes the instruction from instruction register and then to control block.  Timing and control:This is the control section of µP.It accepts clock input .
  • 17. INSTRUCTIONS SET OF 8085 DATA TRANSFER GROUP MOV Rd, Rs.(Move data from Rs to Rd). Example: MOV C,B. Move the content of register B to C. Initially After execution B=10H. B=10H. C=20H. C=10H. Flags Affected :No flags affected. Addressing mode: Register.
  • 18. ARITHMETIC GROUP ADD R (ADD register content with Acc and result in A ). Example: ADD C. (ADD the content of C with A). Suppose the Data at C register is 10H. Initially After execution . C= 10H ,A=10H A=20H,C=10H. Flags Affected :All flags are modified. Addressing mode: Register
  • 19. LOGICAL GROUP ANA R (Logically AND register content with Acc and result in A ). Example: ANA C (AND the content of C with A). Suppose the Data at C register is 10H. Initially After execution C= 10H ,A=10H A=10H,C=10H. Flags Affected :S,Z,P are modified Cy=reset,AC=set. Addressing mode:Register.
  • 20. 8085 Memory Interfacing • Generally µP 8085 can address 64 kB of memory . • Generally EPROMS are used as program memory and RAM as data memory. • We can interface Multiple RAMs and EPROMS to single µP . • Memory interfacing includes 3 steps : 1. Select the chip. 2. Identify register. 3. Enable appropriate buffer.
  • 21. 8085 Memory Interfacing  The diagram of 2k interfacing is shown below: 3:8DECODER A15- A11 8085 CS A15-A8 ALE A10- A0 2K Byte Latch Memory AD7-AD0 A7- A0 Chip WR RD IO/M D7- D0 RD WR
  • 22. 8085 Memory Interfacing •In this example we saw that some address lines are used for interfacing while others are for decoding. •It is called absolute decoding. •We sometimes don’t requires that many address lines.So we ignore them.But this may lead to shadowing or multiple address. •This type of decoding is called linear decoding or partial decoding. •In partial decoding wastage of address takes place but it requires less hardware and cost is also less as compared with absolute one.
  • 23. Introduction to 16 bit(8086) Microprocessor  Presented by- Muhammad Uzair Rasheed  2009-CPE-03  Department of Computer Engineering UCE&T BZU Multan
  • 24. The first 16 bit Microprocessor 8080  16-bit address bus (1974)  Used in Altair computer  (early hobbyist PC)  Characteristics  6 m process  4500 transistors  2 MHz  8-bit word size
  • 25. 8086 / 8088  16-bit processor (1978-9)  IBM PC and PC XT  Revolutionary products  Characteristics  3 m process  29k transistors  5-10 MHz  16-bit word size Slid e 25
  • 26. 16 bit Microprocessor(8086)  INTEL launched 8086 in 1978  8086 is a 16-bit microprocessor with  16-bit Data Bus  20-bit Address Bus
  • 27. 8086 Internal Architecture  8086 employs parallel processing  8086 CPU has two parts which operate at the same time  Bus Interface Unit  Execution Unit 8086 CPU  CPU functions Bus Interface 1. Fetch Unit (BIU) 2. Decode Execution Unit 3. Execute (EU)
  • 28. Bus Interface Unit  Sends out addresses for memory locations.  Fetches Instructions from memory.  Reads/Writes data to memory.  Sends out addresses for I/O ports.  Reads/Writes data to Input/Output ports.
  • 29. Execution Unit  Tells BIU (addresses) where to fetch instructions or data.  Decodes & Executes instructions.
  • 31. Memory ∑ Interface EXTRA SEGMENT (ES) BIU CODE SEGMENT (CS) 6 5 4 3 2 1 STACK SEGMENT (SS) DATA SEGMENT (DS) Instruction INSTRUCTION POINTER (IP) Queue Instruction Decoder AH AL BH BL ARITHMETIC CH CL LOGIC UNIT CONTROL DH DL SYSTEM STACK POINTER (SP) BASE POINTER (BP) OPERANDS SOURCE INDEX (SI) FLAGS EU DESTINATION INDEX (DI)
  • 32. Execution Unit  Main components are  Instruction Decoder  Control System  Arithmetic Logic Unit  General Purpose Registers  Flag Register  Pointer & Index registers
  • 33. Instruction Decoder  Translates instructions fetched from memory into a series of actions which EU carries out. Control System Generates control signals to perform the internal operations of the microprocessor. Arithmetic Logic Unit EU has a 16-bit ALU which can ADD, SUBTRACT, AND, OR, increment, decre ment, complement.
  • 34. General Purpose Registers  EU has 8 general purpose AH AL registers. BH BL  Can be individually used for storing 8-bit data. CH CL  AL register is also called DH DL Accumulator.  Two registers can also be AH AL AX combined to form 16-bit BH BL BX registers.  The valid register pairs CH CL CX are – AX, BX, CX, DX. DH DL DX
  • 35. Flag Register  8086 has a 16-bit flag register.  Contains 9 active flags.  There are two types of flags in 8086  Conditional flags – six flags, set or reset by EU on the basis of results of some arithmetic operations.  Control flags – three flags, used to control certain operations of the processor.
  • 36. Bus Interface Unit  Main Components are  Instruction Queue  Segment Registers  Instruction Pointer
  • 37. Memory ∑ Interface EXTRA SEGMENT (ES) BIU CODE SEGMENT (CS) 6 5 4 3 2 1 STACK SEGMENT (SS) DATA SEGMENT (DS) Instruction INSTRUCTION POINTER (IP) Queue Instruction Decoder AH AL BH BL ARITHMETIC CH CL LOGIC UNIT CONTROL DH DL SYSTEM STACK POINTER (SP) BASE POINTER (BP) OPERANDS SOURCE INDEX (SI) FLAGS EU DESTINATION INDEX (DI)
  • 38. Instruction Queue  8086 employs parallel processing.  When EU is busy decoding or executing current instruction, the buses of 8086 may not be in use.  At that time, BIU can use buses to fetch upto six instruction bytes for the following instructions.  BIU stores these pre-fetched bytes in a FIFO register called Instruction Queue.  When EU is ready for its next instruction, it simply reads the instruction from the queue in BIU.
  • 39. Pipelining  EU of 8086 does not have to wait in between for BIU to fetch next instruction byte from memory.  So the presence of a queue in 8086 speeds up the processing.  Fetching the next instruction while the current instruction executes is called pipelining.
  • 40. Memory Segmentation  8086 has a 20-bit address bus  So it can address a maximum of 1MB of memory  8086 can work with only four 64KB segments at a time within this 1MB range  These four memory segments are called  Code segment  Stack segment  Data segment  Extra segment
  • 41. Memory 64KB Memory 1 0000016 Segment 2 3 4 4 5 Only 4 such segments can be 6 addressed at a time 7 8 1MB 9 Address 10 Range 11 12 13 14 15 16 FFFFF16
  • 42. Code Segment  That part of memory from where BIU is currently fetching instruction code bytes. Stack Segment A section of memory set aside to store addresses and data while a subprogram executes. Data & Extra Segments Used for storing data values to be used in the program.
  • 43. Memory Code Segment 1 0000016 2 3 4 Data & Extra 5 Segments 6 7 8 1MB 9 Address 10 Range 11 12 13 14 15 Stack Segment 16 FFFFF16
  • 44. Instruction Pointer (IP) Register  a 16-bit register.  Holds 16-bit offset, of the next instruction byte in the code segment.
  • 45. Stack Segment (SS) Register Stack Pointer (SP) Register  It is located in BIU.  SP register holds a 16-bit offset from the start of stack segment.  It is located in EU
  • 46. Other Pointer & Index Registers  Base Pointer (BP) register.  Source Index (SI) register.  Destination Index (DI) register.  Can be used for temporary storage of data  Main use is to hold data in one of the segments.
  • 47. Introduction to 32 bit(80386) Microprocessor  Presented by- Muhammad Shuaib Aslam  2009-CPE-15  Department of Computer Engineering UCE&T Multan
  • 48. Microprocessor  Microprocessor is multipurpose, programmable  logic device that reads the binary instruction from  storage device called memory, accepts the binary  data as input and processes data according to those  instructions, and provides the results as output.  Actually microprocessor is a semiconductor chip  consisting of electronic circuit. It is capable of  performing various computing functions and making  decisions to change the sequence of program  Execution.
  • 49.  Microprocessor is broadly divided into three parts.  Arithmetic logic Unit :  Arithmetic logic unit, the part of a computer that performs all arithmetic computations, such as addition and multiplication, and all comparison operations. The ALU is one component of the CPU (central processing unit).  Registers:  A register is one of a small set of data holding places that are part of a computer processor . A register may hold a computer instruction , a storage address, or any kind of data  Control Unit :  The control unit is the circuitry that controls the flow of information through the processor, and coordinates the activities of the other units within it. 
  • 50. History of 80386  The Intel 80386, also known as the i386, or just 386, was a 32-bit microprocessor introduced by Intel in 1985. The first versions had 275,000 transistors and were used as the central processing unit (CPU) of many workstations and high end personal computers of the time.  The 80386 could correctly execute most code intended for earlier 16-bit x86 processors such as the 8088 and 80286 that. Following the same tradition, modern 64-bit x86 processors are able to run most programs written for older chips, all the way back to the original 16-bit 8086 of 1978. Over the years, successively newer implementations of the same architecture have become several hundreds of times faster than the original 80386 (and thousands of times faster than the 8086).
  • 51.
  • 52.  The 80386 was launched in October 1985, but full- function chips were first delivered in the third quarter of 1986. Mainboards for 80386-based computer systems were and expensive at first, but manufacturing was rationalized upon the 80386's mainstream adoption. The first personal computer to make use of the 80386 was designed and manufactured by Compaq and marked the first time a fundamental component in the IBM PC compatible de facto-standard was updated by a company other than IBM.  In May 2006, Intel announced that 80386 production would stop at the end of September 2007Although it had long been obsolete as a personal computer CPU, Intel and others had continued making the chip for embedded systems. Such systems using an 80386 or one of many derivatives are common in aerospace technology, among others.
  • 53.
  • 54. •The Instruction unit decodes the opcode bytes received from the 16-byte instruction code queue and arranges them in a 3- instruction decoded instruction queue. •After decoding them pass it to the control section for deriving the necessary control signals. The barrel shifter increases the speed of all shift and rotate operations. • The multiply / divide logic implements the bit-shift-rotate algorithms to complete the operations in minimum time. •Even 32- bit multiplications can be executed within one microsecond by the multiply / divide logic.
  • 56. Gursharan Singh Tatla mailme@gursharansingh.in 56 www.eazynotes.com