Mr. Vengineer
72
Seguidores
Personal Information
Organização/Local de trabalho
Japan Japan
Cargo
Computer Engineer
Setor
Electronics / Computer Hardware
Sobre
Buidling Verification Environment with SystemVerilog, C/C++ and SystemC
Development of Tools for ASIC/FPGA Verification using C/C++, Perl and Ruby
Development of Device Driver for PCIe board using Altera FPGA
MultiCore/GPU Programming for Image Processing
Specialties: Verification for Unit, Chip and System using Verilog HDL, PLI, SystemVerilog, DPI-C and SystemC
Marcadores
tensorflow
deep learning
xilinx
fpga
linux
device driver
gpu
systemverilog
zynqmp
arm
sdsoc
intel
arm trusted firmware
verilog hdl
edge tpu
tensorflow lite
python
cpu
android
llvm
verilog
zynq mpsoc
zynq
armv8
verilator
tensorflow xla
c++
google
image processing
aot
xla
jit
ibm capi
altera
vivado hls
simulation
modelsim
capi
ibm
xeon
tegra
soc
atf
systemc
systemverilog dpi
chise
tvm
jax
cloud tpu
cloud
chip
pixel
tfug
tpu
pytorch
ultra96
96boards
rpc
multicore
ngraph
parallel programming
cuda
multi core
facebook
testbench
aws
vivante
ceva
dsp
dmp
cadence
verisilicon
cnn
bare metal
aarch64
pynq
boot
riscv
u-boot
nvidia
bl31
afu
hdl
sdaccel
accelerator
power8
opencl
software
ubuntu
aal
accelerator abstraction layer
broadwell
arria10
シミュレーション
検証
デバイスドライバ
simulator
hw/sw verification
シミュレータ
qemu
verification
altera opencl fpga
altera fpga opencl
tegra-x1
mediatek
tegra-k1 denvor
mk8173
cortex-a53
fsbl
secure monitor call
secure monitor
smc
psci
jumo
scpi
scp
amlogic
mailbox
s905
#zynq #zynqmp #xilinx #armv8 #cortexa53 #fsbl
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