2. PROCESSOR ORGANIZATION
Control Unit –
A control unit (CU) handles all processor control
signals. It directs all input and output flow, fetches
the code for instructions and controlling how data
moves around the system.
Arithmetic and Logic Unit (ALU) –
The arithmetic logic unit is that part of the CPU
that handles all the calculations the CPU may need,
e.g. Addition, Subtraction, Comparisons. It performs
Logical Operations, Bit Shifting Operations, and
Arithmetic Operation.
3. •Main Memory Unit (Registers) –
• Accumulator: Stores the results of calculations made by ALU.
• Program Counter (PC): Keeps track of the memory location of the
next instructions to be dealt with. The PC then passes this next
address to Memory Address Register (MAR).
• Memory Address Register (MAR): It stores the memory locations
of instructions that need to be fetched from memory or stored into
memory.
• Memory Data Register (MDR): It stores instructions fetched from
memory or any data that is to be transferred to, and stored in,
memory.
• Current Instruction Register (CIR): It stores the most recently
fetched instructions while it is waiting to be coded and executed.
• Instruction Buffer Register (IBR): The instruction that is not to be
executed immediately is placed in the instruction buffer register IBR.
4. simplified view of a processor, indicating its connection to the rest of the system via the system
bus.
5. •Input/Output Devices – Program or data is read into main memory from
the input device or secondary storage under the control of CPU input
instruction. Output devices are used to output the information from a
computer.
•Buses – Data is transmitted from one part of a computer to another,
connecting all major internal components to the CPU and memory, by the
means of Buses. Types:
• Data Bus: It carries data among the memory unit, the I/O devices, and
the processor.
• Address Bus: It carries the address of data (not the actual data)
between memory and processor.
• Control Bus: It carries control commands from the CPU (and status
signals from other devices) in order to control and coordinate all the
activities within the computer.
6. DATA PATH
• Sometimes processor organization is also called DATAPATH
To perform its micro operations directly, computer systems
often employ a number of storage registers in
• conjunction with a shared operation unit called an
arithmetic/logic unit, ALU.
• To perform a micro operation, the contents of specified
source registers are applied to the inputs of the shared
• ALU.
• The ALU performs an operation, and the result of this
operation is transferred to a destination register.
• With the ALU as a combinational circuit, the entire register
transfer operation from the source registers, through the
• ALU, and into the destination register is performed during
one clock cycle.
• The shift operations are often performed in a separate unit,
but sometimes these operations are also implemented
• within the ALU.
• The data path and the control unit are the two parts of the
processor, or CPU, of a computer.
• In addition to the registers, the datapath contains the digital
logic that implements the various microoperations.
7. SHIFTER
◦ A shift register is a group of flip-flops, wherein all flip-flops have been
inter-connected in such a manner that a binary number can be shifted both
inside or outside these flip-flops. In other words, a group of inter-
connected flip-flops, on which binary number or binary information can be
shifted both inside or outside of these flip-flops, is called shift register. A
shift register is also a storage device, wherein binary data or digital
information is stored. This device is designed in such a manner that its
stored bits can be shifted or transmitted from one flip-flop to another flip-
flop
9. 4-BIT BARREL SHIFTER
Barrel shifter is a digital circuit that can shift a data word by a specified
number of bits without the use of any sequential logic, only pure
combinational logic, i.e. it inherently provides a binary operation. It can
however in theory also be used to implement unary operations, such as
logical shift left, in cases where limited by a fixed amount (e.g. for
address generation unit). One way to implement a barrel shifter is as a
sequence of multiplexers where the output of one multiplexer is
connected to the input of the next multiplexer in a way that depends on
the shift distance. A barrel shifter is often used to shift and rotate n-bits
in modern microprocessors,[1] typically within a single clock cycle.
10. REDUCED DATA PATH PRRSENTATION
• The datapath includes the registers, selection logic
for the registers, the ALU, the shifter, and three
additionalmultiplexers.
• it is important to reduce the complexity of the
datapath.
• A set of registers having common microoperations
performed on them may be organized into a
register file.
• The typical register file is a special type of fast
memory that permits one or more words to be
read and one or more
11. ◦ Memory- register files, the A select, B select, and Destination select
inputs in the figure become three addresses
◦ the A address accesses a word to be read onto A data, the B
address accesses a second word to be read onto B
◦ data, and the D address accesses a word to be written into from D
data.
◦ All of these accesses occur in the same clock cycle. A Write input
corresponding to the Load Enable signalis also provided.
◦ When Load Enable signal at 1, the Write signal permits registers to
be loaded during the current clock cycle, when at 0, prevents
register loading.
12. • The status bits are assumed to be
meaningless when the shifter is selected,
although in a more complex system,
• shifter status bits can be designed to replace
those for the ALU whenever a shifter
microoperation is specified.
• status bit implementation depends on the
specific implementation that has been used
for the arithmetic circuit.
• Alternative implementations may not produce
the same results.
