Megamodeling of Complex, Distributed, Heterogeneous CPS Systems

Megamodeling of complex,
distributed, heterogeneous CPS
systems
Eugenio Villar
University of Cantabria

Agenda
▪ Introduction
▪ Single-Source Design Approach
▪ Model-driven Analysis and Design for the IoE
▪ Conclusions

Introduction
▪ Model-Driven Design (MDD)
▪ High-abstraction level
▪ Mature SW engineering methodology
▪ State-of-the-Art
▪ Matlab-Simulink
▪ Proprietary, only one MoC, M language
▪ CoFluent
▪ Proprietary, a few MoCs, C/C++ language
▪ Ptolemy II
▪ Academic, any MoC, C/C++ inside a Java block
▪ …

Introduction
▪ UML
▪ Standard, any (user-defined) MoC, any language
▪ Natural way to capture system architecture
N2 BN1
M A
▪ Semantic lacks
▪ Domain-specific profiles
▪ MetaMorph
▪ OpenSource, any (user-defined) MoC, language agnostic

C/C++,…
Autosar RTE
UML
ES DSLs
HTML5,…
Java,…
Dalvik VM,…
UML
SmartPhone
DSLs
Introduction
Java,…
MPI,…
UML
DC DSLs
ADA,…
C/C++,…
MCAPI,…
UML
ES DSLs

Single-Source Embedded System Design
ADA,…
C/C++,…
MCAPI,…
UML
MARTE
Schedulability
Analysis
Simulation
Verification
Performance
Analysis
Design-Space
Exploration
Architectural
Mapping
Security
Safety
HW
Synthesis
SW
Synthesis
▪ S3D

Model-Driven Analysis and Design of IoT Systems
▪ Programming the Internet of Everything
▪ Services provided on computing platforms of many kind

Model-Driven Analysis and Design for the IoE
C/C++,…
Autosar RTE
ForTran,…
Python,…
MPI,…
Java,…
MPI,…
C/C++,…
MCAPI,…
HTML5,…
Java,…
Dalvik VM,…
UML
DC DSLs
UML
ES DSLs
UML
SmartPhone
DSLs
Service
UML
ES DSLs
UML
CPSoS DSL

Model-Driven Analysis and Design for the IoE
HW
Synthesis
SW
Synthesis
(RT)OS,
Runtime,…
Corba, TCP/IP,
MPI, MCAPI,…
ForTran,
Python, Java,
HTML5,
C/C++,…
Concerns
Performance,
safety, cost,
security, size,
…
Schedulability
Analysis
Simulation
Verification
Performance
Analysis
Design-Space
Exploration
Optimization
Service
UML
CPSoS DSL

MD Analysis & Design: Component-Based
▪ UML/MARTE System Modeling Methodology
▪ Platform-Independent
▪ Component-Based
▪ Supporting
▪ Object-Orientation
▪ Actor-Orientation
required
interface
Component 1
Component 3
Component 2
Port 3.1
Port 3.2 Port 2.1Port 2.2
Port 1
provided
interface
required
interface
provided
interface
required
interface
OO
CB
AO

MD Analysis & Design: Component-Based
▪ Component-Based
▪ Supporting
▪ Reusable
▪ Scalable
▪ Hierarchical
▪ Functionality

MD Analysis & Design: Scalability
▪ Component-Based
▪ Supporting
▪ Reusable
▪ Scalable
▪ Hierarchical
▪ Functionality
▪ Execution Platform

MD Analysis & Design: Scalability
▪ Component-Based
▪ Supporting
▪ Reusable
▪ Library-based
▪ Scalable
▪ Hierarchical
▪ Functionality

MD Analysis & Design: Reusability
▪ Component-Based
▪ Supporting
▪ Reusable
▪ Library-based
▪ Interface Inheritance
▪ Scalable
▪ Hierarchical
▪ Functionality
Generic
Component
getDBRunway(in airport: Echar, in runway: Echar): D_FlWaypoint
getAirport(in airport: Echar)
getRunway(in runway: Echar)
getRunway(): D_FlWaypoint
Application
Component

MD Analysis & Design: Flexibility
▪ Component-Based
▪ Supporting
▪ Reusable
▪ Library-based
▪ Interface Inheritance
▪ Scalable
▪ Hierarchical
▪ Functionality
▪ Flexible

▪ Supporting different Models of Computation & Communication
▪ Properties of the Provided Port
▪ NotAttendedService
▪ Retry
▪ Properties of the Interface Methods
▪ concurrency
▪ exekind
▪ syncKind
▪ Properties of the Required Port
▪ queueSize
▪ FullPoolPolicy

▪ Function Call/RPC/RMI
▪ Rendezvous
Required Port RtService Provided Port
MoCNotAttendedService retry concurrency exekind syncKind queueSize FullPoolPolicy
infiniteWait none G or C rem.Im. sync. none none exactly once
infiniteWait none G or C rem.Im. async. none none at most once
dynamic none G or C rem.Im. sync. none none exactly once
dynamic none G or C rem.Im. async. none none at most once
timedWait 0 G or C rem.Im. sync. none none exactly once
timedWait 0 G or C rem.Im. async. none none at most once
timedWait > 0 G or C rem.Im. sync. none none at least once
timedWait > 0 G or C rem.Im. async. none none maybe once
infiniteWait none G or C rem.Im. rendezvous none none CSP
timedWait 0 G or C rem.Im. rendezvous none none RV
timedWait > 0 G or C rem.Im. rendezvous none none RV

▪ Data-Flow
▪ Discrete-Event/Time-Triggered/Timed Data-Flow
infiniteWait none G or C deferred async. > 0 block KPN/SDF
infiniteWait none G or C deferred async. > 0 (any other) DF
dynamic none G or C deferred async. > 0 any DF
timedWait 0 G or C deferred async. > 0 any DF
timedWait > 0 G or C deferred async. > 0 any DF
dynamic none G or C rem.Im. async. none none DE/TT/TDF

Design-Space Exploration & Optimization
▪ Architectural (Functional) Design
▪ Code Reuse and/or Development
▪ Platform Independent
▪ Architectural Mapping
▪ HW/SW Execution Platform

Model-Driven Performance Analysis
▪ Problem Statement
▪ Fast Simulation & Performance Analysis
▪ Before full SW Development
▪ Native Simulation
▪ Host-Compiled

▪ Native Simulation
…
Overflow = 0;
s = 1L;
for (i = 0; i < L_subfr; i++) {
Carry = 0;
s = L_macNs(s, xn[i], y1[i]);
if (Overflow != 0) {
break; }}
if (Overflow == 0) {
exp_xy = norm_l(s);
if (exp_xy<=0)
xy = round(L_shr (s, -exp_xy));
else
xy = round(L_shl (s, exp_xy)); }
mutex_lock(mutex_name);
…
Global variable
int Sim_Time = 0;
Sim_Time += TB();
Sim_Time += TB();
Sim_Time += TB();
Sim_Time += TB();
Sim_Time += TB();
Sim_Time += TB();
wait included
TB() is a function of
# of binary instructions
type of instructions
# of cache misses
frequency
even
data dependencies
Sim_Time += TSYS();
TSYS() is a function of
preemptions
conflicts in the bus
Model-Driven Performance Analysis

▪ CPS: Digital Behavior in a Physical World
▪ System Model (Specification)
▪ The implementation is as good as similar to the model
▪ Environment Model
▪ The model is as good as similar to reality
Model-Driven Design Verification

▪ Timing Constraints Specification
Model-Driven Design Verification

▪ Functional synthesis
▪ ‘main’ functions
▪ Static concurrency
▪ Platform-Specific code
▪ Optimized C code for DSPs
▪ OpenCL/GL for GPUs
▪ C/C++ & OpenMP for SMPs…
C3
DSP
optimized
C code
OpenCL/GL
code for
GPU
Platform-
Independent
C code
Communication Infrastructure
Memory Space
OS
GPU
SMP
node
DSP
Model-Driven SW Synthesis

▪ Communication synthesis
▪ Architectural mapping
▪ Memory space
▪ OS
▪ Processing node
▪ Communication Protocols
▪ MPI
▪ MCAPI
▪ TCP/IP…
▪ Benefits / Drawbacks
▪ Communication Speed
▪ Memory protection
▪ Memory/cache use
▪ Scheduling
▪ Parallelism…
25
Model-Driven SW Synthesis

Conclusions
▪ The IoE demands new CPSoS design methods and tools
▪ Model-Driven system design is a powerful candidate
▪ A CPSoS system modeling language is required
▪ Supporting Mega-Modeling
▪ Analysis & design of the whole IoE service
▪ Single-Source Approach

S3D Demo
▪ Flight Management System Model
UML-MARTE MODEL

S3D Demo
▪ Simulation and Verification
SIMULATIONVERIFICATION

Megamodeling of Complex, Distributed, Heterogeneous CPS Systems

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