2. CONTENTS
Sr. No. TOPIC SLIDE NO.
1. Objective 2
2. Introduction to Mobile Communication 4
3. Frequency Hopping Spread Spectrum 7
4. Software Packages 15
5. Further Progress 17
12/9/2016REVIEW 1 2
3. OBJECTIVE
• The aim is to design and innovate the mobile security algorithm
to one step ahead.
• This is accomplished using the various technique, so on the
bases of advantages favoured by the user as well as the
surroundings a technique called as Spread spectrum is used.
• This is then encrypted with efficient coding that ensures proper
data transmission in a safe and secure manner
12/9/2016REVIEW 1 3
4. INTRODUCTION TO MOBILE
COMMUNICATION
• Basically two types of communication: Satellite & Mobile
• Evolution of technology has increased the utility as well as
demand
• Data rate, Bandwidth, Frequency are the concerned areas for
the improvisation
• Various modulation technique: BPSK, QPSK, DSSS, QAM, FHSS
etc.
• looking for the accurate connection, we chose the method of
Spread Spectrum
12/9/2016REVIEW 1 4
8. EXPLANATION OF FHSS BD
STEP 1:
• The input to the channel in real time is the voice. The voice is 4 KHZ in real
time and so as per Nyquist rule we sample it at 8 KHZ to get the digital
sequence followed by a Low Pass Filter
• So now we have our input data as digital sequence of voice centred at 8 KHZ
frequency. The next part is to do the suitable channel encoding.
• The complete circuit for the input data can be traced to the usage of
operational amplifier with a voice sensor for the input.
12/9/2016REVIEW 1 8
9. EXPLANATION OF FHSS BD
• Step 2: The channel encoder
• Channel encoding is technique where suitable code is used to
define the channel for the transmission. There can be various
technique to this.
• Manchester, Hamming, etc are the various types of coding. To
keep the simplicity we will go with the Pseudorandom code.
• In practice we will generate the code using the Linear Feedback
Shift Register
12/9/2016REVIEW 1 9
10. EXPLANATION OF FHSS BD
• Step 3:
• So now we come to the third step that is modulation of the
signal. So far we have taken the input data and sampled it at
8KHZ frequency to get the digital wave form.
• This signal is then encoded with pseudorandom code using the
LFSR register
• The next we do the modulation of the signal. For this we
choose the technique of BPSK modulation.
12/9/2016REVIEW 1 10
11. EXPLANATION OF FHSS BD
• The BPSK modulation is also called as Binary Phase Shift Keying.
To explain in simple words we take the signal as two
components
• One is the Ac cos(2πfct) and –( Ac cos(90 + 2πfct) )
• This symbols when plot on graph paper will have two different
quadrants, one being the I-Quadrant and the other being the
II-Quadrant
• Thus we have to symbols almost 180 degree apart
• The advantage is the Bit Error Rate is high and so it is a robust
signal modulation technique
12/9/2016REVIEW 1 11
12. EXPLANATION OF FHSS BD
• The question comes how to practically implement a BPSK
signal? The answer is using an operational amplifier
• In market we get an IC CD4016 which is useful in getting the
desired signal
• With little improvisation in the circuit we can achieve a better
signal
• The next two slide shows the block diagram for the BPSK signal
modulator and Frequency hopping Synthesizer respectively
12/9/2016REVIEW 1 12
15. EXPLANATION OF FHSS BD
• Step 4: The frequency Hopping
• By the end of step 3 we have a refined BPSK signal which can be
smoothened using a Band Pass Filter (BPF) if required.
• Now comes into picture another type of small modulation technique
called as the Spread Spectrum. It can be a Direct Spread Spectrum or
a Frequency Spread Spectrum
• In our case we choose the Frequency Hopping Spread Spectrum.
Before we go into the implementation we will define certain terms
regarding the FHSS technique.
12/9/2016REVIEW 1 15
16. EXPLANATION OF FHSS BD
• The modulator of the FHSS is based on the DDFS which is the Digital
Direct Frequency Synthesizer
• Consider the ISM band of 866.5 + 3.5MHZ is the range. We will aim
to create hop of minimum two symbols at 20 KHZ. Thus we have two
hops per symbol
• To do this we require an oscillator of 866.5 MHZ which can span
range up to 0-3.5 MHZ
• Then next term we define is the SNR which is the ratio of signal
power to noise power 12/9/2016REVIEW 1 16
17. EXPLANATION OF FHSS BD
• With the knowledge of SNR we will define Shannon theorem of
channel capacity
• The Shannon theorem say that in noisy channel the maximum
channel capacity C is defined mathematically as:
C = 𝐵𝑊𝑙𝑜𝑔2 1 + 𝑆𝑁𝑅
Frequency is selected with a 20 bit frequency control word to
obtain a Fclk/2N frequency control resolution, where N is the
number of frequency control bits and Fclk is the sampling
frequency of the DDFS/DAC.
12/9/2016REVIEW 1 17
18. EXPLANATION OF FHSS BD
• Essentially, a modulator consists of a DDFS, a PN code generator and a
mixer. The DDFS creates digital samples of a baseband sinusoidal waveform
by addressing a sine signal at a frequency set by a 20-bit control word.
• The PN code is a random generator code, which corresponds to the hopping
patterns. The mixer selects one of the two codes generated by both PN code
generators.
• The PN code is a random generator code, which corresponds to the hopping
patterns. The mixer selects one of the two codes generated by both PN code
generators.
• he PN code is a random generator code which has a 20 bits length and
works at the rising edge of a clock frequency which is lower than the
sampling frequency. At each clock edge the PN code will generate a binary
word N (frequency control word), which serves as incremental phase for the
DDFS
12/9/2016REVIEW 1 18
19. EXPLANATION OF FHSS BD
• he N binary words are stored in a ROM memory that will be sent to
the DDFS at each clock period. The hardware description and design
of the PN code generation has been done using the VHDL
• DDFS consists of a phase accumulator and a sine/cosine generator.
The phase accumulator input is a frequency control word (Fcw). The
phase accumulator is an overflowing N bit accumulator whose value
specifies the instantaneous phase
• A large phase accumulator is frequently used in DDFS for the fine
frequency resolution at high clock frequency. However, this large
accumulator cannot finish one addition in a small single clock period
because of the delay caused by the carry bits propagating during the
addition.
12/9/2016REVIEW 1 19
20. EXPLANATION OF FHSS BD
• Thus we get the desired FHSS signal hoping at passage of every two
symbols
• This completes our entire Transmission channel for the FHSS
• The next portion is describing the Channel or the medium of
transmission and then will be followed by the Demodulation
technique
• Next slide is the simple one page summary for the part of FHSS
generation followed by the Graphical diagram as well as the Matlab
simulation
• For better understanding compare each step with the Matlab image
shown below as it is dissected portion of every step
12/9/2016REVIEW 1 20
21. SUMMARY OF FREQUENCY HOPPING
SPREAD SPECTRUM
• Typically 2k carriers frequencies forming 2k channels
• Channel spacing corresponds with bandwidth of input
• Each channel used for fixed interval
Some number of bits transmitted using some encoding scheme
May be fractions of bit
Sequence dictated by spreading code
• Frequency shifted every Tc seconds
• Slow FHSS has Tc Ts
• Fast FHSS has Tc < Ts
• Generally fast FHSS gives improved performance in noise (or jamming)
12/9/2016REVIEW 1 21
27. SOFTWARE PACKAGES
• So far theoretical learning emphasized on using FHSS as the
efficient technique
• Practically it is done using two important software packages
available in the market: MATLAB & Xilinx
• MATLAB is an important tool as far as communication is
considered. It is versatile and due to ease of matrix forming is
more preferential for all DSP Application
12/9/2016REVIEW 1 27
28. SOFTWARE PACKAGES
• Xilinx-FPGA is an important kit that will practically generate the
FHSS with using specialized development board: Atlys & Vivado
• Xilinx manufacture Spartan series of FPGA, Zynq SOCs and
many CPLDS
• This is more covered in the later section of Projects. Currently
the work is on th MATLAB.
12/9/2016REVIEW 1 28
29. FURTHER PROGRESS
• The next section will improvise the coding scheme and MLSR coding
is taken into consideration. This is more important to understand the
IS-95 standard of CDMA
• With the practical implementation on Xilinx we step up to another
level of implementing the new coding scheme
• The FPGA used is Atlys board XC6SLX45-3CSG324
• The main purpose of using this is the presence of 4 PLL clocks, 58
DSP tool compatibility, 8 Flip-Flops and internal clock speed up to
500 MHz 12/9/2016REVIEW 1 29
30. FURTHER PROGRESS
• The next action to be taken is to get the necessary HOPS in the
FHSS signal with taking noise into consideration
• While experimenting at this point we subsequently change the
input frequency of 8 KHz
• The new operating frequency is (800-1100) MHz
12/9/2016REVIEW 1 30
31. REFERENCES
[1] "Pseudorandom generator theorem," in Wikipedia, Wikimedia Foundation, 2016. [Online].
Available: https://en.wikipedia.org/wiki/Pseudorandom_generator_theorem. Accessed: Sep. 17,
2016.
[2] J. 30, "Pseudo random number generation using linear feedback shift registers - application
note - maxim," 2016. [Online]. Available: https://www.maximintegrated.com/en/app-
notes/index.mvp/id/4400. Accessed: Sep. 17, 2016.
[3] "Phase-shift keying," in Wikipedia, Wikimedia Foundation, 2016. [Online]. Available:
https://en.wikipedia.org/wiki/Phase-shift_keying. Accessed: Sep. 17, 2016.
[4] [Online]. Available: http://patentimages.storage.googleapis.com/US7564929B2/US07564929-
20090721-D00002.png. Accessed: Sep. 17, 2016.
[5] [Online]. Available:
http://patentimages.storage.googleapis.com/US7564929B2/US07564929-20090721-
D00002.png. Accessed: Sep. 17, 2016.
[6] R. W. W. 2012, "Pseudorandom noise sequence basics," 2012. [Online]. Available:
http://www.rfwireless-world.com/source-code/MATLAB/PN-sequence-basics-and-matlab-
code.html. Accessed: Sep. 17, 2016.
12/9/2016REVIEW 1 31