Mais conteúdo relacionado Semelhante a 5 ca-memory structuret (20) 5 ca-memory structuret1. | | (CA: Computer
Architecture)
Memory Management
Structure
3. Agenda
(Background)
(Swapping)
(Contiguous
Allocation)
(Paging)
(Segmentation)
(Segmentation with Paging)
| (OS: Operating Systems) | (Memory Management) | 3
4. Background
(instruction-execution cycle)
(fetch)
decode 1
execution 2
(store)
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5. Background (2)
(machine code)
Input queue
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6. Background (3)
6.1
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7. Background (3)
(run)
Compile time
(absolute address)
Load time
(relocatable)
Execution time
(run
time)
(e.g., base and limit registers)
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8. 6.2
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9. Logical vs. Physical Address Space
Logical address
(virtual
address)
Physical address
(memory-address register)
(logical address space)
(physical address space)
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10. Memory-Management Unit (MMU)
Logical Address
Physical Address
Relocation
MMU
(relocate register)
logical
addresses MMU
real physical
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12. Dynamic Loading
dynamic loading)
relative
memory
(routine)
(library routine)
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13. Dynamic Linking
OS (static
linking)
execution time
(stub)
stub
routine
library (shared libraries)
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14. Static Linked Library (Link
EXE
Dynamic Linked Library (Link
EXE
DLL
DLL
DOS Static linked
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15.
Overlay
Swapping
Single Partition Allocation
Multiple Partition Allocation
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16. Overlay
(overlay)
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17. Overlay
Compiler
Assemble
(Overlay)
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18. | (OS: Operating Systems) | (Memory Management) | 18
19. Swapping
(swap)
(virtual Memory)
Backing store
-
direct access
Roll out, roll in
(priority base)
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20. Schematic View of Swapping
6.5
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22. User Area) System
Process1
Error
OS
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23. Contiguous Allocation
Resident OS),
interrupt vector
OS
(transient)
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24. Contiguous Allocation
Resident OS),
interrupt vector
OS
(transient)
(fixed-size partition)
Single-partition allocation
Relocation-register scheme
OS
base register Offset
limit
register
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25. Base register limit register
| (OS: Operating Systems) | (Memory Management) | 25
26. | (OS: Operating Systems) | (Memory Management) | 26
27. (Multiple Partition Allocation)
Single
Partition
2
Fixed Sized Partition Partition
Dynamic Allocation Partition
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28. Fix Sized Partition
500B
1000B
2 Partition
2100B
3 Partition
?
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29. Fix Sized Partition
1200B
1200B
2580B
2580B
?
| (OS: Operating Systems) | (Memory Management) | 29
30. Contiguous Allocation (cont.)
Multiple-partition allocation
Hole –
OS
a) allocated partitions
b) free partitions hole)
OS OS OS OS
process 5 process 5 process 5 process 5
process 9 process 9
process 8 process 10
process 2 process 2 process 2 process 2
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31. Fragmentation
Multiple Partition
2
Internal Fragmentation Fixed Sized)
External Fragmentation Dynamic)
Fix Sized Dynamic
P1
P2
Internal Fragment
External Fragment
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32. Fragmentation
External Fragmentation
Internal Fragmentation
compaction
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33. Compaction
Dynamic Allocation
External Fragmentation
External Fragmentation
Copy
| (OS: Operating Systems) | (Memory Management) | 33
34. Dynamic Storage-Allocation Problem
n
First-fit: (first hole)
Best-fit:
smallest hole (
)
Worst-fit:
largest hole (
)
First-Fit Best-Fit Worst-Fit
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35. First Fit
20K
Scan
First
Fragment
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36. Best-Fit
Scan 20K
28K
Best
Fragment 23K
Compact
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37. Worst-fit
20K
Scan
10K
Worst
28K
Fragment
5K
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38. Paging
(paging)
(physical memory)
(frame)
(logical memory)
(page)
| (OS: Operating Systems) | (Memory Management) | 38
39. Paging
n page n
page table physical
addresses
Internal fragmentation
0
1
0
2 Frames
3 1
Pages
Process Page
Memory
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40. Address Translation Scheme
(page number (p)) (page
offset (d))
Page number (p) –
(page table)
(base address)
Page offset (d) –
physical memory
address
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43. Paging Example
32 4
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44. Free Frames
Before allocation After allocation
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45. Address
(Physical Address)
p : d (Page : offset)
Page = Page, offset =
Page page
0
1
Page 1
1 : 30
Page 30
2
-->
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46. Page Table
Page
Frame
Page No. Frame No.
0
0 4
Page2 1
1 5
2
2 1
Page0 4
Page1 5
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47. MMU Physical Address CPU
Frame No. offset
Frame No. Add. Frame
Real Addr.
CPU p d f d
Memory
page frame
0 4
1 5
2 1
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48. (Shared Pages)
(Pages)
(Function)
Page
code1 code1
code1
code2 code2
code2
Memory
data1
data1 data2
data2
P1 P2
2
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49. (Segmentation)
Segment
Segment
main program
segment section
(Load on demand)
| (OS: Operating Systems) | (Memory Management) | 49
50. (Segmentation)
Segment
Segment
main program,
procedure,
function,
method,
object,
local variables, global variables,
common block,
stack,
symbol table, arrays
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51. User’s View of a Program
main program
segment section
(Load on demand)
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52. Logical View of Segmentation
1
4
1
2
3 2
4
3
user space physical memory space
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53. Segmentation Architecture
<segment-number, offset>,
Segment table –
base –
limit – segment.
Segment-table base register (STBR)
Segment-table length register (STLR)
segment number s is legal if s < STLR.
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54. Segmentation Architecture
(Cont.)
Relocation
dynamic
by segment table
Sharing
shared segments
same segment number
Allocation
first fit/best fit
external fragmentation
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55. Segmentation Architecture
(Cont.)
2 (s), (2)
(d)
d 0
d
d d
(base-limit)
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57. Implementation of Page Table
Page table
Page-table base register (PTBR) page table
Page-table length register (PRLR)
page table
page table
associative memory translation look-aside
buffers (TLBs)
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58. Associative Memory
Page # Frame #
Address translation (A´, A´´)
A´ frame#
frame # page table
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60. Effective Access Time
Associative Lookup = time unit
Assume memory cycle time is 1 microsecond
Hit ratio – percentage of times that a page number is found
in the associative registers; ration related to number of
associative registers
Hit ratio =
Effective Access Time (EAT)
EAT = (1 + ) + (2 + )(1 – )
=2+ –
| (OS: Operating Systems) | (Memory Management) | 60
61. Memory Protection
associating protection bit
Valid-invalid bit page table
“valid”
“invalid”
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62. Valid (v) or Invalid (i) Bit In A
Page Table
| (OS: Operating Systems) | (Memory Management) | 62
63. Page Table Structure
Hierarchical Paging
Hashed Page Tables
Inverted Page Tables
| (OS: Operating Systems) | (Memory Management) | 63
65. Two-Level Paging Example
4K page size )
a page number 20 bits
a page offset 12 bits
page table page number
a 10-bit page number
a 10-bit page offset
page number page offset
pi p2 d
10 10 12
pi page table , p2
page table
| (OS: Operating Systems) | (Memory Management) | 65
68. Hashed Page Tables
bits
page table
page table
| (OS: Operating Systems) | (Memory Management) | 68
72. Shared Pages
Shared code
One copy of read-only (reentrant) code shared among
processes (i.e., text editors, compilers, window systems).
Shared code must appear in same location in the logical
address space of all processes
Private code and data
Each process keeps a separate copy of the code and data
The pages for the private code and data can appear
anywhere in the logical address space
| (OS: Operating Systems) | (Memory Management) | 72
74. Segmentation
Memory-management scheme that supports user view of memory
A program is a collection of segments. A segment is a logical unit
such as:
main program,
procedure,
function,
method,
object,
local variables, global variables,
common block,
stack,
symbol table, arrays
| (OS: Operating Systems) | (Memory Management) | 74
75. User’s View of a Program
| (OS: Operating Systems) | (Memory Management) | 75
76. Logical View of Segmentation
1
4
1
2
3 2
4
3
user space physical memory space
| (OS: Operating Systems) | (Memory Management) | 76
79. Segmentation with Paging –
MULTICS
The MULTICS system solved problems of external
fragmentation and lengthy search times by paging the
segments
Solution differs from pure segmentation in that the
segment-table entry contains not the base address of
the segment, but rather the base address of a page
table for this segment
| (OS: Operating Systems) | (Memory Management) | 79
81. Segmentation with Paging –
Intel 386
As shown in the following diagram, the Intel 386 uses
segmentation with paging for memory management with a
two-level paging scheme
| (OS: Operating Systems) | (Memory Management) | 81
83. Linux on Intel 80x86
Uses minimal segmentation to keep memory management
implementation more portable
Uses 6 segments:
Kernel code
Kernel data
User code (shared by all user processes, using logical
addresses)
User data (likewise shared)
Task-state (per-process hardware context)
LDT
Uses 2 protection levels:
Kernel mode
User mode
| (OS: Operating Systems) | (Memory Management) | 83
85. | (OS: Operating Systems) | (Memory Management) | 85