Related to RISC-CISC processors

1. Performance consideration of
computers(CISC vs RISC debate)
By k.Meenakshi
Professor, GRIET

2. Performance considerations
• As processor hardware became much less expensive in the 1980’s, thanks to the VLSI
technology.
• The computer designers increased the use of multi step instruction. This reduces the
number of instructions executed per task, since a single complex instruction replace several
simpler ones.
• Reducing N in this way reduces the overall program execution time that the CPU spends
fetching instructions and their operands from memory.
• The same advances in VLSI made it possible to add new features to old microprocessors
such as new instructions , data types, instruction sets, and addressing modes, while retaining
the ability to execute programs written for the older machines.

3. INTEL 80X86/Pentium
• The intel 80x86/ Pentium series illustrates the trend towards more complex instruction
set. It is made up of 20000 transistors with 1 Mega byte of memory and complete
instruction set and had no instructions for handling the floating pont numbers.
• Twenty five years later its direct descendent, the Pentium contains 3 million
instructions, processed 32 bit and 64 bit words directly and executed a comprehensive
set of floating point instructions.
• The Pentium accumulates most of the architectural features of its various predecessors
with little or no modification, programs written for earlier 80x86 series machines.
• Reflecting these characterestics, the 80x86, 680x0 and most older computer series have
been called complex instruction set computer.

4. Disadvantages of CISC processors
• By the 1980’s, it became apparent that the complex instructions have certain
disadvantages and the execution of even a small percentage if such
instructions can reduce the computers overall performance.
• Suppose a simple instruction require k time units to execute. If there are 100
simple instructions, the time required to execute 100 simple instructions is
100k. On the other hand, 5 complex instructions require time units of 21k.
So for executing 100 instructions it requires (21*5+95)k=200k. In other
words, it means 5 percentage of complex instructions double the overall
program execution time.

5. Disadvantages of CISC
• Thus while complex instructions reduce program size, this technology
necessarily may not translate into the faster program execution.
• Moreover, complex instructions require complex processing circuits, which
tends to put CISCs in the largest and most expensive category.

6. Reduced Instruction Set Computer(RISC)
• RISC is referred to any computer with an instruction set and an associated
CPU derived for very high performance; the actual size of instruction set is
relatively unimportant.
• The time required to transfer the data from registers to M/IO is five times
the data required to transfer from register to register in CPU.
• The M/IO is not on par with CPU in accessing data. The speed disparity
between CPU-M is called Von Neumann bottleneck.

7. RISC
• RISC computers usually limit access to main memory to a few store and load
instructions; other instructions including all data processing and program-
control instructions have their operands in CPU registers.
• The so called load-store instructions are intended to reduce the von-
Neumann bottleneck.

8. CPU speed
• A rough indication of CPU speed is the number of basic operations that it
can perform per unit of time.
• A typical; basic operation is the fixed-point addition of contents of two
registers R1 and R2 as in the symbolic instruction.
• R1:=R1+R2
Such operations are timed by a regular stream of signals issued by a central
timing signal, the system clock.

9. Clock frequency
• The clock frequency f is measured in millions of ticks per second.
• Each tick of a clock signal triggers a basic operation; hence the time required
to execute the operation is 1/f microseconds.
• A computer clocked 250 MHZ can perform the basic operation is 0.004
micro seconds.
• Complicated operations such as division operation on floating point
numbers can require more than one clock cycle for execution.

10. Clock frequency
• The CPU’s processing of an instruction involves several steps such as:
• 1. Fetch the instruction from main memory M
• Decode the instructions opcode
• Load from memory any operand unless they are already in the CPU.
• Execute the instruction via register to register operation using an appropriate
functional unit such as a fixed point adder.
• Store the results in M until they are to be retained in CPU registers.

11. PERFORMANCE MEASURE
Suppose the execution of a particular benchmark program or set of such
programs Q on a CPU takes T seconds and involves an execution of a total N
machine instructions.
Let average instructions executed per second is denoted by IPS.
Then T=N/IPS
The average number of cycles per instruction IPS
f
CPI
6
10


12. Execution time
• Where f is the CPU’S clock frequency.
• The execution time T is given by
6
10


f
CPIN
T
The aim of the CISC processor is to reduce the N, while the goal of RISC processor is CPI.