SlideShare uma empresa Scribd logo
1 de 37
Code Generation Part II Chapter 8 (1 st  ed. Ch.9) COP5621 Compiler Construction Copyright Robert van Engelen, Florida State University, 2007-2009
Flow Graphs ,[object Object],[object Object],MOV 1,R0   MOV n,R1   JMP L2 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1 MOV 0,R0   MOV n,R1   JMP L2 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1
Basic Blocks ,[object Object],MOV 1,R0   MOV n,R1   JMP L2 MOV 1,R0   MOV n,R1   JMP L2 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1
Basic Blocks and Control Flow Graphs ,[object Object],MOV 1,R0   MOV n,R1   JMP L2 MOV 1,R0   MOV n,R1   JMP L2 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1
Successor and Predecessor Blocks ,[object Object],[object Object],[object Object],MOV 1,R0   MOV n,R1   JMP L2 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1
Partition Algorithm for Basic Blocks ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Loops ,[object Object],[object Object],[object Object]
Loops (Example) MOV 1,R0   MOV n,R1   JMP L2 L1: MUL 2,R0   SUB 1,R1 L2: JMPNZ R1,L1 B1: B2: B3: L3: ADD 2,R2   SUB 1,R0   JMPNZ R0,L3 B4: Strongly connected components: SCC={ {B2,B3}, {B4} } Entries: B3, B4
Equivalence of Basic Blocks ,[object Object],b  := 0 t1 := a + b t2 := c * t1 a  := t2 a  := c * a b  := 0 a := c*a b := 0 a := c*a b := 0 Blocks are equivalent, assuming  t1  and  t2  are  dead : no longer used (no longer  live )
Transformations on Basic Blocks ,[object Object],[object Object],[object Object],[object Object],[object Object]
Common-Subexpression Elimination ,[object Object],a := b + c b := a - d c := b + c d := a - d a := b + c b := a - d c := b + c d := b t1 := b * c t2 := a - t1 t3 := b * c t4 := t2 + t3 t1 := b * c t2 := a - t1 t4 := t2 + t1
Dead Code Elimination ,[object Object],b := a + 1 a := b + c … b := a + 1 … Assuming  a  is  dead  (not used) b := x + y … if true goto L2 Remove unreachable code
Renaming Temporary Variables ,[object Object],t1 := b + c t2 := a - t1 t1 := t1 * d d := t2 + t1 t1 := b + c t2 := a - t1 t3 := t1 * d d := t2 + t3 Normal-form block
Interchange of Statements ,[object Object],t1 := b + c t2 := a - t1 t3 := t1 * d d := t2 + t3 t1 := b + c t3 := t1 * d t2 := a - t1 d := t2 + t3 Note that normal-form blocks permit all statement interchanges that are possible
Algebraic Transformations ,[object Object],t1 := a - a t2 := b + t1 t3 := 2 * t2 t1 := 0 t2 := b t3 := t2 << 1
Next-Use ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Next-Use (Step 1) i :  a := b + c j :  t := a + b [  live ( a ) = true,  live ( b ) = true,  live ( t ) = true,   nextuse ( a ) = none,  nextuse ( b ) = none,  nextuse ( t ) = none ] Attach current live/next-use information Because info is empty, assume variables are live (Data flow analysis Ch.10 can provide accurate information)
Next-Use (Step 2) i :  a := b + c j :  t := a + b [  live ( a ) = true,  live ( b ) = true,  live ( t ) = true,   nextuse ( a ) = none,  nextuse ( b ) = none,  nextuse ( t ) = none ] live ( a ) = true nextuse ( a ) =  j live ( b ) = true nextuse ( b ) =  j live ( t ) = false nextuse ( t ) = none Compute live/next-use information at  j
Next-Use (Step 3) i :  a := b + c j :  t := a + b [  live ( a ) = true,  live ( b ) = true,  live ( t ) = true,   nextuse ( a ) = none,  nextuse ( b ) = none,  nextuse ( t ) = none ] Attach current live/next-use information to  i [  live ( a ) = true,  live ( b ) = true,  live ( c ) = false,   nextuse ( a ) =  j ,  nextuse ( b ) =  j ,  nextuse ( c ) = none ]
Next-Use (Step 4) i :  a := b + c j :  t := a + b live ( a ) = false nextuse ( a ) = none live ( b ) = true nextuse ( b ) =  i live ( c ) = true nextuse ( c ) =  i live ( t ) = false nextuse ( t ) = none [  live ( a ) = false,  live ( b ) = false,  live ( t ) = false,   nextuse ( a ) = none,  nextuse ( b ) = none,  nextuse ( t ) = none ] [  live ( a ) = true,  live ( b ) = true,  live ( c ) = false,   nextuse ( a ) =  j ,  nextuse ( b ) =  j ,  nextuse ( c ) = none ] Compute live/next-use information  i
A Code Generator ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
The Code Generation Algorithm ,[object Object],[object Object],[object Object],[object Object],[object Object]
Register and Address Descriptors ,[object Object],[object Object]
The  getreg  Algorithm ,[object Object],[object Object],[object Object],[object Object],[object Object]
Code Generation Example Statements Code Generated Register Descriptor Address Descriptor t := a - b u := a - c v := t + u d := v + u MOV a,R0 SUB b,R0 MOV a,R1 SUB c,R1 ADD R1,R0 ADD R1,R0 MOV R0,d Registers empty R0  contains  t R0  contains  t R1  contains  u R0  contains  v R1  contains  u R0  contains  d t  in  R0 t  in  R0 u  in  R1 u  in  R1 v  in  R0 d  in  R0 d  in  R0  and memory
Register Allocation and Assignment ,[object Object],[object Object],[object Object],[object Object]
Allocating Registers in Loops ,[object Object],[object Object],[object Object]
Global Register Allocation with Graph Coloring ,[object Object],[object Object],[object Object],[object Object]
Register Allocation with Graph Coloring: Example a := read(); b := read(); c := read(); a := a + b + c; if (a < 10) {   d := c + 8;   write(c); } else if (a < 20) {   e := 10;   d := e + a;   write(e); } else {   f := 12;   d := f + a;   write(f); } write(d);
Register Allocation with Graph Coloring: Live Ranges a := read(); b := read(); c := read(); a := a+b+c; a < 20 a < 10 d := c+8; write(c); f := 12; d := f+a; write(f); e := 10; d := e+a; write(e); write(d); a b c e f d d d a f b d e c Interference graph : connected vars have overlapping ranges Live range of  b
Register Allocation with Graph Coloring: Solution a f b d e c Interference graph 2 1 3 2 1 1 Solve Three registers: a = r2 b = r3 c = r1 d = r2 e = r1 f = r1 r2 := read(); r3 := read(); r1 := read(); r2 := r2 + r3 + r1; if (r2 < 10) {   r2 := r1 + 8;   write(r1); } else if (r2 < 20) {   r1 := 10;   r2 := r1 + r2;   write(r1); } else {   r1 := 12;   r2 := r1 + r2;   write(r1); } write(r2);
Peephole Optimization ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Peephole Opt: Eliminating Redundant Loads and Stores ,[object Object],[object Object],[object Object],[object Object]
Peephole Optimization: Deleting Unreachable Code ,[object Object],b := x + y … goto L2 b := x + y … if 0==0 goto L2
Peephole Optimization: Branch Chaining ,[object Object],b := x + y … if a==0 goto L2 L2: goto L3 b := x + y … if a==0 goto L3 L2: goto L3
Peephole Optimization: Other Flow-of-Control Optimizations ,[object Object],L1: … … goto L1 …
Other Peephole Optimizations ,[object Object],[object Object],[object Object],… a := x ^ 2 b := y / 8 … a := x * x b := y >> 3 … a := a + 1 … inc a … a := a + 0 b := b * 1 …

Mais conteúdo relacionado

Mais procurados

Chapter 6 intermediate code generation
Chapter 6   intermediate code generationChapter 6   intermediate code generation
Chapter 6 intermediate code generationVipul Naik
 
Intermediate code generation1
Intermediate code generation1Intermediate code generation1
Intermediate code generation1Shashwat Shriparv
 
Three Address code
Three Address code Three Address code
Three Address code Pooja Dixit
 
Chapter Eight(2)
Chapter Eight(2)Chapter Eight(2)
Chapter Eight(2)bolovv
 
Lecture 03 lexical analysis
Lecture 03 lexical analysisLecture 03 lexical analysis
Lecture 03 lexical analysisIffat Anjum
 
Intermediate code generation (Compiler Design)
Intermediate code generation (Compiler Design)   Intermediate code generation (Compiler Design)
Intermediate code generation (Compiler Design) Tasif Tanzim
 
Chapter Eight(1)
Chapter Eight(1)Chapter Eight(1)
Chapter Eight(1)bolovv
 
Assignment statements
Assignment statementsAssignment statements
Assignment statementsDivya Devan
 
Dag representation of basic blocks
Dag representation of basic blocksDag representation of basic blocks
Dag representation of basic blocksJothi Lakshmi
 
Syntax-Directed Translation into Three Address Code
Syntax-Directed Translation into Three Address CodeSyntax-Directed Translation into Three Address Code
Syntax-Directed Translation into Three Address Codesanchi29
 
Intermediate code generator
Intermediate code generatorIntermediate code generator
Intermediate code generatorsanchi29
 
Presentation(intermediate code generation)
Presentation(intermediate code generation)Presentation(intermediate code generation)
Presentation(intermediate code generation)Sourov Kumar Ron
 

Mais procurados (20)

Chapter 6 intermediate code generation
Chapter 6   intermediate code generationChapter 6   intermediate code generation
Chapter 6 intermediate code generation
 
Intermediate code generation1
Intermediate code generation1Intermediate code generation1
Intermediate code generation1
 
Interm codegen
Interm codegenInterm codegen
Interm codegen
 
Code optimization
Code optimizationCode optimization
Code optimization
 
Compiler unit 5
Compiler  unit 5Compiler  unit 5
Compiler unit 5
 
Three Address code
Three Address code Three Address code
Three Address code
 
Intermediate code generation
Intermediate code generationIntermediate code generation
Intermediate code generation
 
Intermediate code
Intermediate codeIntermediate code
Intermediate code
 
Chapter Eight(2)
Chapter Eight(2)Chapter Eight(2)
Chapter Eight(2)
 
Lecture 03 lexical analysis
Lecture 03 lexical analysisLecture 03 lexical analysis
Lecture 03 lexical analysis
 
Intermediate code generation (Compiler Design)
Intermediate code generation (Compiler Design)   Intermediate code generation (Compiler Design)
Intermediate code generation (Compiler Design)
 
Chapter Eight(1)
Chapter Eight(1)Chapter Eight(1)
Chapter Eight(1)
 
Assignment statements
Assignment statementsAssignment statements
Assignment statements
 
Dag representation of basic blocks
Dag representation of basic blocksDag representation of basic blocks
Dag representation of basic blocks
 
Basic Block
Basic BlockBasic Block
Basic Block
 
Computer Science Assignment Help
Computer Science Assignment HelpComputer Science Assignment Help
Computer Science Assignment Help
 
Syntax-Directed Translation into Three Address Code
Syntax-Directed Translation into Three Address CodeSyntax-Directed Translation into Three Address Code
Syntax-Directed Translation into Three Address Code
 
Software Construction Assignment Help
Software Construction Assignment HelpSoftware Construction Assignment Help
Software Construction Assignment Help
 
Intermediate code generator
Intermediate code generatorIntermediate code generator
Intermediate code generator
 
Presentation(intermediate code generation)
Presentation(intermediate code generation)Presentation(intermediate code generation)
Presentation(intermediate code generation)
 

Destaque

Destaque (9)

Spr ch-05-compilers
Spr ch-05-compilersSpr ch-05-compilers
Spr ch-05-compilers
 
Compiler unit 4
Compiler unit 4Compiler unit 4
Compiler unit 4
 
Chapter Eight(3)
Chapter Eight(3)Chapter Eight(3)
Chapter Eight(3)
 
Code generator
Code generatorCode generator
Code generator
 
System Programming Unit III
System Programming Unit IIISystem Programming Unit III
System Programming Unit III
 
Plant systematics
Plant systematicsPlant systematics
Plant systematics
 
Code Optimization
Code OptimizationCode Optimization
Code Optimization
 
Code generation
Code generationCode generation
Code generation
 
Run time storage
Run time storageRun time storage
Run time storage
 

Semelhante a Ch9b

system software 16 marks
system software 16 markssystem software 16 marks
system software 16 marksvvcetit
 
COMPILER_DESIGN_CLASS 2.ppt
COMPILER_DESIGN_CLASS 2.pptCOMPILER_DESIGN_CLASS 2.ppt
COMPILER_DESIGN_CLASS 2.pptssuserebb9821
 
COMPILER_DESIGN_CLASS 1.pptx
COMPILER_DESIGN_CLASS 1.pptxCOMPILER_DESIGN_CLASS 1.pptx
COMPILER_DESIGN_CLASS 1.pptxssuserebb9821
 
INTEL 8085 DATA FORMAT AND INSTRUCTIONS
INTEL 8085 DATA FORMAT AND INSTRUCTIONSINTEL 8085 DATA FORMAT AND INSTRUCTIONS
INTEL 8085 DATA FORMAT AND INSTRUCTIONSSwapnil Mishra
 
Chapter 3 instruction set-of-8085
Chapter 3 instruction set-of-8085Chapter 3 instruction set-of-8085
Chapter 3 instruction set-of-8085Shubham Singh
 
Development of an Algorithm for 16-Bit WTM
Development of an Algorithm for 16-Bit WTMDevelopment of an Algorithm for 16-Bit WTM
Development of an Algorithm for 16-Bit WTMIOSR Journals
 
16-bit microprocessors
16-bit microprocessors16-bit microprocessors
16-bit microprocessorsZahra Sadeghi
 
microcontroller_instruction_set for ENGINEERING STUDENTS
microcontroller_instruction_set for  ENGINEERING STUDENTSmicrocontroller_instruction_set for  ENGINEERING STUDENTS
microcontroller_instruction_set for ENGINEERING STUDENTSssuser2b759d
 
Register allocation and assignment
Register allocation and assignmentRegister allocation and assignment
Register allocation and assignmentKarthi Keyan
 
8086-instruction-set-ppt
 8086-instruction-set-ppt 8086-instruction-set-ppt
8086-instruction-set-pptjemimajerome
 
Microcontroller lec 3
Microcontroller  lec 3Microcontroller  lec 3
Microcontroller lec 3Ibrahim Reda
 
FPGA based BCH Decoder
FPGA based BCH DecoderFPGA based BCH Decoder
FPGA based BCH Decoderijsrd.com
 
12 chapter06 math_instructions_fa14
12 chapter06 math_instructions_fa1412 chapter06 math_instructions_fa14
12 chapter06 math_instructions_fa14John Todora
 
Computer Organization And Architecture lab manual
Computer Organization And Architecture lab manualComputer Organization And Architecture lab manual
Computer Organization And Architecture lab manualNitesh Dubey
 
microp-8085 74 instructions for mct-A :P
microp-8085 74 instructions for mct-A :Pmicrop-8085 74 instructions for mct-A :P
microp-8085 74 instructions for mct-A :PJathin Kanumuri
 

Semelhante a Ch9b (20)

system software 16 marks
system software 16 markssystem software 16 marks
system software 16 marks
 
COMPILER_DESIGN_CLASS 2.ppt
COMPILER_DESIGN_CLASS 2.pptCOMPILER_DESIGN_CLASS 2.ppt
COMPILER_DESIGN_CLASS 2.ppt
 
COMPILER_DESIGN_CLASS 1.pptx
COMPILER_DESIGN_CLASS 1.pptxCOMPILER_DESIGN_CLASS 1.pptx
COMPILER_DESIGN_CLASS 1.pptx
 
INTEL 8085 DATA FORMAT AND INSTRUCTIONS
INTEL 8085 DATA FORMAT AND INSTRUCTIONSINTEL 8085 DATA FORMAT AND INSTRUCTIONS
INTEL 8085 DATA FORMAT AND INSTRUCTIONS
 
Chapter 3 instruction set-of-8085
Chapter 3 instruction set-of-8085Chapter 3 instruction set-of-8085
Chapter 3 instruction set-of-8085
 
Compiler Design Unit 5
Compiler Design Unit 5Compiler Design Unit 5
Compiler Design Unit 5
 
Development of an Algorithm for 16-Bit WTM
Development of an Algorithm for 16-Bit WTMDevelopment of an Algorithm for 16-Bit WTM
Development of an Algorithm for 16-Bit WTM
 
L010137986
L010137986L010137986
L010137986
 
Instruction formats-in-8086
Instruction formats-in-8086Instruction formats-in-8086
Instruction formats-in-8086
 
16-bit microprocessors
16-bit microprocessors16-bit microprocessors
16-bit microprocessors
 
microcontroller_instruction_set for ENGINEERING STUDENTS
microcontroller_instruction_set for  ENGINEERING STUDENTSmicrocontroller_instruction_set for  ENGINEERING STUDENTS
microcontroller_instruction_set for ENGINEERING STUDENTS
 
Register allocation and assignment
Register allocation and assignmentRegister allocation and assignment
Register allocation and assignment
 
8086-instruction-set-ppt
 8086-instruction-set-ppt 8086-instruction-set-ppt
8086-instruction-set-ppt
 
Faster Python, FOSDEM
Faster Python, FOSDEMFaster Python, FOSDEM
Faster Python, FOSDEM
 
Microcontroller lec 3
Microcontroller  lec 3Microcontroller  lec 3
Microcontroller lec 3
 
FPGA based BCH Decoder
FPGA based BCH DecoderFPGA based BCH Decoder
FPGA based BCH Decoder
 
12 chapter06 math_instructions_fa14
12 chapter06 math_instructions_fa1412 chapter06 math_instructions_fa14
12 chapter06 math_instructions_fa14
 
Computer science sqp
Computer science sqpComputer science sqp
Computer science sqp
 
Computer Organization And Architecture lab manual
Computer Organization And Architecture lab manualComputer Organization And Architecture lab manual
Computer Organization And Architecture lab manual
 
microp-8085 74 instructions for mct-A :P
microp-8085 74 instructions for mct-A :Pmicrop-8085 74 instructions for mct-A :P
microp-8085 74 instructions for mct-A :P
 

Mais de kinnarshah8888 (13)

Yuva Msp All
Yuva Msp AllYuva Msp All
Yuva Msp All
 
Yuva Msp Intro
Yuva Msp IntroYuva Msp Intro
Yuva Msp Intro
 
Ch6
Ch6Ch6
Ch6
 
Ch5a
Ch5aCh5a
Ch5a
 
Ch10
Ch10Ch10
Ch10
 
Ch7
Ch7Ch7
Ch7
 
Ch3
Ch3Ch3
Ch3
 
Ch2
Ch2Ch2
Ch2
 
Ch4b
Ch4bCh4b
Ch4b
 
Ch4a
Ch4aCh4a
Ch4a
 
Ch5b
Ch5bCh5b
Ch5b
 
Ch4c
Ch4cCh4c
Ch4c
 
Ch1
Ch1Ch1
Ch1
 

Último

TrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law DevelopmentsTrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law DevelopmentsTrustArc
 
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...apidays
 
FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024The Digital Insurer
 
ICT role in 21st century education and its challenges
ICT role in 21st century education and its challengesICT role in 21st century education and its challenges
ICT role in 21st century education and its challengesrafiqahmad00786416
 
TrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
TrustArc Webinar - Unlock the Power of AI-Driven Data DiscoveryTrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
TrustArc Webinar - Unlock the Power of AI-Driven Data DiscoveryTrustArc
 
Architecting Cloud Native Applications
Architecting Cloud Native ApplicationsArchitecting Cloud Native Applications
Architecting Cloud Native ApplicationsWSO2
 
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWEREMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWERMadyBayot
 
Ransomware_Q4_2023. The report. [EN].pdf
Ransomware_Q4_2023. The report. [EN].pdfRansomware_Q4_2023. The report. [EN].pdf
Ransomware_Q4_2023. The report. [EN].pdfOverkill Security
 
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...Zilliz
 
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu SubbuApidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbuapidays
 
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FMESafe Software
 
Exploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone ProcessorsExploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone Processorsdebabhi2
 
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot ModelNavi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot ModelDeepika Singh
 
Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...apidays
 
Why Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire businessWhy Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire businesspanagenda
 
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...apidays
 
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemkeProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemkeProduct Anonymous
 
Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)wesley chun
 
A Beginners Guide to Building a RAG App Using Open Source Milvus
A Beginners Guide to Building a RAG App Using Open Source MilvusA Beginners Guide to Building a RAG App Using Open Source Milvus
A Beginners Guide to Building a RAG App Using Open Source MilvusZilliz
 
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...apidays
 

Último (20)

TrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law DevelopmentsTrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
 
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
 
FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024
 
ICT role in 21st century education and its challenges
ICT role in 21st century education and its challengesICT role in 21st century education and its challenges
ICT role in 21st century education and its challenges
 
TrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
TrustArc Webinar - Unlock the Power of AI-Driven Data DiscoveryTrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
TrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
 
Architecting Cloud Native Applications
Architecting Cloud Native ApplicationsArchitecting Cloud Native Applications
Architecting Cloud Native Applications
 
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWEREMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
 
Ransomware_Q4_2023. The report. [EN].pdf
Ransomware_Q4_2023. The report. [EN].pdfRansomware_Q4_2023. The report. [EN].pdf
Ransomware_Q4_2023. The report. [EN].pdf
 
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
 
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu SubbuApidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
 
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
 
Exploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone ProcessorsExploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone Processors
 
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot ModelNavi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
 
Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...
 
Why Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire businessWhy Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire business
 
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
 
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemkeProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
 
Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)
 
A Beginners Guide to Building a RAG App Using Open Source Milvus
A Beginners Guide to Building a RAG App Using Open Source MilvusA Beginners Guide to Building a RAG App Using Open Source Milvus
A Beginners Guide to Building a RAG App Using Open Source Milvus
 
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
 

Ch9b

  • 1. Code Generation Part II Chapter 8 (1 st ed. Ch.9) COP5621 Compiler Construction Copyright Robert van Engelen, Florida State University, 2007-2009
  • 2.
  • 3.
  • 4.
  • 5.
  • 6.
  • 7.
  • 8. Loops (Example) MOV 1,R0 MOV n,R1 JMP L2 L1: MUL 2,R0 SUB 1,R1 L2: JMPNZ R1,L1 B1: B2: B3: L3: ADD 2,R2 SUB 1,R0 JMPNZ R0,L3 B4: Strongly connected components: SCC={ {B2,B3}, {B4} } Entries: B3, B4
  • 9.
  • 10.
  • 11.
  • 12.
  • 13.
  • 14.
  • 15.
  • 16.
  • 17. Next-Use (Step 1) i : a := b + c j : t := a + b [ live ( a ) = true, live ( b ) = true, live ( t ) = true, nextuse ( a ) = none, nextuse ( b ) = none, nextuse ( t ) = none ] Attach current live/next-use information Because info is empty, assume variables are live (Data flow analysis Ch.10 can provide accurate information)
  • 18. Next-Use (Step 2) i : a := b + c j : t := a + b [ live ( a ) = true, live ( b ) = true, live ( t ) = true, nextuse ( a ) = none, nextuse ( b ) = none, nextuse ( t ) = none ] live ( a ) = true nextuse ( a ) = j live ( b ) = true nextuse ( b ) = j live ( t ) = false nextuse ( t ) = none Compute live/next-use information at j
  • 19. Next-Use (Step 3) i : a := b + c j : t := a + b [ live ( a ) = true, live ( b ) = true, live ( t ) = true, nextuse ( a ) = none, nextuse ( b ) = none, nextuse ( t ) = none ] Attach current live/next-use information to i [ live ( a ) = true, live ( b ) = true, live ( c ) = false, nextuse ( a ) = j , nextuse ( b ) = j , nextuse ( c ) = none ]
  • 20. Next-Use (Step 4) i : a := b + c j : t := a + b live ( a ) = false nextuse ( a ) = none live ( b ) = true nextuse ( b ) = i live ( c ) = true nextuse ( c ) = i live ( t ) = false nextuse ( t ) = none [ live ( a ) = false, live ( b ) = false, live ( t ) = false, nextuse ( a ) = none, nextuse ( b ) = none, nextuse ( t ) = none ] [ live ( a ) = true, live ( b ) = true, live ( c ) = false, nextuse ( a ) = j , nextuse ( b ) = j , nextuse ( c ) = none ] Compute live/next-use information i
  • 21.
  • 22.
  • 23.
  • 24.
  • 25. Code Generation Example Statements Code Generated Register Descriptor Address Descriptor t := a - b u := a - c v := t + u d := v + u MOV a,R0 SUB b,R0 MOV a,R1 SUB c,R1 ADD R1,R0 ADD R1,R0 MOV R0,d Registers empty R0 contains t R0 contains t R1 contains u R0 contains v R1 contains u R0 contains d t in R0 t in R0 u in R1 u in R1 v in R0 d in R0 d in R0 and memory
  • 26.
  • 27.
  • 28.
  • 29. Register Allocation with Graph Coloring: Example a := read(); b := read(); c := read(); a := a + b + c; if (a < 10) { d := c + 8; write(c); } else if (a < 20) { e := 10; d := e + a; write(e); } else { f := 12; d := f + a; write(f); } write(d);
  • 30. Register Allocation with Graph Coloring: Live Ranges a := read(); b := read(); c := read(); a := a+b+c; a < 20 a < 10 d := c+8; write(c); f := 12; d := f+a; write(f); e := 10; d := e+a; write(e); write(d); a b c e f d d d a f b d e c Interference graph : connected vars have overlapping ranges Live range of b
  • 31. Register Allocation with Graph Coloring: Solution a f b d e c Interference graph 2 1 3 2 1 1 Solve Three registers: a = r2 b = r3 c = r1 d = r2 e = r1 f = r1 r2 := read(); r3 := read(); r1 := read(); r2 := r2 + r3 + r1; if (r2 < 10) { r2 := r1 + 8; write(r1); } else if (r2 < 20) { r1 := 10; r2 := r1 + r2; write(r1); } else { r1 := 12; r2 := r1 + r2; write(r1); } write(r2);
  • 32.
  • 33.
  • 34.
  • 35.
  • 36.
  • 37.