Full article https://piolabs.com/blog/news/openhw-tv-s2e04.html OpenHW TV S2 E04 was held on 22nd April 2021 in the usual format of a Zoom webinar with a live Q&A session. This event was solely dedicated to the several key projects led by the OpenHW Software Task Group. It’s worth mentioning that the SW TG not only develops the key software elements that are needed, but it also encourages the growth of a thriving commercial community that can develop and maintain this software for the long term.

1. OpenHW TV S02 E04
Ivan Kravets • Ph.D, Founder and CEO @ PlatformIO Labs

2. PlatformIO Labs
Overview
● For Semiconductor Industry
● For Hardware Manufacturers
● For Cloud Software Providers
● For IDE Providers
● For Academics
An independent provider of
next-generation technology

3. Accelerate adoption of CORE-V IP
❏ Out-of-the-box support for CORE-V Family of
Open-Source RISC-V Cores
❏ Free, neutral and independent collaborative platform
without vendor lock-in
❏ Speed Time to Market and launch CORE-V based
products in weeks rather than months or years
❏ Grow and Save by not having to re-invent features
offered by more advanced IDE solutions.

4. PlatformIO Labs – TaaS (Technology as a Service) Offerings
Invest Once, Save Millions.
Professional Collaborative Platform
Unit Testing Remote Development
Library Management Toolchain Management
Multi platform Build System
IDE Integration CI Integration
Debugging Static Code Analysis
Technology Solutions & Services
Trusted Package Registry
Integration Services
Customer Development
Customer Support Maintenance Services
Next-Gen
IDE Framework
Modern
UI Toolkit

5. ● No barrier to entry
● Combines a best-of-breed
back-end build system with
best-in-class front-end IDEs
● Attracts high-level developers
(Python, JavaScript, C#, Java,
Ruby, etc.)
● Most loved collaborative
platform for embedded
developers & teams
2,000,000+
developers
Professionals, academics, students, makers

6. Demo of PlatformIO IDE for CORE-V IP Cores
● Out-of-the-box support for CORE-V CV32E40P
RISC-V IP
● Powerful Debugger supporting both real hardware
and simulators (Imperas OVPSim, Antmicro Renode)
● Seamless deployment of pre-generated bitstreams
to FPGA boards
● Automated dependency management (toolchains,
SDKs, debug servers, etc.)