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Ripple minimization through harmonic elimination in asymmetric interleaved multiphase dc dc converters
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RIPPLE MINIMIZATION THROUGH HARMONIC ELIMINATION IN
ASYMMETRIC INTERLEAVED MULTIPHASE DC-DC CONVERTERS
By
A
PROJECT REPORT
Submitted to the Department of electronics & communication Engineering in the
FACULTY OF ENGINEERING & TECHNOLOGY
In partial fulfillment of the requirements for the award of the degree
Of
MASTER OF TECHNOLOGY
IN
ELECTRONICS & COMMUNICATION ENGINEERING
APRIL 2016
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CERTIFICATE
Certified that this project report titled “RIPPLE MINIMIZATION THROUGH HARMONIC
ELIMINATION IN ASYMMETRIC INTERLEAVED MULTIPHASE DC-DC
CONVERTERS” is the bonafide work of Mr. _____________Who carried out the research
under my supervision Certified further, that to the best of my knowledge the work reported
herein does not form part of any other project report or dissertation on the basis of which a
degree or award was conferred on an earlier occasion on this or any other candidate.
Signature of the Guide Signature of the H.O.D
Name Name
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DECLARATION
I hereby declare that the project work entitled “RIPPLE MINIMIZATION THROUGH
HARMONIC ELIMINATION IN ASYMMETRIC INTERLEAVED MULTIPHASE DC-
DC CONVERTERS” Submitted to BHARATHIDASAN UNIVERSITY in partial fulfillment
of the requirement for the award of the Degree of MASTER OF APPLIED ELECTRONICS is a
record of original work done by me the guidance of Prof.A.Vinayagam M.Sc., M.Phil., M.E.,
to the best of my knowledge, the work reported here is not a part of any other thesis or work on
the basis of which a degree or award was conferred on an earlier occasion to me or any other
candidate.
(Student Name)
(Reg.No)
Place:
Date:
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ACKNOWLEDGEMENT
I am extremely glad to present my project “RIPPLE MINIMIZATION THROUGH
HARMONIC ELIMINATION IN ASYMMETRIC INTERLEAVED MULTIPHASE DC-
DC CONVERTERS” which is a part of my curriculum of third semester Master of Science in
Computer science. I take this opportunity to express my sincere gratitude to those who helped me
in bringing out this project work.
I would like to express my Director, Dr. K. ANANDAN, M.A.(Eco.), M.Ed., M.Phil.,(Edn.),
PGDCA., CGT., M.A.(Psy.) of who had given me an opportunity to undertake this project.
I am highly indebted to Co-Ordinator Prof. Muniappan Department of Physics and thank from
my deep heart for her valuable comments I received through my project.
I wish to express my deep sense of gratitude to my guide
Prof. A.Vinayagam M.Sc., M.Phil., M.E., for her immense help and encouragement for
successful completion of this project.
I also express my sincere thanks to the all the staff members of Computer science for their kind
advice.
And last, but not the least, I express my deep gratitude to my parents and friends for their
encouragement and support throughout the project.
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ABSTRACT:
Symmetric multiphase dc–dc converters are widely used in power electronics, as they
enable the processing of high power through splitting the overall load-current into multiple
phases. Distributing the processed power symmetrically between the phases and performing
ripple minimization through interleaving is well understood. However, in recent applications
such as maximum power point tracking for solar photovoltaic, converters are forced to operate
under asymmetric conditions, due to differences in the sources or loads of each converter. This
study presents a control technique, based on harmonic elimination, that allows for ripple
minimization under asymmetric conditions. The mathematical derivations are outlined and
simulations are used to evaluate the performance of the proposed technique. Measurements taken
from an experimental prototype, consisting of three dc–dc buck converters, demonstrate
significant improvements in ripple reduction over conventional interleaving techniques. When
the multiphase converter is operated at the optimum asymmetric phase-shift found through the
techniques presented here, a more than 3x reduction in net current ripple is observed under
realistic operating conditions. Additionally, the undesirable first harmonic ripple component is
reduced by 14.8 dB with the proposed technique.
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INTRODUCTION:
Current ripple cancellation is an important feature of multiphase switching converters, as
it enables each individual converter of the system to operate at a higher ripple than the overall
load-current ripple through interleaving of the phases.
This yield significantly lower value for the inductor and capacitors of each converter, and
it can lead to substantial reductions in converter size and cost, while increasing the efficiency.
Symmetric multiphase dc-dc converters are widely used in power electronics, as they
enable the processing of high power through splitting the overall load-current into multiple
phases.
Distributing the processed power symmetrically between the phases and performing
ripple minimization through interleaving is well understood. However, in recent applications
such as maximum power point (MPP) tracking for solar photovoltaic (PV),
converters are forced to operate under asymmetric conditions, due to differences in the
sources or loads of each converter. This work presents a control technique, based on harmonic
elimination that allows for ripple minimization under asymmetric conditions.
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EXISTING SYSTEM:
Recently, asymmetric phase-shifting has been used to account for imbalances in the
converter phases due to component tolerances, and in the context of EMI noise shaping, where
certain higher order harmonics can be reduced, which therefore reduces the filter size as dictated
by EMI regulations. However, little improvement can be achieved due to practical limitations
such as measurement errors and signal delays in the complex control circuitry. Usually,
component tolerances are small, which means that the deviations from symmetrical operation are
limited. Consequently, the additional cost introduced by the more sophisticated control might not
be justified
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PROPOSED SYSTEM:
Interleaving of the different converters and applying a symmetric phase-shift will yield
some benefits in the architecture. However, methods that go beyond this technique are required
to minimize the output current ripple under asymmetric operating conditions, which will be
explored in this work. The presented results are universally applicable for different dc-dc
converter topologies, such as buck-type (buck, buck-boost, flyback) and boost-type (boost,
boost-buck, SEPIC) converters. In the system, all the outputs of the dc-dc converters are
connected in series - supplying one common load. However, since the operating point of each
sub-module may differ due to shading, manufacturing tolerances, cell damage, and aging; the
duty cycles of the individual converters are oftentimes different. These operating conditions are
different from what is usually referred to as multi-phase interleaved converters as described
above. The average output current is identical for all three converters, but the output voltages are
different due to the series connection
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ADVANTAGES:
Reduce the overall current ripple, and enable the use of small, low-cost inductors in each
converter
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CONCLUSION:
We have presented an analytical derivation of a control strategy that enables interleaved
operation and improved ripple cancelation for multiphase converters with nonuniform duty
cycles. Through simulations, we have illustrated the improved performance of the proposed
method compared to the conventional ripple cancelation method. The calculation of asymmetric
phase-angles based on the Fourier space representation of the current ripple goes beyond the
previous studies in the field [34], [35], [46], [47]. Moreover, application of the proposed
technique to multiphase converters with different input voltages and currents, operating at
asymmetric duty cycles, extends the scope of [12]–[14] to the general case. The presented
control scheme enables significant performance improvements of the converter without requiring
additional hardware.
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REFERENCES:
[1] O.Garcia, P. Zumel, A. de Castro, and J. A. Cobos, “Effect of the tolerances in multi-phase
dc-dc converters,” in Proc. IEEE 36th Power Electron. Spec. Conf., 2005, pp. 1452–1457.
[2] Z. Lukic, S. M. Ahsanuzzaman, A. Prodic, and Z. Zhao, “Self-tuning sensorless digital
current-mode controller with accurate current sharing for multi-phase dc-dc converters,” in Proc.
24th Annu. IEEE Appl. Power Electron. Conf. Expo., 2009, pp. 264–268.
[3] O. Garcia, P. Zumel, A. de Castro, P. Alou, and J. A. Cobos, “Current selfbalance mechanism
in multiphase buck converter,” IEEE Trans. Power Electron., vol. 24, no. 6, pp. 1600–1606, Jun.
2009.
[4] Z. Wang and H. Li, “Three-phase bidirectional dc-dc converter with enhanced current sharing
capability,” in Proc. IEEE Energy Convers. Congr. Expo., 2010, pp. 1116–1122.
[5] B.Miwa, D. Otten, and M. Schlecht, “High efficiency power factor correction using
interleaving techniques,” in Proc. Appl. Power Electron. Conf. Expo.,Feb. 1992, pp. 557–568.