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Diseño digital
1.
Sea U el
universo de preguntas. Sea T subconjunto de U, tal que T es el conjunto de preguntas tontas. Axioma: T = { Ø } “No existen preguntas tontas; lo tonto es pensar que alguna pregunta es tonta, pues CUALQUIER pregunta puede ser utilizada para dar origen a una discusión genial si se es suficientemente inteligente” Carlos A. Esquit Junio 2010 Copyright © 2007 Elsevier 1-<1>
2.
Chapter 1 ::
From Zero to One Digital Design and Computer Architecture David Money Harris and Sarah L. Harris Copyright © 2007 Elsevier 1-<2>
3.
Chapter 1 ::
Topics • Background • The Game Plan • The Art of Managing Complexity • The Digital Abstraction • Number Systems • Logic Gates • Logic Levels • CMOS Transistors • Power Consumption Copyright © 2007 Elsevier 1-<3>
4.
Background
• Microprocessors have revolutionized our world – Cell phones, Internet, rapid advances in medicine, etc. • The semiconductor industry has grown from $21 billion in 1985 to $300 billion in 2010 Copyright © 2007 Elsevier 1-<4>
5.
The Game Plan
• The purpose of this course is that you: – Learn the principles of digital design – Learn to systematically design and debug increasingly complex designs Copyright © 2007 Elsevier 1-<5>
6.
The Art of
Managing Complexity • Abstraction • The Three –Y’s – Hierarchy – Modularity – Regularity Copyright © 2007 Elsevier 1-<6>
7.
Abstraction
Application • Hiding details when Software programs they aren’t important Operating Systems device drivers instructions Architecture registers focus of this course Micro- datapaths architecture controllers adders Logic memories Digital AND gates Circuits NOT gates Analog amplifiers Circuits filters transistors Devices diodes Physics electrons Copyright © 2007 Elsevier 1-<7>
8.
The Three -Y’s
• Hierarchy – A system divided into modules and submodules • Modularity – Having well-defined functions and interfaces • Regularity – Encouraging uniformity, so modules can be easily reused Copyright © 2007 Elsevier 1-<8>
9.
Example: Flintlock Rifle
• Hierarchy – Three main modules: lock, stock, and barrel – Submodules of lock: hammer, flint, frizzen, etc. Copyright © 2007 Elsevier 1-<9>
10.
Example: Flintlock Rifle
• Modularity – Function of stock: mount barrel and lock – Interface of stock: length and location of mounting pins • Regularity – Interchangeable parts Copyright © 2007 Elsevier 1-<10>
11.
The Digital Abstraction
• Most physical variables are continuous, for example – Voltage on a wire – Frequency of an oscillation – Position of a mass • Instead of considering all values, the digital abstraction considers only a discrete subset of values Copyright © 2007 Elsevier 1-<11>
12.
The Analytical Engine
• Designed by Charles Babbage from 1834 – 1871 • Considered to be the first digital computer • Built from mechanical gears, where each gear represented a discrete value (0-9) • Babbage died before it was finished Copyright © 2007 Elsevier 1-<12>
13.
Digital Discipline: Binary
Values • Typically consider only two discrete values: – 1’s and 0’s – 1, TRUE, HIGH – 0, FALSE, LOW • 1 and 0 can be represented by specific voltage levels, rotating gears, fluid levels, etc. • Digital circuits usually depend on specific voltage levels to represent 1 and 0 • Bit: Binary digit Copyright © 2007 Elsevier 1-<13>
14.
Number Systems
• Decimal numbers 1000's column 10's column 1's column 100's column 5374 10 = • Binary numbers 8's column 2's column 1's column 4's column 11012 = Copyright © 2007 Elsevier 1-<14>
15.
Number Systems
• Decimal numbers 1000's column 10's column 1's column 100's column 5374 10 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100 five three seven four thousands hundreds tens ones • Binary numbers 8's column 2's column 1's column 4's column 11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20 = 1310 one one no one eight four two one Copyright © 2007 Elsevier 1-<15>
16.
Powers of Two
• 20 = • 28 = • 21 = • 29 = • 22 = • 210 = • 23 = • 211 = • 24 = • 212 = • 25 = • 213 = • 26 = • 214 = • 27 = • 215 = Copyright © 2007 Elsevier 1-<16>
17.
Powers of Two
• 20 = 1 • 28 = 256 • 21 = 2 • 29 = 512 • 22 = 4 • 210 = 1024 • 23 = 8 • 211 = 2048 • 24 = 16 • 212 = 4096 • 25 = 32 • 213 = 8192 • 26 = 64 • 214 = 16384 • 27 = 128 • 215 = 32768 • Handy to memorize up to 210 Copyright © 2007 Elsevier 1-<17>
18.
Number Conversion
• Binary to Decimal conversion: – Convert 101012 to decimal • Decimal to binary conversion: – Convert 4710 to binary Copyright © 2007 Elsevier 1-<18>
19.
Number Conversion
• Binary to decimal conversion: – Convert 100112 to decimal – 16×1 + 8×0 + 4×0 + 2×1 + 1×1 = 1910 • Decimal to binary conversion: – Convert 4710 to binary – 32×1 + 16×0 + 8×1 + 4×1 + 2×1 + 1×1 = 1011112 Copyright © 2007 Elsevier 1-<19>
20.
Binary Values and
Range • N-digit decimal number – How many values? 10N – Range? [0, 10N - 1] – Example: 3-digit decimal number: • 103 = 1000 possible values • Range: [0, 999] • N-bit binary number – How many values? 2N – Range: [0, 2N - 1] – Example: 3-digit binary number: • 23 = 8 possible values • Range: [0, 7] = [0002 to 1112] Copyright © 2007 Elsevier 1-<20>
21.
Hexadecimal Numbers
Hex Digit Decimal Equivalent Binary Equivalent 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A 10 B 11 C 12 D 13 E 14 F 15 Copyright © 2007 Elsevier 1-<21>
22.
Hexadecimal Numbers
Hex Digit Decimal Equivalent Binary Equivalent 0 0 0000 1 1 0001 2 2 0010 3 3 0011 4 4 0100 5 5 0101 6 6 0110 7 7 0111 8 8 1000 9 9 1001 A 10 1010 B 11 1011 C 12 1100 D 13 1101 E 14 1110 F 15 1111 Copyright © 2007 Elsevier 1-<22>
23.
Hexadecimal Numbers
• Base 16 • Shorthand to write long binary numbers Copyright © 2007 Elsevier 1-<23>
24.
Hexadecimal to Binary
Conversion • Hexadecimal to binary conversion: – Convert 4AF16 (also written 0x4AF) to binary • Hexadecimal to decimal conversion: – Convert 0x4AF to decimal Copyright © 2007 Elsevier 1-<24>
25.
Hexadecimal to Binary
Conversion • Hexadecimal to binary conversion: – Convert 4AF16 (also written 0x4AF) to binary – 0100 1010 11112 • Hexadecimal to decimal conversion: – Convert 4AF16 to decimal – 162×4 + 161×10 + 160×15 = 119910 Copyright © 2007 Elsevier 1-<25>
26.
Bits, Bytes, Nibbles…
• Bits 10010110 most least significant significant bit bit byte • Bytes & Nibbles 10010110 nibble • Bytes CEBF9AD7 most least significant significant byte byte Copyright © 2007 Elsevier 1-<26>
27.
Powers of Two
• 210 = 1 kilo ≈ 1000 (1024) • 220 = 1 mega ≈ 1 million (1,048,576) • 230 = 1 giga ≈ 1 billion (1,073,741,824) Copyright © 2007 Elsevier 1-<27>
28.
Estimating Powers of
Two • What is the value of 224? • How many values can a 32-bit variable represent? Copyright © 2007 Elsevier 1-<28>
29.
Estimating Powers of
Two • What is the value of 224? 24 × 220 ≈ 16 million • How many values can a 32-bit variable represent? 22 × 230 ≈ 4 billion Copyright © 2007 Elsevier 1-<29>
30.
Digitization
Quantization Value Q Quantization Error = Q/2 Copyright © 2007 Elsevier 1-<30>
31.
Addition
• Decimal 11 carries 3734 + 5168 8902 • Binary 11 carries 1011 + 0011 1110 Copyright © 2007 Elsevier 1-<31>
32.
Binary Addition Examples
• Add the following 1001 4-bit binary + 0101 numbers • Add the following 1011 4-bit binary + 0110 numbers Copyright © 2007 Elsevier 1-<32>
33.
Binary Addition Examples
• Add the following 1 1001 4-bit binary + 0101 numbers 1110 111 • Add the following 1011 4-bit binary + 0110 numbers 10001 Overflow! Copyright © 2007 Elsevier 1-<33>
34.
Overflow
• Digital systems operate on a fixed number of bits • Addition overflows when the result is too big to fit in the available number of bits • See previous example of 11 + 6 Copyright © 2007 Elsevier 1-<34>
35.
Signed Binary Numbers
• Sign/Magnitude Numbers • Two’s Complement Numbers Copyright © 2007 Elsevier 1-<35>
36.
Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits • Sign bit is the most significant (left-most) bit – Positive number: sign bit = 0 A : {a N −1 , a N −2 ,L a2 , a1 , a0 } – Negative number: sign bit = 1 n −2 A = ( −1) an −1 ∑ ai 2i i =0 • Example, 4-bit sign/mag representations of ± 6: +6 = -6= • Range of an N-bit sign/magnitude number: Copyright © 2007 Elsevier 1-<36>
37.
Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits • Sign bit is the most significant (left-most) bit – Positive number: sign bit = 0 A : {a N −1 , a N −2 ,L a2 , a1 , a0 } – Negative number: sign bit = 1 n −2 A = ( −1) an −1 ∑ ai 2i i =0 • Example, 4-bit sign/mag representations of ± 6: +6 = 0110 - 6 = 1110 • Range of an N-bit sign/magnitude number: [-(2N-1-1), 2N-1-1] Copyright © 2007 Elsevier 1-<37>
38.
Sign/Magnitude Numbers
• Problems: – Addition doesn’t work, for example -6 + 6: 1110 + 0110 10100 (wrong!) – Two representations of 0 (± 0): 1000 0000 Copyright © 2007 Elsevier 1-<38>
39.
Two’s Complement Numbers
• Don’t have same problems as sign/magnitude numbers: – Addition works – Single representation for 0 Copyright © 2007 Elsevier 1-<39>
40.
Two’s Complement Numbers
• Same as unsigned binary, but the most significant bit (msb) has value of -2N-1 n −2 A = an −1 ( −2n −1 ) + ∑ ai 2i i =0 i= • Most positive 4-bit number: • Most negative 4-bit number: • The most significant bit still indicates the sign (1 = negative, 0 = positive) • Range of an N-bit two’s comp number: Copyright © 2007 Elsevier 1-<40>
41.
Two’s Complement Numbers
• Same as unsigned binary, but the most significant bit (msb) has value of -2N-1 n −2 A = an −1 ( −2n −1 ) + ∑ ai 2i i =0 i= • Most positive 4-bit number: 0111 • Most negative 4-bit number: 1000 • The most significant bit still indicates the sign (1 = negative, 0 = positive) • Range of an N-bit two’s comp number: Copyright © 2007 Elsevier 1-<41> [-(2N-1), 2N-1-1]
42.
“Taking the Two’s
Complement” • Flip the sign of a two’s complement number • Method: 1. Invert the bits 2. Add 1 • Example: Flip the sign of 310 = 00112 Copyright © 2007 Elsevier 1-<42>
43.
“Taking the Two’s
Complement” • Flip the sign of a two’s complement number • Method: 1. Invert the bits 2. Add 1 • Example: Flip the sign of 310 = 00112 1. 1100 2. + 1 1101 = -310 Copyright © 2007 Elsevier 1-<43>
44.
Two’s Complement Examples
• Take the two’s complement of 610 = 01102 • What is the decimal value of 10012? Copyright © 2007 Elsevier 1-<44>
45.
Two’s Complement Examples
• Take the two’s complement of 610 = 01102 1. 1001 2. + 1 10102 = -610 • What is the decimal value of the two’s complement number 10012? 1. 0110 2. + 1 01112 = 710, so 10012 = -710 Copyright © 2007 Elsevier 1-<45>
46.
Two’s Complement Addition
• Add 6 + (-6) using two’s complement numbers 0110 + 1010 • Add -2 + 3 using two’s complement numbers 1110 + 0011 Copyright © 2007 Elsevier 1-<46>
47.
Two’s Complement Addition
• Add 6 + (-6) using two’s complement numbers 111 0110 + 1010 10000 • Add -2 + 3 using two’s complement numbers 111 1110 + 0011 Copyright © 2007 Elsevier 10001 1-<47>
48.
Increasing Bit Width
• A value can be extended from N bits to M bits (where M > N) by using: – Sign-extension – Zero-extension Copyright © 2007 Elsevier 1-<48>
49.
Sign-Extension
• Sign bit is copied into most significant bits. • Number value remains the same. • Example 1: – 4-bit representation of 3 = 0011 – 8-bit sign-extended value: 00000011 • Example 2: – 4-bit representation of -5 = 1011 – 8-bit sign-extended value: 11111011 Copyright © 2007 Elsevier 1-<49>
50.
Zero-Extension
• Zeros are copied into most significant bits. • Value will change for negative numbers. • Example 1: – 4-bit value = 00112 = 310 – 8-bit zero-extended value: 00000011 = 310 • Example 2: – 4-bit value = 1011 = -510 – 8-bit zero-extended value: 00001011 = 1110 Copyright © 2007 Elsevier 1-<50>
51.
Number System Comparison
Number System Range Unsigned [0, 2N-1] Sign/Magnitude [-(2N-1-1), 2N-1-1] Two’s Complement [-2N-1, 2N-1-1] For example, 4-bit representation: -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Unsigned 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 Two's Complement 0000 1111 1110 1101 1100 1011 1010 1001 1000 0001 0010 0011 0100 0101 0110 0111 Sign/Magnitude Copyright © 2007 Elsevier 1-<51>
52.
George Boole, 1815
- 1864 • Born to working class parents • Taught himself mathematics and joined the faculty of Queen’s College in Ireland. • Wrote An Investigation of the Laws of Thought (1854) • Introduced binary variables • Introduced the three fundamental logic operations: AND, OR, and NOT. Copyright © 2007 Elsevier 1-<52>
53.
Logic Gates
• Perform logic functions: – inversion (NOT), AND, OR, NAND, NOR, etc. • Single-input: – NOT gate, buffer • Two-input: – AND, OR, XOR, NAND, NOR, XNOR • Multiple-input Copyright © 2007 Elsevier 1-<53>
54.
Single-Input Logic Gates
NOT BUF A Y A Y Y=A Y=A A Y A Y 0 1 0 0 1 0 1 1 Copyright © 2007 Elsevier 1-<54>
55.
Single-Input Logic Gates
NOT BUF A Y A Y Y=A Y=A A Y A Y 0 1 0 0 1 0 1 1 Copyright © 2007 Elsevier 1-<55>
56.
Two-Input Logic Gates
AND OR A A Y Y B B Y = AB Y=A+B A B Y A B Y 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 1 1 1 1 Copyright © 2007 Elsevier 1-<56>
57.
Two-Input Logic Gates
AND OR A A Y Y B B Y = AB Y=A+B A B Y A B Y 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 1 1 1 1 Copyright © 2007 Elsevier 1-<57>
58.
More Two-Input Logic
Gates XOR NAND NOR XNOR A A A A Y Y Y Y B B B B Y=A+B Y = AB Y=A+B Y=A+B A B Y A B Y A B Y A B Y 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 1 0 1 0 0 1 1 0 1 1 0 1 1 0 0 1 0 1 1 0 1 1 0 1 1 0 1 1 Copyright © 2007 Elsevier 1-<58>
59.
More Two-Input Logic
Gates XOR NAND NOR XNOR A A A A Y Y Y Y B B B B Y=A+B Y = AB Y=A+B Y=A+B A B Y A B Y A B Y A B Y 0 0 0 0 0 1 0 0 1 0 0 1 0 1 1 0 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 0 1 0 0 1 1 0 1 1 0 1 1 0 1 1 1 Copyright © 2007 Elsevier 1-<59>
60.
Multiple-Input Logic Gates
NOR3 AND4 A A B Y B Y C C D Y = A+B+C Y = ABCD A B C Y 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Copyright © 2007 Elsevier 1-<60>
61.
Multiple-Input Logic Gates
NOR3 AND4 A A B B Y C Y C D Y = A+B+C Y = ABCD A B C Y A B C Y 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 1 1 1 0 1 1 1 1 Copyright © 2007 Elsevier • Multi-input XOR: Odd parity 1-<61>
62.
Logic Levels
• Define discrete voltages to represent 1 and 0 • For example, we could define: – 0 to be ground or 0 volts – 1 to be VDD or 5 volts • What about 4.99 volts? Is that a 0 or a 1? • What about 3.2 volts? Copyright © 2007 Elsevier 1-<62>
63.
Logic Levels
• Define a range of voltages to represent 1 and 0 • Define different ranges for outputs and inputs to allow for noise in the system • What is noise? Copyright © 2007 Elsevier 1-<63>
64.
What is Noise?
• Anything that degrades the signal – E.g., resistance, power supply noise, coupling to neighboring wires, etc. • Example: a gate (driver) could output a 5 volt signal but the signal could arrive at the receiver with a degraded value, for example, 4.5 volts Noise Driver Receiver 5V 4.5 V Copyright © 2007 Elsevier 1-<64>
65.
What is Noise?
• Anything that degrades the signal – E.g., resistance, power supply noise, coupling to neighboring wires, etc. • Example: a gate (driver) could output a 5 volt signal but, because of resistance in a long wire, the signal could arrive at the receiver with a degraded value, for example, 4.5 volts Noise Driver Receiver 5V 4.5 V Copyright © 2007 Elsevier 1-<65>
66.
The Static Discipline
• Given logically valid inputs, every circuit element must produce logically valid outputs • Discipline ourselves to use limited ranges of voltages to represent discrete values Copyright © 2007 Elsevier 1-<66>
67.
Logic Levels
Driver Receiver Output Characteristics Input Characteristics VDD Logic High Output Range Logic High VO H Input Range NMH Forbidden VIH Zone VIL VO L NML Logic Low Logic Low Input Range Output Range GND Copyright © 2007 Elsevier 1-<67>
68.
Noise Margins
Driver Receiver Output Characteristics Input Characteristics VDD Logic High Output Range Logic High VO H Input Range NMH Forbidden VIH Zone VIL VO L NML Logic Low Logic Low Input Range Output Range GND NMH = VOH – VIH Copyright © 2007 Elsevier NML = VIL – VOL 1-<68>
69.
DC Transfer Characteristics
Ideal Buffer: Real Buffer: V(Y) V(Y) A Y VOH VDD VDD VOH Unity Gain Points VOL Slope = 1 VOL 0 V(A) V(A) 0 VDD / 2 VDD VIL VIH VDD VIL, VIH NMH = NML = VDD/2 NMH , NML < VDD/2 Copyright © 2007 Elsevier 1-<69>
70.
DC Transfer Characteristics
A Y V(Y) Output Characteristics Input Characteristics V DD VDD V OH VO H NMH Forbidden VIH Zone VIL Unity Gain NML Points VO L V OL Slope = 1 V(A) 0 V IL V IH V DD GND Copyright © 2007 Elsevier 1-<70>
71.
VDD Scaling
• Chips in the 1970’s and 1980’s were designed using VDD = 5 V • As technology improved, VDD dropped – Avoid frying tiny transistors – Save power • 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, … • Be careful connecting chips with different supply voltages Copyright © 2007 Elsevier 1-<71>
72.
Logic Family Examples
Logic Family VDD VIL VIH VOL VOH TTL 5 (4.75 - 5.25) 0.8 2.0 0.4 2.4 CMOS 5 (4.5 - 6) 1.35 3.15 0.33 3.84 LVTTL 3.3 (3 - 3.6) 0.8 2.0 0.4 2.4 LVCMOS 3.3 (3 - 3.6) 0.9 1.8 0.36 2.7 Copyright © 2007 Elsevier 1-<72>
73.
Transistors • Logic gates
are usually built out of transistors • Transistor is a three-ported voltage-controlled switch – Two of the ports are connected depending on the voltage on the third port – For example, in the switch below the two terminals (d and s) are connected (ON) only when the third terminal (g) is 1 g=0 g=1 d d d g OFF ON s s s Copyright © 2007 Elsevier 1-<73>
74.
Robert Noyce, 1927
- 1990 • Nicknamed “Mayor of Silicon Valley” • Cofounded Fairchild Semiconductor in 1957 • Cofounded Intel in 1968 • Co-invented the integrated circuit Copyright © 2007 Elsevier 1-<74>
75.
Silicon • Transistors are
built out of silicon, a semiconductor • Pure silicon is a poor conductor (no free charges) • Doped silicon is a good conductor (free charges) – n-type (free negative charges, electrons) – p-type (free positive charges, holes) Free electron Free hole Si Si Si Si Si Si Si Si Si - + + - Si Si Si Si As Si Si B Si Si Si Si Si Si Si Si Si Si Silicon Lattice n-Type p-Type Copyright © 2007 Elsevier 1-<75>
76.
MOS Transistors • Metal
oxide silicon (MOS) transistors: – Polysilicon (used to be metal) gate – Oxide (silicon dioxide) insulator – Doped silicon source gate drain Polysilicon SiO2 n n p substrate gate source drain Copyright © 2007 Elsevier 1-<76> nMOS
77.
Transistors: nMOS
Gate = 0, so it is OFF Gate = 1, so it is ON (no connection between (channel between source and drain) source and drain) source drain source gate drain gate VDD GND +++++++ ------- n n n n channel p substrate p substrate GND GND Copyright © 2007 Elsevier 1-<77>
78.
Transistors: pMOS
• pMOS transistor is just the opposite – ON when Gate = 0 – OFF when Gate = 1 source gate drain Polysilicon SiO2 p p n substrate gate source drain Copyright © 2007 Elsevier 1-<78>
79.
Transistor Function
g=0 g=1 d d d nMOS g OFF ON s s s s s s pMOS g OFF ON d d d Copyright © 2007 Elsevier 1-<79>
80.
Transistor Function
• nMOS transistors pass good 0’s, so connect source to GND • pMOS transistors pass good 1’s, so connect source to VDD pMOS pull-up network CMOS inputs output Circuits nMOS pull-down network Copyright © 2007 Elsevier 1-<80>
81.
CMOS Gates: NOT
Gate NOT VDD A Y P1 Y=A A Y N1 A Y 0 1 1 0 GND A P1 N1 Y 0 1 Copyright © 2007 Elsevier 1-<81>
82.
CMOS Gates: NOT
Gate NOT VDD A Y P1 Y=A A Y N1 A Y 0 1 1 0 GND A P1 N1 Y 0 ON OFF 1 1 OFF ON 0 Copyright © 2007 Elsevier 1-<82>
83.
CMOS Gates: NAND
Gate NAND A P2 P1 Y Y B A N1 Y = AB B N2 A B Y 0 0 1 0 1 1 1 0 1 1 1 0 A B P1 P2 N1 N2 Y 0 0 0 1 1 0 Copyright © 2007 Elsevier 1 1 1-<83>
84.
CMOS Gates: NAND
Gate NAND A P2 P1 Y Y B A N1 Y = AB B N2 A B Y 0 0 1 0 1 1 1 0 1 1 1 0 A B P1 P2 N1 N2 Y 0 0 ON ON OFF OFF 1 0 1 ON OFF OFF ON 1 1 0 OFF ON ON OFF 1 Copyright © 2007 Elsevier 1 1 OFF OFF ON ON 0 1-<84>
85.
CMOS Gate Structure
pMOS pull-up network inputs output nMOS pull-down network Copyright © 2007 Elsevier 1-<85>
86.
NOR Gate
How do you build a three-input NOR gate? Copyright © 2007 Elsevier 1-<86>
87.
NOR3 Gate
Three-input NOR gate A B C Y Copyright © 2007 Elsevier 1-<87>
88.
Other CMOS Gates
How do you build a two-input AND gate? Copyright © 2007 Elsevier 1-<88>
89.
Other CMOS Gates
Two-input AND gate A Y B Copyright © 2007 Elsevier 1-<89>
90.
Transmission Gates
• nMOS pass 1’s poorly EN • pMOS pass 0’s poorly • Transmission gate is a better switch A B – passes both 0 and 1 well • When EN = 1, the switch is ON: EN – EN = 0 and A is connected to B • When EN = 0, the switch is OFF: – A is not connected to B Copyright © 2007 Elsevier 1-<90>
91.
Pseudo-nMOS Gates
• Pseudo-nMOS gates replace the pull-up network with a weak pMOS transistor that is always on • The pMOS transistor is called weak because it pulls the output HIGH only when the nMOS network is not pulling it LOW weak Y inputs nMOS pull-down network Copyright © 2007 Elsevier 1-<91>
92.
Pseudo-nMOS Example
Pseudo-nMOS NOR4 weak Y A B C D Copyright © 2007 Elsevier 1-<92>
93.
Gordon Moore, 1929
- • Cofounded Intel in 1968 with Robert Noyce. • Moore’s Law: the number of transistors on a computer chip doubles every year (observed in 1965) • Since 1975, transistor counts have doubled every two years. Copyright © 2007 Elsevier 1-<93>
94.
Moore’s Law
• “If the automobile had followed the same development cycle as the computer, a Rolls-Royce would today cost $100, get one million miles to the gallon, and explode once a year . . .” – Robert Cringley Copyright © 2007 Elsevier 1-<94>
95.
Power Consumption
• Power = Energy consumed per unit time • Two types of power consumption: – Dynamic power consumption – Static power consumption Copyright © 2007 Elsevier 1-<95>
96.
Dynamic Power Consumption
• Power to charge transistor gate capacitances • The energy required to charge a capacitance, C, to VDD is ½ CVDD2 • If the circuit is running at frequency f, and all transistors switch (from 1 to 0 or vice versa) at that frequency, the capacitor is charged Tf times during a period of time T. • Thus, the total dynamic power consumption is: Pdynamic =αCVDD2f Copyright © 2007 Elsevier 1-<96>
97.
Static Power Consumption
• Power consumed when no gates are switching • It is caused by the quiescent supply current, IDD, also called the leakage current • Thus, the total static power consumption is: Pstatic = IDDVDD Copyright © 2007 Elsevier 1-<97>
98.
Power Consumption Example
• Estimate the power consumption of a wireless handheld computer – VDD = 1.2 V – C = 20 nF – f = 1 GHz – IDD = 20 mA Copyright © 2007 Elsevier 1-<98>
99.
Power Consumption Example
• Estimate the power consumption of a wireless handheld computer – VDD = 1.2 V – C = 20 nF – f = 1 GHz – IDD = 20 mA P = ½CVDD2f + IDDVDD = ½(20 nF)(1.2 V)2(1 GHz) + (20 mA)(1.2 V) = 14.4 W Copyright © 2007 Elsevier 1-<99>
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