The FP7 FlexTiles Project will provide a tool-chain that allows DSPs, CPUs and a FPGA to be implemented on the FlexTiles Development Platform. This slide gives some details about the dynamic re-configurable of the FPGA by the CPU
- ctrl: send request for data transfers, get current mode of operation
- prog: single instructions and dma for managing loading of large instruction sets
- data channels …
- send_rqst: send request to the target channel‘s controller FSM
- send_data: transfer data to the accelerator ; includes send_rqst
- read_data: counter part of send_data
- write_register: write into ctrl + prog registers
- read_register: get current mode of operation
- acc_numer: specify accelerator, payload size, id of 1 of the 4 channels, addr of register / fifo, payload