1. About FlexSDR and My Projects Shyu Lee (Xu LI) FlexSDR project organizer

2. Agenda Purpose of the project Technical details Current status Wish list About Shyu

3. Very Basic Background I used to be an amateur radio fan; Was working on EME (Moon bouncing)communication during university time. Never succeed, but the failure just stimulate me keep going; Made a lot of test boards including embedded system, FPGA (DSP), AD/DA as well as the RF frontend;

4. Background (continued) Worked as an RF Design Engineer in RFMD for four years, but never stop the researches SDR techniques during the time; My time of working with SDR is scatter by regular work in company; Now I give up the promotion and counter offer, quit my job and put full time on my favorite topic and style of research life;

5. Purpose Finish the SDR hardware test platform, make eligible for most SDR application verification missions; Create a set of basic software building blocks, to let people quick get their work hand on; Make the project open source under GPL; Help to let the open project contributors connected as a community.

6. A too brief introduction of current status for the gears

7. SDA-20F SDR Frontend Part Numbered as SDA-20F; Baseline level Stratix II FPGA based DSP; Using Quartus II web edition as the developing IDE; AD9957 as the TX DAC; AD6655 as the dual-RX ADC (purpose of diversity receiving) RX signal lever + ADC Driver + Anti-aliasing filer attached; 128MiB 133MHz SDRAM; DXB expansion slot; All hardware design by Shyu on the expense of his own salary during his spare time in 2009; All finished by Shyu’s hand soldering and assembly;

8. TCV-100 SDR Frontend Part Numbered as TCV-100; EP2C50 Cyclone II FPGA based DSP; Using Quartus II web edition as the developing IDE; AD9957 as the TX DAC; AD6655 as the dual-RX ADC (purpose of diversity receiving) 8MiB 133MHz SDRAM; All hardware design by Shyu on the expense of his own salary during his spare time in 2007; All finished by Shyu’s hand soldering and assembly;

9. FCS-300 Synthesizer Complex Part Numbered as FCS-300; 5MHz~40MHz reference; Bypass-able on board 10MHz TCXO reference; 320MHz ultra low phase-noise VCXO locked by reference with AD9518; DDS based ADC/DAC Encoding; AD9912 DDS output; All hardware design by Shyu on the expense of his own salary during his spare time in 2009; All finished by Shyu’s hand soldering and assembly;

10. ENC-310 Synthesizer Complex Part Numbered as ENC-310; Superseded by FCS-300; All hardware design by Shyu on the expense of his own salary during his spare time in 2008; All finished by Shyu’s hand soldering and assembly;

11. FCS-200 Synthesizer Complex Part Numbered as FCS-200; My first dream of making an ultra-low phase noise, low spur level signal source comparable to Agilent’s $20000.00 items; Superseded by FCS-300; All hardware design by Shyu on the expense of his own salary during his spare time in 2007; All finished by Shyu’s hand soldering and assembly;

12. RF Frontend test bed Developed during my time in college from 2005~2006;

13. ARM embedded controlling system Part Numbered as ESX-85; Samsung S3C6410X ARM11 CPU + EP3C40 SDR optimized IO Bridge; Full set of modern I/O purpose, including: Ethernet, USB Device/Host, RS-232(all 8 lines), Optical SPDIF and conventional AC97 audio; Work as DXB expansion host; Using industry standard JTAG port to connect with debugging tools; LCD supported with OpenVG; Ported to Linux 2.6.3x; All hardware design by Shyu on the expense of his own salary during his spare time in 2011; All finished by Shyu’s hand soldering and assembly;

14. ARM embedded card Part Numbered as SEM-641; The S3C6410 SEM module shown on ESX-85 board; All hardware design by Shyu on the expense of his own salary during his spare time in 2011; All finished by Shyu’s hand soldering and assembly; “Designed by Shyu” noted on metal layer;

15. ARM embedded card Part Numbered as SEM-T36; STM32 Cortex-M3 CPU 88W8686 Wi-Fi module; Wi-Fi stack code finished by another community member; SEM module, supported by ESX-85; All hardware design by Shyu on the expense of his own salary during his spare time in 2011; All finished by Shyu’s hand soldering and assembly;

16. Early versions of embedded cards My works during my university time before 2006; Based on S3C2440 ARM9; Does not compatible with SEM standard, but these parts are my early thoughts of how an embedded module should be like;

17. Block diagrams The slides are prepared just within an hour, Please give me some extra time for the block diagrams.

18. Patents SEM Embedded Connection – a standard of the interconnection between embedded controllers and SDR hardware, including the mechanical specifications and signal and timing specifications; DXB Expansion - a standard of the interconnection between the replaceable AD/DA frontend and SDR motherboard, including the mechanical specifications and signal and timing specifications;

19. Wish List I can hear other people’s voice, like suggestions, contributions and criticisms, on the FlexSDR project. I can have all aspects of the documents of the project organized and finished. I can use my gadgets to fulfill my wish of making a successive EME communication. That will be really really cool! I can effectively help other people with my knowledge; I can put full of my strength on a field I am so interested in, that I have spent at least 6 years time on.

20. Wish List A business model could be found by opening the knowledge and selling service for customized commercial demands; I wish I can help with the “Inter-Planet” and “Outer space” wireless communications at lower cost and higher performance level.

21. About Me My name is Shyu Lee (Shyu is pronounced like |shoō|. Pinyin: LI XU, but never mind.) Worked for RFMD from 2008 to 2011 as RF Engineer, RF Design Engineer, Staff Design Engineer and perhaps I can be Engineering Manager if I don’t quit. My job was design RF frontend IC and MCM modules for base-stations. There are harsh demand of performance specifications like IP3, noise figure, gain, isolation and many others for the the products I was concern with. I also have one year design experience of VCO and PLL in Sirenza (With the members of Vari-L team), frequency covering from 1GHz ~ 7GHz with coil tanked and micro-strip tanked structures; I quit the my company job and plan to start FlexSDR; I have to eat something in order to live everyday, so I help my friends started one company called Meteroi, a company design and manufacturing multi-meters with varies of innovative ideas;

22. Thanks for your time I really appreciate you can finish checking out my slides. Maybe you have some questions, please feel free contact me with me@shyul.com or call me at +86-1860-1678-068.

23. For Graduate Program Application Having Bachelor degree of Electronics Engineering and Master degree of Computer Application; GRE: 520/800/3 (Gosh! something must be wrong and crazy for 3) TOFEL: 20/26/23/24