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By : Balbir  Virdi
 
[object Object],[object Object],[object Object],[object Object]
[object Object],[object Object],[object Object],[object Object]
EPROM AND STATIC RAM: ,[object Object],[object Object],[object Object],[object Object]
Memory IC’s
DECODER ,[object Object],[object Object],[object Object]
[object Object],[object Object]
[object Object],[object Object]
Consider a system in which the full memory space 64kb is utilized for EPROM memory. Interface the EPROM with 8085 processor. The memory capacity is 64 Kbytes. i.e. 2^n = 64 x 1000 bytes where n = address lines. So, n = 16. In this system the entire 16 address lines of the processor are connected to address input pins of memory IC in order to address the internal locations of memory. The chip select (CS) pin of EPROM is permanently tied to logic low (i.e., tied to ground). Since the processor is connected to EPROM, the active low RD pin is connected to active low output enable pin of EPROM. The range of address for 64 Kbytes EPROM is 0000H to FFFFH.
[object Object],[object Object],[object Object],[object Object]
[object Object],[object Object],[object Object],[object Object]
EXAMPLE 2 ,[object Object]
The 32kb memory requires 15 address lines and so the address lines A0 - A14 of the processor are connected to 15 address pins of both EPROM and RAM. The unused address line A15 is used as to chip select. If A15  is 1, it select RAM and If  A15  is 0, it select EPROM. Inverter is used for selecting the memory. The memory used is both Ram and EPROM, so the low RD and WR pins of processor are connected to low WE and OE pins of memory respectively. The address range of EPROM will be 0000H to 7FFFH and that of RAM will be 8000H to FFFFH.
EXAMPLE-3 ,[object Object]
 
[object Object],[object Object],[object Object],[object Object],[object Object]
The address allotted to each memory IC is shown in following table.
EXAMPLE-4 ,[object Object],The total memory capacity is 64Kb. So, let 3 numbers of 8Kb EPROM and 5 numbers of 8Kb RAM. Each 8kb memory requires 13 address lines. So the address line A0 - A12 of the processor are connected to 13address pins of all the memory lCs. The address lines A13, A14 and A]5 are decoded using a 3-to-8 coder to generate eight chip select signals. These eight chip select signals can be used to select one of the eight memories at any one time.
 
 
Programming model ,[object Object]
 
ADDRESSING MODES  OF 8085 ,[object Object],[object Object],[object Object],[object Object]
[object Object],[object Object]
Types of Addressing Modes ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Direct Addressing Mode ,[object Object],[object Object],[object Object],[object Object],[object Object],LDA 2500 H  Load the contents of memory  location 2500 H in      accumulator.
Register Addressing Mode ,[object Object],[object Object],[object Object],[object Object],MOV A, B  Move the contents of register B to A.
Register Indirect Addressing Mode ,[object Object],[object Object],[object Object],[object Object],[object Object],MOV A, M  Move data from memory location  specified by H-L pair    to accumulator.
Immediate Addressing Mode ,[object Object],[object Object],[object Object],[object Object],MVI  A, 05 H  Move 05 H in accumulator.
Implicit Addressing Mode ,[object Object],[object Object],[object Object],[object Object],CMA  Complement accumulator.

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Memory intrface and addrs modes

  • 1. By : Balbir Virdi
  • 2.  
  • 3.
  • 4.
  • 5.
  • 7.
  • 8.
  • 9.
  • 10. Consider a system in which the full memory space 64kb is utilized for EPROM memory. Interface the EPROM with 8085 processor. The memory capacity is 64 Kbytes. i.e. 2^n = 64 x 1000 bytes where n = address lines. So, n = 16. In this system the entire 16 address lines of the processor are connected to address input pins of memory IC in order to address the internal locations of memory. The chip select (CS) pin of EPROM is permanently tied to logic low (i.e., tied to ground). Since the processor is connected to EPROM, the active low RD pin is connected to active low output enable pin of EPROM. The range of address for 64 Kbytes EPROM is 0000H to FFFFH.
  • 11.
  • 12.
  • 13.
  • 14. The 32kb memory requires 15 address lines and so the address lines A0 - A14 of the processor are connected to 15 address pins of both EPROM and RAM. The unused address line A15 is used as to chip select. If A15  is 1, it select RAM and If  A15  is 0, it select EPROM. Inverter is used for selecting the memory. The memory used is both Ram and EPROM, so the low RD and WR pins of processor are connected to low WE and OE pins of memory respectively. The address range of EPROM will be 0000H to 7FFFH and that of RAM will be 8000H to FFFFH.
  • 15.
  • 16.  
  • 17.
  • 18. The address allotted to each memory IC is shown in following table.
  • 19.
  • 20.  
  • 21.  
  • 22.
  • 23.  
  • 24.
  • 25.
  • 26.
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  • 31.