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Logic Family



             By
 AJAL.A.J ( A.P- ECE)- FISAT
ec2reach@gmail.com , Mob : 8907305642

                                    1
Logic Family Definition
• A circuit configuration or approach used to
  produce a type of digital integrated circuit.
• Consequence: different logic functions, when
  fabricated in the form of an IC with the same
  approach, or in other words belonging to the
  same logic family, will have identical electrical
  characteristics.
• the set of digital ICs belonging to the same logic
  family are electrically compatible with each other




                                                       2
Logic Families
•Three major logic families:
   •TTL (Transistor-Transistor Logic) based on bipolar
   junction transistors
   •CMOS (Complementary Metal Oxide
   Semiconductor) based on MOSFETs
   •ECL (Emitter-Coupled Logic), based on bipolar
   junction transistors
•Originally, TTL chips were fast but used lots of power,
and CMOS chips used little power but were slow.
•CMOS chips are sensitive to static discharge, and
must be handled carefully.
Common Characteristics of
  the Same Logic Family
• Supply voltage range, speed of response,
  power dissipation, input and output logic
  levels, current sourcing and sinking capability,
  fan-out, noise margin, etc.
• Consequence: choosing digital ICs from the
  same logic family guarantees that these ICs are
  compatible with respect to each other and that
  the system as a whole performs the intended
  logic function.


                                                     4
Two Kinds of Transistors
•In Electronic Devices & Circuits (EET 2201) you’ll
study two major classes of transistors:
   •Bipolar Junction Transistors (BJTs)




   •Metal-Oxide Semiconductor Field Effect Transistor
   (MOSFETs)
DIODE TRANSISTOR LOGIC
    DIODE TRANSISTOR LOGIC
                       5V            FILL IN THE TRUTH TABLE
                       +V
                                                                 A       A Y
          DIODE
                            1k                                  0       0
     0V
A                                                               0       1
                                 Y
                  1k
                            MMBT3904
                                                                1       0
          DIODE                                                 1       1
     0V
B
                                     What logic function is this circuit?
RTL Example




              7
Basic Logic Families
• TTL – transistor-transistor logic
  based on bipolar transistors.
• CMOS – complementary metal-oxide
  semiconductor logic based on metal-
  oxide-semiconductor field effect
  transistors (MOSFETs).
• ECL – emitter coupled logic based on
  bipolar transistors.
Basic Logic Families




TTL   CMOS         ECL
General Characteristics of
  Basic Logic Families
• CMOS consumes very little power,
  has excellent noise immunity, and is
  used with a wide range of voltages.
• TTL can drive more current and uses
  more power than CMOS.
• ECL is fast, with poor noise
  immunity and high power
  consumption.
Introduction
• Uses bipolar technology including
  NPN transistors, diodes and
  resistors.
• The NAND gate is the basic building
  block
• Contains different subfamilies with
  varying characteristics such as
  speed and power consumption
                                        11
Example Logic Families
• General comparison or three commonly
  available logic families.




       the most important to understand
Standard TTL NAND Gate




                     13
What is a totem pole?
In art and history….
  Totem poles are carved and
  painted vertical logs, constructed
  by many northwest coast native
  American Indian people. The poles
  display mythological images,
  animal spirits whose significance is
  their association with the lineage.
                                   14
Totem-Pole Output
• Most chips you’ve used up to now
  have had totem-pole outputs.
Totem pole in TTL ?
• What is totem pole?
  – addition of an active pull up circuit in the
    output of a gate is called totem pole. Using
    Q3 and Q4 to achieve this purpose
• Why totem pole?
  – To increase the switching speed of the
    gate which is limited due to the parasitic
    capacitance at the output.
                                            16
Totem Pole Outputs
• The standard TTL output
  configuration with a HIGH output and
  a LOW output transistor, only one of
  which is active at any time.
• A phase splitter transistor controls
  which transistor is active.
Totem Pole Outputs
Advantages of Totem
    Pole Configuration
• Changes state faster than open-
  collector outputs.
• No external components are
  required.
Totem Pole Switching
        Noise
• Caused by one output transistor
  turning off slower than the other
  turns on.
• Briefly shorts VCC to ground.
• Prevented with use of decoupling
  capacitors.
NOT Gate 7404




                21
NOR Gate 7402




                22
AND Gate 7408




                23
OR Gate 7432




               24
XOR Gate




           25
Transistor-Transistor Logic
         Families
• Transistor-Transistor Logic Families:
   – 74L        Low power
   – 74H        High speed
   – 74S        Schottky
   – 74LS       Low power Schottky
   – 74AS       Advanced Schottky
   – 74ALS      Advance Low power Schottky
Standard TTL Transistor Switching
            Problem
• Trs are driven into deep saturation to fully
  conduct, or cutoff to switch off.
• The result of deep saturation is that the two
  junctions are now forward biased.
• The forward biasing of the BC junction
  forces a large number of minority carriers
  to the collector region.
• When the Tr switches off, these minority
  carriers needs to be removed. This takes a
  finite amount of time called the storage time
  (major component of the propagation delay)
  and thus increases the switch off time. 27
MOSFET Types
• Depletion-mode.
• Enhancement-mode:
  – n-channel
  – p-channel
• CMOS (complementary) constructed
  from both n- and p-channel
  transistors.
MOSFET Types
MOSFET
METAL OXIDE SEMICONDUCTOR
 FIELD EFFECT TRANSISTORS
P-CHANNEL ENHANCEMENT      N-CHANNEL ENHANCEMENT




 TO TURN ON GATE MUST BE    TO TURN ON GATE MUST BE
   LOWER THAN SOURCE          HIGHER THAN SOURCE
MOSFET
METAL OXIDE SEMICONDUCTOR
 FIELD EFFECT TRANSISTORS
                      C-MOS
              5V                        5V 5V                       5V             5V
              +V                        +V +V                       +V             +V


                  10k
                                            S    10k
                                                                          S             P-MOS
                           5V                          5V

                   D              G        P-MOSD             G
                                                                  0V   Vin P-MOS                 0V   Vin
                                                                                         Vout
   0V   G          N-MOS         0V    G   D N-MOS                        D
                                           10k                            10k            N-MOS
                   S                             S



    TO TURN ON                  TO TURN ON ON
                                   TO TURN                  TO TURN ON
    GATE HIGHER                    GATE HIGHER
                                GATE LOWER                  GATE LOWER
    THAN SOURCE                    THAN SOURCE
                                THAN SOURCE                 THAN SOURCE
MOSFET BIAS
         Requirements
• Operates in two modes:
• Cutoff – acts as a very high
  impedance between the drain and
  the source.
• Ohmic – equivalent of saturation.
  Acts like a relatively low resistance
  between the drain and the source.
CMOS
      COMPLIMENTARY
METAL OXIDE SEMICONDUCTOR
CMOS
      COMPLIMENTARY
METAL OXIDE SEMICONDUCTOR
             C-MOS
                   5V
                   +V


                        P-MOS
        0V   Vin
                         Vout

                         N-MOS
CMOS Quiescent vs.
     Dynamic Current

• Quiescent current flows when the
  gate is in a steady state and is
  usually small.
• Dynamic current flows when the gate
  is changing state.
• The faster a CMOS gate switches, the
  more current (and the more power) it
Power Dissipation
• The measure of energy used over
  time by electronic logic gates.
• The product of the voltage and
  current required for the operation of
  the circuit.
Fan-In
• Number of input signals to a gate
  – Not an electrical property
  – Function of the manufacturing process
     NAND gate with a
       Fan-in of 8
Fanout Definitions
• Driving gate is the gate whose output
  supplies current to the inputs of other
  gates.
• Load gate is a gate whose input current is
  supplied by the output of another gate.
• A measure of the ability of the output of
  one gate to drive the input(s) of
  subsequent gates
Fanout

• The number of gates that a logic gate
  is capable of driving without
  possible logic error.
• Limited by the maximum current a
  gate can supply in a given logic state
  versus the current requirements of
  the load.
Fan out
• Also known as loading factor
• Defined as the maximum number of
  logic inputs that an output can drive
  reliably
• A logic circuit that specify to have 10
  fan out can drive 10 logic inputs



                                 ©2009, CE Department
• How many 74LS00 NAND gate inputs
  can be driven by a 74LS00 NAND gate
  outputs ?

Solution:
Refer to data sheet of 74LS00, the maximum values of
   IOH = 0.4mA, IOL = 8mA, IIH = 20uA, and IIL = 0.4mA
Hence,
  fan-out(high) = IOH(max) / IIH (max)=0.4mA/20uA=20
  fan-out(low) = IOL(max) / IIL(max)=8mA/0.4mA=20,
  the overall fan-out = fan-out(high) or fan-out(low)
  whichever is lower.
  Hence, overall fan-out = 20
ECL
ECL
EMITTER COUPLED LOGIC
The ECL Digital IC Family
8-14 The ECL Digital IC Family
        Basic ECL circuit – differential amplifier


                                 This circuit produces complementary
                                     outputs: VOUT1 , equal to VIN ,
                                        and VOUT2 , equal to VIN.
The ECL Digital IC Family
8-14 The ECL Digital IC Family
                    ECL OR/NOR Gate
                        OR




                                 The fundamental ECL gate.
                                 The basic ECL circuit can be
                                   used as an INVERTER if
                                 the output is taken at VOUT1.
The ECL Digital IC Family
8-14 The ECL Digital IC Family
  • ECL characteristics:
     – Very fast switching with typical propagation delay
       of 360 ps—faster than TTL or CMOS.
     – The standard ECL logic levels are nominally
       -0.8 V and 1.7 V for logical 1 and 0 respectively.
     – Worst-case noise margins approximately 150 mV.
     – ECL logic gates usually produce an output and its
       complement, eliminating the need for inverters.
     – Current flow remains constant, eliminating noise
       spikes
PLD’S
PLD’sInputs
Most of these
devices are based on
a two level structure
(sum of products
form).
                        AND       products
                                             OR
                        plane                plane


                                             outputs
In practice this might be
       represented as:
          inputs          PLD notation
          A B C    D




•The fusible
links are made         A.C + B.C   D + A
at the x’s,
otherwise                outputs
blown.
Inverted inputs
          A   B
inputs




                     A.B + A.B   A + B
                     = B
                       outputs
PLD’s
– The main types of PLD include:

  • PLA’s (programmable logic arrays)

  • PAL’s (programmable array logic)

  • PROM’s (programmable read only
    memory)
PLA’s
                                  A   B

A programmable logic array
(PLA) has all links
programmable in both AND and
OR arrays.

Very flexible.

Many applications don’t require
such flexibility
– AND plane         PALs
  programmable          AABB

– OR plane
  fixed             A
                               F4   F1
– Not so flexible
                                            1
– Operate faster    B                                 3
                                                          P

  because hard-                             2
  wired OR’s
                               F5   F8
  switch quicker
  than                                   programmable links
  programmed
  links.
PAL’s AABB
• P = A.notB +
  notA.B
                    A
• Use gate 1 to
                               F4   F1
  implement the 1st
  product term and                       1
                                                 P
                                             3
  gate 2 to        B
                                         2
  implement the
  second                       F5   F8
• First term blow F2
  and F3
• Second term blow
  F5 and F8
PALs Shorthand Notation

     A B CD E

                    P




        P = A.C.D
Digital ic ajal crc

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Digital ic ajal crc

  • 1. Logic Family By AJAL.A.J ( A.P- ECE)- FISAT ec2reach@gmail.com , Mob : 8907305642 1
  • 2. Logic Family Definition • A circuit configuration or approach used to produce a type of digital integrated circuit. • Consequence: different logic functions, when fabricated in the form of an IC with the same approach, or in other words belonging to the same logic family, will have identical electrical characteristics. • the set of digital ICs belonging to the same logic family are electrically compatible with each other 2
  • 3. Logic Families •Three major logic families: •TTL (Transistor-Transistor Logic) based on bipolar junction transistors •CMOS (Complementary Metal Oxide Semiconductor) based on MOSFETs •ECL (Emitter-Coupled Logic), based on bipolar junction transistors •Originally, TTL chips were fast but used lots of power, and CMOS chips used little power but were slow. •CMOS chips are sensitive to static discharge, and must be handled carefully.
  • 4. Common Characteristics of the Same Logic Family • Supply voltage range, speed of response, power dissipation, input and output logic levels, current sourcing and sinking capability, fan-out, noise margin, etc. • Consequence: choosing digital ICs from the same logic family guarantees that these ICs are compatible with respect to each other and that the system as a whole performs the intended logic function. 4
  • 5. Two Kinds of Transistors •In Electronic Devices & Circuits (EET 2201) you’ll study two major classes of transistors: •Bipolar Junction Transistors (BJTs) •Metal-Oxide Semiconductor Field Effect Transistor (MOSFETs)
  • 6. DIODE TRANSISTOR LOGIC DIODE TRANSISTOR LOGIC 5V FILL IN THE TRUTH TABLE +V A A Y DIODE 1k 0 0 0V A 0 1 Y 1k MMBT3904 1 0 DIODE 1 1 0V B What logic function is this circuit?
  • 8. Basic Logic Families • TTL – transistor-transistor logic based on bipolar transistors. • CMOS – complementary metal-oxide semiconductor logic based on metal- oxide-semiconductor field effect transistors (MOSFETs). • ECL – emitter coupled logic based on bipolar transistors.
  • 10. General Characteristics of Basic Logic Families • CMOS consumes very little power, has excellent noise immunity, and is used with a wide range of voltages. • TTL can drive more current and uses more power than CMOS. • ECL is fast, with poor noise immunity and high power consumption.
  • 11. Introduction • Uses bipolar technology including NPN transistors, diodes and resistors. • The NAND gate is the basic building block • Contains different subfamilies with varying characteristics such as speed and power consumption 11
  • 12. Example Logic Families • General comparison or three commonly available logic families. the most important to understand
  • 13. Standard TTL NAND Gate 13
  • 14. What is a totem pole? In art and history…. Totem poles are carved and painted vertical logs, constructed by many northwest coast native American Indian people. The poles display mythological images, animal spirits whose significance is their association with the lineage. 14
  • 15. Totem-Pole Output • Most chips you’ve used up to now have had totem-pole outputs.
  • 16. Totem pole in TTL ? • What is totem pole? – addition of an active pull up circuit in the output of a gate is called totem pole. Using Q3 and Q4 to achieve this purpose • Why totem pole? – To increase the switching speed of the gate which is limited due to the parasitic capacitance at the output. 16
  • 17. Totem Pole Outputs • The standard TTL output configuration with a HIGH output and a LOW output transistor, only one of which is active at any time. • A phase splitter transistor controls which transistor is active.
  • 19. Advantages of Totem Pole Configuration • Changes state faster than open- collector outputs. • No external components are required.
  • 20. Totem Pole Switching Noise • Caused by one output transistor turning off slower than the other turns on. • Briefly shorts VCC to ground. • Prevented with use of decoupling capacitors.
  • 25. XOR Gate 25
  • 26. Transistor-Transistor Logic Families • Transistor-Transistor Logic Families: – 74L Low power – 74H High speed – 74S Schottky – 74LS Low power Schottky – 74AS Advanced Schottky – 74ALS Advance Low power Schottky
  • 27. Standard TTL Transistor Switching Problem • Trs are driven into deep saturation to fully conduct, or cutoff to switch off. • The result of deep saturation is that the two junctions are now forward biased. • The forward biasing of the BC junction forces a large number of minority carriers to the collector region. • When the Tr switches off, these minority carriers needs to be removed. This takes a finite amount of time called the storage time (major component of the propagation delay) and thus increases the switch off time. 27
  • 28. MOSFET Types • Depletion-mode. • Enhancement-mode: – n-channel – p-channel • CMOS (complementary) constructed from both n- and p-channel transistors.
  • 30. MOSFET METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS P-CHANNEL ENHANCEMENT N-CHANNEL ENHANCEMENT TO TURN ON GATE MUST BE TO TURN ON GATE MUST BE LOWER THAN SOURCE HIGHER THAN SOURCE
  • 31. MOSFET METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS C-MOS 5V 5V 5V 5V 5V +V +V +V +V +V 10k S 10k S P-MOS 5V 5V D G P-MOSD G 0V Vin P-MOS 0V Vin Vout 0V G N-MOS 0V G D N-MOS D 10k 10k N-MOS S S TO TURN ON TO TURN ON ON TO TURN TO TURN ON GATE HIGHER GATE HIGHER GATE LOWER GATE LOWER THAN SOURCE THAN SOURCE THAN SOURCE THAN SOURCE
  • 32. MOSFET BIAS Requirements • Operates in two modes: • Cutoff – acts as a very high impedance between the drain and the source. • Ohmic – equivalent of saturation. Acts like a relatively low resistance between the drain and the source.
  • 33. CMOS COMPLIMENTARY METAL OXIDE SEMICONDUCTOR
  • 34. CMOS COMPLIMENTARY METAL OXIDE SEMICONDUCTOR C-MOS 5V +V P-MOS 0V Vin Vout N-MOS
  • 35. CMOS Quiescent vs. Dynamic Current • Quiescent current flows when the gate is in a steady state and is usually small. • Dynamic current flows when the gate is changing state. • The faster a CMOS gate switches, the more current (and the more power) it
  • 36. Power Dissipation • The measure of energy used over time by electronic logic gates. • The product of the voltage and current required for the operation of the circuit.
  • 37. Fan-In • Number of input signals to a gate – Not an electrical property – Function of the manufacturing process NAND gate with a Fan-in of 8
  • 38. Fanout Definitions • Driving gate is the gate whose output supplies current to the inputs of other gates. • Load gate is a gate whose input current is supplied by the output of another gate. • A measure of the ability of the output of one gate to drive the input(s) of subsequent gates
  • 39. Fanout • The number of gates that a logic gate is capable of driving without possible logic error. • Limited by the maximum current a gate can supply in a given logic state versus the current requirements of the load.
  • 40. Fan out • Also known as loading factor • Defined as the maximum number of logic inputs that an output can drive reliably • A logic circuit that specify to have 10 fan out can drive 10 logic inputs ©2009, CE Department
  • 41. • How many 74LS00 NAND gate inputs can be driven by a 74LS00 NAND gate outputs ? Solution: Refer to data sheet of 74LS00, the maximum values of IOH = 0.4mA, IOL = 8mA, IIH = 20uA, and IIL = 0.4mA Hence, fan-out(high) = IOH(max) / IIH (max)=0.4mA/20uA=20 fan-out(low) = IOL(max) / IIL(max)=8mA/0.4mA=20, the overall fan-out = fan-out(high) or fan-out(low) whichever is lower. Hence, overall fan-out = 20
  • 42. ECL
  • 43.
  • 45. The ECL Digital IC Family 8-14 The ECL Digital IC Family Basic ECL circuit – differential amplifier This circuit produces complementary outputs: VOUT1 , equal to VIN , and VOUT2 , equal to VIN.
  • 46. The ECL Digital IC Family 8-14 The ECL Digital IC Family ECL OR/NOR Gate OR The fundamental ECL gate. The basic ECL circuit can be used as an INVERTER if the output is taken at VOUT1.
  • 47. The ECL Digital IC Family 8-14 The ECL Digital IC Family • ECL characteristics: – Very fast switching with typical propagation delay of 360 ps—faster than TTL or CMOS. – The standard ECL logic levels are nominally -0.8 V and 1.7 V for logical 1 and 0 respectively. – Worst-case noise margins approximately 150 mV. – ECL logic gates usually produce an output and its complement, eliminating the need for inverters. – Current flow remains constant, eliminating noise spikes
  • 48.
  • 50. PLD’sInputs Most of these devices are based on a two level structure (sum of products form). AND products OR plane plane outputs
  • 51. In practice this might be represented as: inputs PLD notation A B C D •The fusible links are made A.C + B.C D + A at the x’s, otherwise outputs blown.
  • 52. Inverted inputs A B inputs A.B + A.B A + B = B outputs
  • 53. PLD’s – The main types of PLD include: • PLA’s (programmable logic arrays) • PAL’s (programmable array logic) • PROM’s (programmable read only memory)
  • 54. PLA’s A B A programmable logic array (PLA) has all links programmable in both AND and OR arrays. Very flexible. Many applications don’t require such flexibility
  • 55. – AND plane PALs programmable AABB – OR plane fixed A F4 F1 – Not so flexible 1 – Operate faster B 3 P because hard- 2 wired OR’s F5 F8 switch quicker than programmable links programmed links.
  • 56. PAL’s AABB • P = A.notB + notA.B A • Use gate 1 to F4 F1 implement the 1st product term and 1 P 3 gate 2 to B 2 implement the second F5 F8 • First term blow F2 and F3 • Second term blow F5 and F8
  • 57. PALs Shorthand Notation A B CD E P P = A.C.D

Notas do Editor

  1. -These families vary by speed, power consumption, cost, voltage & current levels….