19EICN

Course Code: 19EICN1602
Couse Name: Embedded System
Design
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Dept of EIE

UNIT I – INTRODUCTION
 Embedded System
 Classification of Embedded System
 Processors in the embedded system
 Processor and Memory organization
 DMA
 Timer and Counting devices
 Device drivers
 Interrupt service mechanism
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Dept of EIE

System Definition
• A way of working, organizing or performing one or many tasks
according to a fixed set of rules, program or plan.
OR
• System is also an arrangement in which all units assemble and work
together according to a program or plan.
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Examples of Systems
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Embedded System Definitions:
• “An embedded system is a system that has software
embedded into computer-hardware, which makes a system
dedicated for an application(s) or specific part of an
application or product or part of a larger system”.
or
• “An embedded system is one that has a dedicated purpose
software embedded in a computer hardware”
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Embedded System
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Let’s consider a Computer
Microproc
essor
Output
units
Input
units
I/O units
Large
Memory
Networking
units
Operating
system
General
purpose user
interfaces and
application
(a) Primary
memory - RAM,
ROM and fast
accessible
caches
(b) Secondary
memory hard
disks, CD-ROM or
Memory
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Embedded systems everywhere?
• Biomedical Instrumentation – ECG Recorder, Blood cell recorder,
patient monitor system
• Communication systems – pagers, cellular phones, cable TV
terminals, fax and transreceivers, video games and so on.
• Peripheral controllers of a computer – Keyboard controller,
DRAM controller, DMA controller, Printer controller, LAN
controller, disk drive controller.
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Embedded systems everywhere?
• Industrial Instrumentation – Process controller, DC motor
controller, robotic systems, CNC machine controller, close loop
engine controller, industrial moisture recorder cum controller.
• Scientific – digital storage system, CRT display controller, spectrum
analyser.
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What is inside an embedded system ?
• Every embedded system consists of custom-built hardware around
a Central Processing Unit (CPU).
• This hardware also contains memory chips onto which the
software is loaded.
• The software residing on the memory chip is also called the
‘firmware’.
• The operating system runs above the hardware, and the application
software runs above the operating system.
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• The same architecture is applicable to any computer including a
desktop computer.
• However, there are significant differences. It is not compulsory to
have an operating system in every embedded system.
• For small appliances such as remote control units, air-conditioners,
toys etc., there is no need fir an operating system and we can write
only the software specific to that application.
• For applications involving complex processing, it is advisable to
have an operating system.
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Dept of EIE

• In such a case, you need to integrate the application software
with the operating system and then transfer the entire software
on to the memory chip.
• Once the software is transferred to the memory chip, the
software will continue to run for a long time and you don’t
need to reload new software.
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Properties
• I/O units such as touch screen, modem, fax cum modem etc.
• Input units such as keyboard, mouse, digitizer scanner, etc.
• Output units like LCD screen, video monitor, printer, etc.
• Networking units like Ethernet card, front-end processor-based
server, bus drivers, etc.
• General purpose user interfaces: software, mostly in secondary
memory.
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Three main embedded components are
1
• Embeds hardware to give computer like functionalities
2
• Embeds main application software generally into flash or
ROM and the application software performs concurrently
the number of tasks.
3
• Embeds a real time operating system ( RTOS), which
supervises the application software tasks running on the
hardware and organizes the accesses to system resources
according to priorities and timing constraints of tasks in the
system.
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Components of Embedded System Hardware/
Architecture
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Characteristics
1. Dedicated functions
2. Dedicated complex algorithms
3. Dedicated (GUIs) and other user interfaces for the
application
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Characteristics
4. Real time operations— Defines the ways in which the
system works, reacts to the events and interrupts, schedules
the system functioning in real time and executes by
following a plan to control the latencies and to meet the
deadlines.
[Latency — Waiting interval between the instance at which a
need to run the codes arises for task (or interrupt service
routine) following an event and instance of start executing
the codes]
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Characteristics
5. Multi-rate operations — Different operations may take
place at distinct rates. For example, the audio, video,
network data or stream and events have the different rates
and time constraints to finish associated processes.
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Constraints of an Embedded System Design
Available system-memory
 Available processor speed
 Limited power dissipation when running the system
continuously in cycles of the system start, wait for event,
wake-up and run, sleep and stop.
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System design constraints
Performance
 Power
 Size
 Non-recurring design cost
 Manufacturing costs
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PROCESSOR IN EMBEDDED SYSTEM
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Processor two units
• Program Flow and data path Control Unit (CU)
• Execution Unit (EU)
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Program Flow and data path Control Unit (CU)
• Includes a fetch unit for fetching instructions from the
memory.
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Execution Unit (EU)
Includes circuits for arithmetic and logical unit (ALU),
and for instructions for a program control task, say, data
transfer instructions, halt, interrupt, or jump to another set of
instructions or call to another routine or sleep or reset
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System Designer Considerations
Processor Instructions in the Instruction set.
 Processor ability to solve the complex algorithms used in
meeting the deadlines for their processing.
 Maximum bits in operand (8 or 16 or 32) in a single arithmetic
or logical operation.
 Internal and External bus-widths in the data-path.
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System Designer Considerations
• Clock frequency in MHz and processing Speed
• Million Instructions Per Second (MIPS)
• Million Floating Point Instructions Per Second (MFLOPS)
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1a. General purpose microprocessor
For example
• Intel 80x86,
• Sparc,
• Motorola 68HCxxx
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1b. Embedded general purpose processor
• Fast context switching features, use of on-chip Compilers,
for example, Intel® XScale™
• Applications Personal Internet Client Architecture-based
PDAs, cell phones and other wireless device
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2. Application Specific Instruction- Set Processor
(ASIP)
(a)Microcontroller
(b) DSP
(c) Media processor
(d) IO processor
(e) Network processor
(f) A domain specific processor
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(a)Microcontroller
• Intel, Motorola, Hitachi, TI, Philips and ARM, …
For example,
• Intel® — MCS51,
• Philips® - 51XA, 51MX,
• Motorola — 68HC11, 68HC12, 68HC16
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(b) DSP
Texas Instruments- C28x
Series, C54xx or C64xx
 Analog Devices SHARC
TigerSHARC,
 Motorola 5600xx
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(C) Media processor
• TI DSP TMS320DM310 or Trimedia
• Phillips Media Processor 1x00 series for Processing
Streaming and Data Networks and Image, Video and Speech:
PNX 1300, PNX 1500 (2002)
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Dept of EIE

Classification of Embedded Systems
• Small Scale Embedded Systems
• Median Scale Embedded Systems
• Sophisticated (Large Scale) Embedded Systems
Dept of EIE 19EICN1602 - ESD 33

Small Scale Embedded Systems
• Designed with a single 8- or 16-bit microcontroller.
• Little hardware and software complexities and involve board-level design.
• Tools for development of embedded software– Editor, assembler and
cross assembler, Integrated Development Environment (IDE) specific to
the microcontroller or processor used.
• C or Java used for developing.
• C program compilation is done into the assembly, and executable codes
are then appropriately located in the system memory.
• Software fits within the memory available and keep in view then need to
limit power dissipation when system is running continuously.

Microcontrollers in small scale Embedded systems

Median Scale Embedded Systems
• Designed with a single or few 16- or 32- bit microcontrollers or DSPs or
Reduced Instruction Set Computers (RISCs).
• Employs the readily available single purpose processors.
• Employ the readily available IPs for the various functions for example,
bus interfacing.
• Both hardware and software complexities are available.
• Programming tools: C/C++/Visual C++/Java, RTOS, and Source code
engineering tool, Simulator, Debugger and Integrated Development
Environment (IDE).
• Software tools provide the solution to the hardware complexities.

Microcontrollers in Medium scale Embedded systems

Sophisticated Embedded Systems
• Enormous hardware and software complexities and may need scalable
processors or configurable processors and programmable logic arrays.
• Used for cutting edge applications that need hardware and software co-
design and components integration in the final system.
• Constrained by the processing speeds available in their hardware units.
• Certain software functions such as
• Encryption and deciphering algorithms
• Discrete cosine transformation
• Inverse transformation algorithms
• TCP/IP protocol stacking
• Network driver functions implemented in the hardware to obtain
additional speeds by saving time.

Sophisticated Embedded Systems
• Development tools for these systems may not be readily available at
a reasonable cost or may not be available at all.
• In some cases, a compiler or retargetable compiler might have to be
developed for these.
• A retargetable compiler is one that configures according to the given
target configuration in a system.

Microcontrollers in large-scale embedded
systems

Processors in the Embedded system
• Processors are the major part in embedded systems that take response
from sensors in digital form and processing of this response to produce
output in real-time processing environment is performed using
processors.
• For an embedded system developer it is essential to have the knowledge
of both microprocessors and microcontrollers.

Processors in a System
• A processor has two essential units −
• Program Flow Control Unit (CU)
• Execution Unit (EU)
• Control unit: This unit in processors performed the program flow control
operation inside an embedded system. The control unit also acts as a
fetching unit for fetching the set of instructions stored inside a memory.
• Execution unit: This unit is used for execution the various tasks inside a
processors. It mainly comprises of arithmetic and logical unit (ALU) and it
also include a circuit that executes the instruction sets used to perform
program control operation inside processors.

Types of processors:
Processors inside an embedded system are of the following categories:
• Application Specific System Processor(ASSP): ASSP is application
dependent system processor used for processing signal of embedded
system. Therefore for different application performing task a unique set of
system processors is required.
• Application Specific Instruction Processor(ASIP): ASIP is application
dependent instruction processors. It is used for processing the various
instruction set inside a combinational circuit of an embedded system.
• General Purpose Processor (GPP): GPP is used for processing signal from
input to output by controlling the operation of system bus, address bus and
data bus inside an embedded system.

Types of Processors

Types of General Purpose Processor (GPP)
• Microprocessor
• Microcontroller
• Embedded Processor
• Digital Signal Processor
• Media Processor

General Purpose Processor
• ALU
• Processor circuit does sequential operations and a clock
guides these.
• Program counter and stack pointer, which points to the
instruction to be fetched and top of the data pushed into the
stack.
• Certain processor have on-chip memory management unit
(MMU).

Processor
• Processor may have
• CISC (Complex Instruction Set Computer) or
• RISC (Reduced Instruction Set Computer) architecture
may affect the system design
• CISC has ability to process complex instructions and
complex data sets with few registers as it provides for a large
number of addressing modes.

CISC vs RISC

CISC vs RISC
RISC CISC
1. RISC stands for Reduced Instruction Set
Computer.
1. CISC stands for Complex Instruction Set
Computer.
2. RISC processors have simple instructions
taking about one clock cycle. The average clock
cycle per instruction (CPI) is 1.5
2. CSIC processor has complex instructions that
take up multiple clocks for execution. The
average clock cycle per instruction (CPI) is in
the range of 2 and 15.
3. Performance is optimized with more focus
on software
3. Performance is optimized with more focus
on hardware.
4. It has no memory unit and uses separate
hardware to implement instructions..
4. It has a memory unit to implement complex
instructions.
5. It has a hard-wired unit of programming. 5. It has a microprogramming unit.

CISC vs RISC
RISC CISC
6. The instruction set is reduced i.e. it has only
a few instructions in the instruction set. Many
of these instructions are very primitive.
6. The instruction set has a variety of different
instructions that can be used for complex
operations.
7. The instruction set has a variety of different
instructions that can be used for complex
operations.
7. CISC has many different addressing modes
and can thus be used to represent higher-level
programming language statementsmore
efficiently.
8. Complex addressing modes are synthesized
using the software.
8. CISC already supports complex addressing
modes
9. Multiple register sets are present 9. Only has a single register set
10. RISC processors are highly pipelined
10. They are normally not pipelined or less
pipelined

CISC vs RISC
RISC CISC
11. The complexity of RISC lies with the
compiler that executesthe program
11. The complexity lies in the microprogram
12. Execution time is very less 12. Execution time is very high
13. Code expansion can be a problem 13. Code expansion is not a problem
14. The decoding of instructions is simple. 14. Decoding of instructions is complex
15. It does not require external memory for
calculations
15. It requires externalmemory for
calculations
16. The most common RISC microprocessors
are Alpha, ARC, ARM, AVR, MIPS, PA-RISC, PIC,
Power Architecture,and SPARC.
16. Examples of CISC processors are the
System/360, VAX, PDP-11, Motorola 68000
family, AMD, and Intel x86 CPUs.
17. RISC architectureis used in high-end
applications such as video processing,
telecommunications, and image processing.
17. CISC architectureis used in low-end
applications such as security systems, home
automation, etc.

Organization of Processor and Memory

Memory Hierarchy

Computer Memory
• The memory can be classified in various ways i.e. based on the location,
power consumption, way of data storage etc...
• Computer memory is of two types: Volatile (RAM) and Non-volatile
(ROM).
The memory at the basic level can be classified as
1. Processor Memory (Register Memory)
2. Internal on-chip Memory
3. Primary Memory
4. Cache Memory
5. Secondary Memory

Memory Types

Processor Memory (Register Memory)
• Register memory is the smallest and fastest memory in a computer. It is not a
part of the main memory and is located in the CPU in the form of registers,
which are the smallest data holding elements.
• Most processors have some registers associated with the arithmetic logic
units.
• They store the operands and the result of an instruction. The data transfer
rates are much faster without needing any additional clock cycles.
• The number of registers varies from processor to processor.
• The more is the number of clock the faster in the instruction execution.
• But the complexity of the architecture puts a limit on the amount of the
processor memory.

Processor Memory (Register Memory)
• Refers to the integration of a processor with Random Access Memory (RAM)
on a single chip.
• Registers hold a small amount of data around 32 bits to 64 bits. The speed of
a CPU depends on the number and size (no. of bits) of registers that are built
into the CPU.
• Registers can be of different types based on their uses.
• Some of the widely used Registers include Accumulator, Data Register, the
Address Register, Program Counter, I/O Address Register, and more.

Types and Functions of Computer Registers:
• Data Register: It is a 16-bit register, which is used to store operands
(variables) to be operated by the processor. It temporarily stores data,
which is being transmitted to or received from a peripheral device.
• Program Counter (PC): It holds the address of the memory location of
the next instruction, which is to be fetched after the current instruction is
completed. So, it is used to maintain the path of execution of the different
programs and thus executes the programs one by one, when the previous
instruction gets completed.

Types and Functions of Computer Registers:
• Instructor Register: It is a 16-bit register. It stores the instruction which
is fetched from the main memory. So, it is used to hold instruction codes,
which are to be executed. The Control Unit takes instruction from
Instructor Register, then decodes and executes it.
• Accumulator Register: It is a 16-bit register, which is used to store the
results produced by the system. For example, the results generated by
CPU after the processing are stored in the AC register.
• Address Register: It is a 12-bit register that stores the address of a
memory location where instructions or data is stored in the memory.
• I/O Address Register: Its job is to specify the address of a particular I/O
device.
• I/O Buffer Register: Its job is to exchange the data between an I/O
module and the CPU.

Internal on-chip Memory
• Internal memory in the computer is the memory that is directly
accessible by the processor without accessing the input-output channel
of the computer. The internal memory is accessed by the processor over
the system bus.
• Internal memory is also referred to as the primary memory or the
main memory of the computer. The internal memory is used to hold the
instructions or data that is currently being executed.
• The internal memory of a computer can be classified as RAM, ROM, and
cache memory.

Primary Memory
Primary Memory is of two types: RAM and ROM.
RAM (Volatile Memory)
• It is a volatile memory. It means it does not store data or instructions
permanently. When switch on the computer the data and instructions from
the hard disk are stored in RAM.
• CPU utilizes this data to perform the required tasks. As soon as shut down
the computer the RAM loses all the data.
ROM (Non-volatile Memory)
• It is a non-volatile memory. It means it does not lose its data or programs
that are written on it at the time of manufacture. So it is a permanent
memory that contains all important data and instructions needed to perform
important tasks like the boot process.

Cache Memory
• This is situated in between the processor and the primary
memory. This serves as a buffer to the immediate
instructions or data which the processor anticipates.
• The cache memory is a volatile memory that loses its
memory content once the power supply to the memory unit
is interrupted. The cache memory keeps the copies of the
recently accessed information from the main memory.
• Whenever the same information is required again it is
accessed from the cache memory which enhances the
performance of the system. In this way the cache memory
stores the frequently use information. The cache memory is
faster and costlier and smaller than RAM memory.

Secondary Memory
• The secondary storage devices which are built into the computer or connected to the
computer are known as a secondary memory of the computer. It is also known as
external memory or auxiliary storage.
• The secondary memory is accessed indirectly via input/output operations. It is non-
volatile, so permanently stores the data even when the computer is turned off or
until this data is overwritten or deleted. The CPU can't directly access the secondary
memory. First, the secondary memory data is transferred to primary memory then
the CPU can access it.
• HardDisk
• Solid-state Drive
• Pen drive
• SD Card
• Compact Disk (CD)
• DVD

Comparison Between Primary and Secondary
Memories
• Primary memory is the computer’s main memory and stores data temporarily.
• Secondary memory is external memory and saves data permanently.
• Data stored in primary memory can be directly accessed by the CPU, which cannot
be accessed in secondary memory.
• Primary memory is lost during a power outage, while secondary memory saves the
data.
• Primary memory is volatile, while secondary memory is non-volatile.
• Primary memory is stored on semiconductor chips, while secondary memory is
stored on external hardware devices.
• Primary memory is classified into cache and random access memory, while
secondary memory has no such categories.
• Primary memory is faster.

Memory Organization
• RAM
• ROM
• Addresses
• Random Access Model of Memory
• Store and load instructions
• Alignment of multibyte store and load in a memory organization
• Little endian and big endian in a memory organization
• Processor memory organization:
1. Von-Neumann architecture
2. Harvard architecture

Address
• Memory (both RAM and ROM) divided into a set of storage locations,
each of which can hold 1 byte (8 bits) of data.
• The storage locations are numbered, and the number of a storage
location (called its address) is used to tell the memory system which
location the processor wants to reference.
• Important characteristics of a computer system is the width of the
addresses it uses, which limits the amount of memory that the
processor can address.
• Most current computers use either 32-bit or 64-bit addresses,
allowing them to access either 232 or 264 bytes of memory.

Random Access Model of Memory
• Simple model for RAM and ROM
• Both has random-access model of memory
• All memory operations take the same amount of time independent of
the address of the byte or word at the memory.
-Store and load instructions

Alignment of Multibyte Store and Load in a Memory
Organisation
• Some memory organization requires loads and stores to be "aligned. A
4-byte word has been aligned at address 0x000C or 0x1000, which is a
multiple of 4.
• This simplifies the organization of the memory system.

Little Endian and Big Endian in a Memory Organisation
• Some processor and memory organization requires little endian and
other big endian aligned multiple bytes when there is store into the
memory or load into the processor from memory.
• ARM processor permits programming at the start and enables a
programmer to define one of the word-alignments little endian or big
endian at the beginning.

Von Neumann Architecture
• In a Von-Neumann architecture, the same memory and bus are used
to store both data and instructions that run the program.
• Since it cannot access program memory and data memory
simultaneously, the Von Neumann architecture is susceptible to
bottlenecks and system performance is affected.

Harvard Architecture
• Compared with the Von Neumann architecture, a Harvard architecture
processor has two outstanding features.
• First, instructions and data are stored in two separate memory
modules; instructions and data do not coexist in the same module.
• Second, two independent buses are used as dedicated communication
paths between the CPU and memory; there is no connection between
the two buses.

Harvard and Von-Neumann Memory Organizations
Von Neumann: Same memory for program and data
Harvard: Different memory for data and program

Harvard and von-Neumann Memory Organizations

Harvard and Von-Neumann Memory Organizations

Direct Memory Access (DMA)
• An important aspect governing the Computer System
performance is the transfer of data between memory and I/O
devices.
• The operation involves loading programs or data files from disk
into memory, saving file on disk, and accessing virtual memory
pages on any secondary storage medium.
• Consider a typical system consisting of a CPU , memory and one
or more input/output devices as shown in fig.
• Assume one of the I/O devices is a disk drive and that the
computer must load a program from this drive into memory.

Computer System with DMA

• The CPU would read the first byte of the program and then write that
byte to memory.
• Then it would do the same for the second byte, until it had loaded the
entire program into memory.
• This process proves to be inefficient. Loading data into, and then writing
data out of the CPU significantly slows down the transfer.
• The CPU does not modify the data at all, so it only serves as an
additional stop for data on the way to it’s final destination.
• The process would be much quicker if we could bypass the CPU &
transfer data directly from the I/O device to memory.
• Direct Memory Access does exactly that.
Direct Memory Access

Implementing DMA in a Computer System
• A DMA controller implements direct memory access in a computer
system.
• It connects directly to the I/O device at one end and to the system
buses at the other end.
• It also interacts with the CPU, both the system buses and two new
direct connections.
• It is sometimes referred to as a channel. In an alternate
configuration, the DMA controller may be incorporated directly into
the I/O device.

Data Transfer using DMA Controller
• To transfer data from an I/O device to memory, the DMA controller
first sends a Bus Request to the CPU by setting BR to 1.
• When it is ready to grant this request, the CPU sets it’s Bus grant
signal, BG to 1.
• The CPU also tri-states it’s address, data, and control lines thus truly
granting control of the system buses to the DMA controller.
• The CPU will continue to tri-state it’s outputs as long as BR is
asserted.

Internal Configuration
The DMA controller includes several registers :-
• The DMA Address Register contains the memory address to be used in
the data transfer. The CPU treats this signal as one or more output
ports.
• The DMA Count Register, also called Word Count Register, contains the
no. of bytes of data to be transferred. Like the DMA address register, it is
treated as an O/P port (with a diff. Address) by the CPU.
• The DMA Control Register accepts commands from the CPU. It is also
treated as an O/P port by the CPU.
• The most DMA controllers also have a Status Register. This register
supplies information to the CPU, which accesses it as an I/O port.

Internal Configuration of DMA Controller

Process of DMA Transfer

Process of DMA Transfer
• To initiate a DMA transfer, the CPU loads the address of the first memory
location of the memory block (to be read or written from) into the DMA
address register. It has an I/O output instruction, such as the OTPT
instruction for the relatively simple CPU.
• Then it writes the no. of bytes to be transferred into the DMA count register
in the sane manner.
• Finally, it writes one or more commands to the DMA control register. These
commands may specify transfer options such as the DMA transfer mode, but
should always specify the direction of the transfer, either from I/O to
memory or from memory to I/O.
• The last command causes the DMA controller to initiate the transfer. The
controller then sets BR to 1 and, once BG becomes 1 , it take control of the
system buses.

Three modes
• Single transfer at a time and then release of the hold on the system bus.
• Burst transfer at a time and then release of the hold on the system bus.
• A burst may be of a few kB.
• Bulk transfer and then release of the hold on the system bus after the
transfer is completed.

Modification of the CPU to work with DMA
• The logic depends on when the designer wants the CPU to be able to
grant control of the system buses to the DMA controller.
• Most CPU’s allow DMA requests to be granted after the instruction has
been fetched;
• After it has been decoded, after it’s operations have been fetched ;
• After the instruction has been executed, and after it’s results have been
stored.

Summary
• Advantages of DMA
• Computer system performance is improved by direct transfer of data
between memory and I/O devices, bypassing the CPU.
• CPU is free to perform operations that do not use system buses.
• DMA speedups the memory operations by bypassing the involvement of
the CPU.
• For each transfer, only a few numbers of clock cycles are required
• Disadvantages of DMA
• In case of Burst Mode data transfer, the CPU is rendered inactive for
relatively long periods of time.
• Cache coherence problem can be seen when DMA is used for data
transfer.
• Increases the price of the system.

Timer / Counter
• The clock pulses are internally given at the specific time
intervals in case of functioning as timer.
• A device for counting when the inputs to count are given
externally. Counter is given the input to count from external
input pin.
• A timer uses the frequency of the internal clock, and generates
delay.
• A counter uses an external signal to count pulses.

Timer
• A timer is a specialized type of clock which is used to
measure time intervals.
• A timer that counts from zero upwards for measuring time
elapsed is often called a stopwatch.
• It is a device that counts down from a specified time interval
and used to generate a time delay.
• Timer is a device, which counts the input at regular interval
(δT) using clock pulses at its input.
• The counts increment on each pulse and store in a register,
called count register.

Counter
• A counter is a device that stores (and sometimes displays) the
number of times a particular event or process occurred, with
respect to a clock signal.
• It is used to count the events happening outside the
microcontroller.
• In electronics, counters can be implemented quite easily using
register-type circuits such as a flip-flop. A device, which counts
the input due to the events at irregular or regular intervals.

Evaluation of Time
• The counts multiplied by the interval δT give the time.
• The (present counts −initial counts) × δT interval gives the
time interval between two instances when present count bits
are read and initial counts were read or set.

Timer / Counter
• Has an input pin (or a control bit in control register) for
resetting it for all count bits = 0s.
• Has an output pin (or a status bit in status register) for
output when all count bits = 0s after reaching the maximum
value, which also means after timeout or overflow.

Timer or Counter Interrupt
• When a timer or counter becomes 0x00 or 0x0000 after
0xFF or 0xFFFF (maximum value), it can generate an
‘interrupt’, or an output ‘Time-Out’ or set a status bit ‘TOV’

Free running Counter
• A counting device may be a free running device giving
overflow interrupts at fixed intervals.
• A pre-scalar for the clock input pulses to fix the intervals.

Free Running Counter
It is useful
• for action or initiating chain of actions,
• processor interrupts at the preset instances
• noting the instances of occurrences of the events
• processor interrupts for requesting the processor to use the
capturing of counts at the input instance.
• comparing of counts on the events for future actions.

Free running (Blind Counts) Pre-scaling
• Prescalar can be programmed as p = 1, 2, 4, 8, 16, 32, ..
by programming a prescaler register.
• Prescalar divides the input pulses as per the
programmed value of p.
• Count interval = p × δT interval δT = clock pulses
period, clock frequency = δT −1

Free running (Blind Counts) Overflow
• It has an output pin (or a status bit in status register) for
output when all count bits = 0s after reaching the maximum
value, which also means after timeout or overflow.
• Free running n-bit counter overflows after p × 2n × δT
interval.

Uses of a timer device
• Real Time Clock Ticks: Real Time Clock is set for ticks
using prescaling bits (or rate set bits) in appropriate control
registers.
• Watchdog timer. It resets the system after a defined time.
• The timer acts as a counter if, in place of clock inputs, the
inputs are given to the timer for each instance to be counted.

Difference between a Timer and a Counter

Device driver definition
• A device driver has a set of routines (functions) used by a
high-level language programmer, which does the interaction
with the device hardware, sends control commands to the
device, communicates data to the device and runs the codes
for reading device data.

Device driver routine
• Each device in a system needs device driver routine with
number of device functions.
• An ISR relates to a device driver command (device-
function). The device driver uses SWI to call the related ISR
(device-function routine)
• The device driver also responds to device hardware
interrupts.

Device driver generic commands
• A programmer uses generic commands for device driver for
using a device.
• The operating system provides these generic commands.
• Each command relates to an ISR.
• The device driver command uses an SWI to call the related
ISR device-function routine.

Device Driver

Generic functions
• Generic functions used for the commands to
the device are,
create ( ),
open ( ),
connect ( ), bind ( ),
read ( ), write ( ), ioctl ( ) [for IO control],
delete ( ) and close ( ).

Device driver code
• Different in different operating system.
• Same device may have different code for the driver when
system is using different operating system.
• Does the interrupt service for any event related to the device
and use the system and IO buses required for the device
service.
• Device driver can be considered software layer between an
application program and the device.

Interrupt Concept
• Interrupt means event, which invites attention of the
processor on occurrence of some action at hardware or
software interrupt instruction event.

Interrupt

Types of Interrupts

Interrupt service routines

• An Interrupt service routine (ISR) accesses a device for service
(configuring, initializing, activating, opening, attaching, reading,
writing, resetting, deactivating or closing).
• Interrupt service routines thus implements the device functions
of the device driver.

Interrupt Sources

Action on Interrupt
• In response to the interrupt, the routine or program, which is
running presently interrupts and an interrupt service routine
(ISR) executes.

Interrupt Service Routine
• ISR is also called device driver in case of the devices and
called exception or signal or trap handler in case of software
interrupts.

Interrupt approach for the port or device functions
• Processor executes the program, called interrupt service
routine or signal handler or trap handler or exception handler
or device driver, related to input or output from the port or
device or related to a device function on an interrupt and
does not wait and look for the input ready or output
completion or device-status ready or set.

Hardware interrupt
• Examples ─ When a device or port is ready, a device or port
generates an interrupt, or when it completes the assigned
action or when a timer overflows or when a time at the timer
equals a preset time in a compare register or on setting a
status flag (for example, on timer overflow or compare or
capture of time) or on click of mice in a computer.
• Hardware interrupt generates call to an ISR.

ISR

Software Interrupt
• Examples: When software run-time exception condition (for
examples, division by 0 or overflow or illegal opcode
detected) the processor-hardware generates an interrupt,
called trap, which calls an ISR.
• When software run-time exception condition defined in a
program occurs, then a software instruction (SWI) is
executed─ called software interrupt or exception or signal,
which calls an ISR.

Software Interrupt
• When a device function is to be invoked, for example, open
(initialize/configure) or read or write or close , then a
software instruction (SWI) is executed─ called software
interrupt to execute the required device driver function for
open or read or write or close operations.

Interrupt
• Software can execute the software instruction (SWI) or Interrupt
n (INT n) to signal execution of ISR (interrupt service routine).
• The n is as per the handler address.
• Signal interrupt [The signal differs from the function in the sense
that execution of signal handler (ISR) can be masked and till
mask is reset, the handler will not execute on interrupt. Function
on the other hand always executes on the call after a call-
instruction.]

Multiple Interrupts

Thank you…
19EICN1602 - ESD 128
Dept of EIE

19EICN

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