ShikhaManrai1

multiprogramming multiple interrupts direct memory access (dma) characteristics of a hypotheti instruction register instruction fetch and execute instruction cycle program flow of control withou i/o wait timing diagram based on short disk cache programmed i/o interrupt-driven i/o scheduling and resource manage time sharing modern operating system system structure smp windows architecture client server model operating system overview process threads unix multiprocessing uniprogramming cache/main memory system secondary memory memory hierarchy classes of interrupts interrupts instruction execution control and status registers processor registers user-visible registers mbr mar operating system peterson's algorithm dekker's algorithm distributed hash table critical section fully distributed algorithm ricart & agrawala algorithm fifo order decentralized algorithm token ring algorithm centralized algorithm distributed mutual exclusion semaphore mutual exclusion algorithm