Nand and Nor Gates...Their Implementation & Scenario

1. BSCS fall-2017
Assignment Submitted To:
Mam Amna Dilawar
Assignment Submitted By:
Shefa Idrees # 101631049
Assignment Submitted By:
NAND, NOR implementation & Scenario Study
Department of Computer Science
Post Graduate College for Women
Samanabad, Lahore.

2. Universal logic gates
‘Universal logic gates’ are NAND gate and NOR gates. The reason behind this is,
NAND gate and NOR gate can perform (or can function like) all the 3 basic gates,
such as AND gate, OR gate and NOT gate. We can design any basic logic gate by
using NAND gate or NOR gate. This is why they are called as “Universal gates”.
NAND Gate or AND Invert:
In digital electronics, a NAND gate (negative-AND) is a logic gate which produces
an output which is false only if all its inputs are true; thus its output is complement to
that of the AND gate.
The sum of product or SOP form is represented by using basic logic gates like NAND
gate and NOR gate. The SOP form implementation will have the AND/NAND gate at
its input side and as the output of the function is the sum of all product terms, it has an
OR/NOR gate at its output side.
Any logic function can be implemented using NAND gates. To achieve this first logic
function has to be written in Sum Of Product (SOP) form.Once logic function is
converted to SOP, then it is very easy to implement using NAND gate. And it is easy
to derive SOP when diagram is there. For instance:

3. Implementation of Boolean functions using NAND gates
The important thing to remember about NAND gate is this is the inverse of basic
AND gate. This means the output of the NAND gate is equal to the complement of
the output of the AND gate.
Let’s see an example to understand the implementation.
Implement the Boolean function by using a NAND logic gate.
F (A, B, C, D, E) = A + (B’ + C) (D’ + BE’)
NOR Gate or Invert-AND:
NOR is the result of the negation of the OR operator. A HIGH output (1) results if
both the inputs to the gate are LOW (0); if one or both input is HIGH (1), a LOW
output (0) results.
AND-Invert Invert-OR

4. The product of sums or POS form can be represented by using basic logic gates like
NAND/AND gate and NOR/OR gates. The POS form implementation will have the
NOR/OR gate at its input side and as the output of the function is product of all sum
terms, it has NAND/AND gate at its output side. In POS form implementation, we use
NOT gate to represent the inverse or complement of the variables.
Any logic function can be implemented using NOR gates. To achieve this, first the
logic function has to be written in Product of Sum (POS) form. Once it is converted to
POS, then it's very easy to implement using NOR gate. And it is easy to derive SOP
when diagram is there. For instance:
Implementation of Boolean functions using NOR gates
NOR gate is the combination of OR gate and NOT gate and this can function like
AND gate, OR gate and NOT gate. So we use NOR gate to implement the Boolean
functions. The important thing to remember about NOR gate is this is the inverse of
basic OR gate. This means the output of the NOR gate is equal to the output of the
OR gate.
Let’s see an example to understand the implementation.

5. Implement the Boolean function by using NOR logic gate.
g (A, B, C, D, E, F) = (A E) + (B D E) + (B C E F)
We can solve the given equation as
g (A, B, C, D, E, F) = AE + BDE + BCEF
= (A + BD + BCF) E
= (A + B (D + CF)) E
In NOR gate implementation, we use NOR gates at both input and output side.
Observe the designed logic diagram below.
Scenario:
Three friends are trying to decide what to do Saturday night (combine study or
combine assignment). They settle the issue by a vote (everyone gets a single vote, the
ACTIVIY with the most votes wins.)Assume you want a computer to automatically
compile the votes and declare the winning activity.
Input logic variables:
V1 = Vote of person 1 (T=Combine assignment, F=Combine study)
V2 = Vote of person 2 (T=Combine assignment, F=Combine study)

6. V3 = Vote of person 3 (T=Combine assignment, F=Combine study)
Output logical variables:
ACTIVIY = Choice of ACTIVIY (T=Combine assignment, F=Combine study)
Logical expression:
ACTIVIY = (V1 AND V2) OR (V1 AND V3) OR (V2 AND V3)
To check if the logical expression is correct computer must be ready for any input,
and must compute correct results in all cases.
Must go through all possible input combinations:
Its truth table is given below:

7. INPUTS:
V1 V2 V3
OUPUTS:
ACTIVIY
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
Diagram for example:

8. Reference
http://www.electronicshub.org/implementation-of-boolean-functions-usin
g-logic-gates/
http://homepages.cae.wisc.edu/~ece352/fall01_kime/lectures/Lecture_2-7
_f01.pdf
http://www.asic-world.com/digital/gates3.html
https://en.wikipedia.org/wiki/NOR_gate
https://en.wikipedia.org/wiki/NAND_gate