The document discusses Ceph storage performance on ARM64 processors. It notes that ARM64 chips are well-suited for storage workloads due to their SoC approach that allows for direct connect DMA and optimization for moving data rather than processing. The document outlines results showing ARM64 can provide power, density and cooling benefits for Ceph clusters compared to x86 servers. It also briefly mentions opportunities for hardware acceleration of erasure coding and interest in multiprocessor ARM64 chips for scaling Ceph performance.

1. Ceph on ARM64
Phil Straw - CTO April 2018

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Since 2012ARM

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ARM64 & Storage
SoC ApproachMore than
an instruction
set
Great for
Storage
ARM

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Results

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Direct connect DMA ethernet/media storage
Silicon Path
Optimization
Not Processing!Velocity of Bytes

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SoC not a chipset even in mentality
Wait StatesI/O Channels DMA

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Not all SoCs are Equal
A57?Chef’s ChoiceARM64

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Software tuning
“Porting to ARM” Entire Stack
Important

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X86 versus ARM64
Heat Power I/O Compute

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Power, density, cooling MTBF
Airflow First ARMMTBF Uplift

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Power overflow to more and more parts, cooling, more
power, heat makes use more power in silicon
Power = Waste Waste = Crime Lack of
Imagination

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Looking to the future (just a little)

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Multiprocessor
Ceph Loves
Horizontal
Ceph Scales
Beautifully
Unprecedented
Speed & Density

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Hardware acceleration
Erasure Code Physics Wire speed

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