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© Copyright 2015 Xilinx
.
ZYNQ-7000
High Performance Electric Drive and
Silicon Carbide Multilevel inverter with
Scilab Hardware-in-the-loop
Giulio Corradi
Xilinx ISM Senior System Architect
Diego Quagreda
QDESYS Principal
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
AGENDA
What is an Electric Drive
– System
– Challenges
– Programmable Logic as Accelerator
Realizing The Hardware in The Loop
– ZYNQ-7000 the System On Chip
– The SCILAB Library
– The SCILAB Examples
Multi-Level Inverter
– System
– State of the Art using Silicon Carbide
– A Platform for Industry and Universities
Other Applications in Drives
– Fault Detection using Feature Extraction and Machine Vision
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Open Source platform
Accessible
Expandable
Professional level
WHY SCILAB
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Page 4
A Generation Ahead at 28nm
First 28nm tape-out
First All Programmable SoC
First All Programmable 3D IC
First SoC-strength design suite
First Errata-Free Production Release
28nm
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Page 5
Next: Create the First All Programmable MPSoC Family
Heterogeneous Multi-Processing
 Applications Processors
 Secure and Smarter Real-Time Control
 Hard Realtime & Soft Realtime Processing
 Video and Vision
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Page 6
Enabling All Programmable Heterogeneous Multi-Processing
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Page 7
WHAT IS AN ELECTRICAL DRIVE
Torque
Control
Speed
Control
Positioning
Control
La
ra
Lc
rc
rb
Lb
Power
Modulation
Motor
Load
Mechanical
Sensors
Electrical Feedback
Diagnostic
&
Safety
Networking Power
Mechanical Feedback
Braking
 An electrical drive, converts energy from an electrical power source to control efficiently a mechanical load
 Main electric to mechanical converter is an Electric Motor
 Very good performances are obtained using Permanent Magnet Motors
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Electric Drive – MAIN STAGES TIMESTEPS
The Electric Drive requires small and large timesamp simulation is challenging and often
requires uncountable iterations.
1ms 10us 100ns
POWER SOURCE
[50/60Hz]
RETTIFICATION
[100Hz/1KHz]
Non linear
POWER CONVERTER
[10KHz/100KHz]
Non linear
MOTOR
[10KHz] / [500Hz]
Electrical / Mechanical
La
ra
Lc
rc
rb
Lb
1us 100us
SPEED SENSOR
[2MHz]
Non linear
20ns
CONTROLLER
500ns
= Appropriate
time step
Networking
Synchronization
10us
1us
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
DEVELOPMENT PROCESS
Modeling
Inverter
Simulation
Testing
Model unsatisfactory
Model satisfactory
Test unsatisfactory
Modeling
Inverter
HiL
Testing
Model unsatisfactory
Test satisfactory
Test satisfactory
LONG
SHORT
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
2x GigE
with DMA
2x USB
with DMA
2x SDIO
with DMA
Static Memory Controller
Quad-SPI, NAND, NOR
Dynamic Memory Controller
DDR3, DDR2, LPDDR2
AMBA® Switches
I/O
MUX
MIO
ARM® CoreSight™ Multi-core & Trace Debug
512 KB L2 Cache
NEON™/ FPU Engine
Cortex™-A9 MPCore™
32/32 KB I/D Caches
NEON™/ FPU Engine
Cortex™-A9 MPCore™
32/32 KB I/D Caches
Snoop Control Unit (SCU)
Timer Counters 256 KB On-Chip Memory
General Interrupt Controller DMA Configuration
2x SPI
2x I2C
2x CAN
2x UART
GPIO
Processing System
AMBA® Switches
AMBA® Switches
AMBA® Switches
Zynq-7000 All Programmable SoC
The World’s First Extensible Processing Platform
Programmable
Logic:
System Gates,
DSP, RAM
XADC PCIe
Multi-Standards I/Os (3.3V & High Speed 1.8V)
Multi-StandardsI/Os(3.3V&HighSpeed1.8V)
Multi Gigabit Transceivers
PROGRAMMABLE LOGIC TO
PROCESSING SYSTEM
Page 10
PROGRAMMABLE
LOGIC TO
PROCESSING
SYSTEM
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Electric Drive - Partitioning
Page 11
La
ra
Lc
rc
rb
Lb
Bridge
Process Data
Observer (Speed)
Encoder readout
Current Measurement
Field Oriented Control IP
SVM - RPFM
SDC
DDR
La
ra
Lc
rc
rb
Lb
Bridge
Process Data
Observer (Speed)
Encoder readout
Current Measurement
Field Oriented Control IP
SVM - RPFM
UDP/ Agent
Dynamic Link Library
Industrial Networking
PC
1Gibit
PROGRAMMABLE
LOGIC
PROCESSING
SYSTEM
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Page 12
INTELLIGENT ELECTRICAL DRIVE
Torque
Control
Speed
Control
Positioning
Control
La
ra
Lc
rc
rb
Lb
Power
Modulation
Motor
Load
Mechanical
Sensors
Electrical Feedback
Diagnostic
&
Safety
Networking Power
Mechanical Feedback
Continuous Control &
Hardware in the Loop
Remote Agent
1Gigabit
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
C#
ARCHITECTURE OF THE DRIVE : The Host side
Page 13
DLL for Mat applications
C++ to C#
GUI
C#
DLL for C++ / C#
ANSI C++
ATL / COM
MANAGER
XML Database
Shared Memory
Ethernet
HARDWARE IN THE LOOP
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
ARCHITECTURE OF THE DRIVE : All together
Page 14
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
SCILAB SCRIPT
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
SCILAB script and internals
ARM #0
ARM #1
(free)
FOC
(Field Oriented Control)
VHDL
REALTIME
LOGGING
MEMORY
POWERSTAGEDRIVER
VHDL
SVM
DATAACQUISITION
(Currents&DC_Link)
VHDL
FEEDBACK(Encoders)
VHDL
REGISTERSREGISTERS
Server(agent)
Primary Ethernet (UDP/IP)
EtherCAT
CAN
Wireless
RPC
(Remote Procedure Call Manager)
PS PL
Software
qmx_runlink();
qmp_linkcmd(1); - Run the Ethernet Link
qmx_rundbsload(); - Run the Database
motor=3; - Set the motor number
qmxm_enc_rst4align(motor,1); - Align motor shaft
qmpm_req_modulator(motor,0); Set Modulator
qmpm_swt_power(motor,1); Enable
qmpm_curset_pol(motor,qmgm_iscurrflux(motor),0); Set Flux
qmpm_curset_pol(motor,qmgm_iscurrhigh(motor)*0.5,%pi/2);
Set Current 50%
qmpm_acqi_synmod(motor,1); Synch Acquisition
qmpm_acqi_automemsz(motor,0); Automatic Acquisition
qmxm_acqi_start(motor); Start Motor
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Sensorless Field Oriented Control
Sliding Mode Estimator (SDM) for rotor position and rotor speed
Page 17
motor
motor model
SDM speed estimatorBemf estimator
θ estimator
ESTIMATOR
Es * θ * ω *
is
is *
ZVS
NON LINEAR ADAPTIVE CONTROL SYSTEM
SLIDING MODE
PINK in Fabric
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
SCILAB SCRIPT
for Sensorless Control
© Copyright 2015 Xilinx
.
3- Level Inverter
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Three-level power converters are used ac-to-dc, dc-to-ac, and dc-
to-dc power conversion.
3-Levels inverter have the following benefits:
– Smaller output voltage steps reduces cables issues between the inverter and the
motor.
– Reduced surge voltages creates less EMI (electro magnetic interference)
– Output waveform deliver less Harmonic Distortion to the load
– Output filters for reconstructing the load currents are smaller, and weight less than 2-
Levels inverter.
WHAT IS A 3-LEVELS INVERTER
Page 20
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
WHY SILICON CARBIDE POWER DEVICES
Page 21
© Copyright 2015 Xilinx
.
NEW TOPOLOGY “T” NPC
SiC allows full usage of the middle switch
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
3Levels NPC & TNPC Topology
SiC1
SiC2
P
0
N
OUT
SiC3
SiC4
SiC1
SiC4
SiC3
SiC2
P
0
N
OUT
NPC TNPC
3L TNPC phase leg 8 semiconductors:
4 SiC
4 Free-Wheeling Diodes
3L NPC phase leg 10 semiconductors:
4 SiC
4 Free-Wheeling Diodes
2 Clamping Diodes
Page 23
© Copyright 2015 Xilinx
.
3-LEVELS INVERTER BLOCK
DIAGRAM
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
3-LEVELS INVERTER + INDUSTRIAL NETWORK
Page 25
PowerLink-PROFINET-EtherCAT®
ETH1
ETH2
ISM_NET
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
XILINX’s ZYNQ BASED 3-LEVELS INVERTER
DC_Link
Capacitors
MicroZed
SOM
12 Silicon
Carbide
MOSFETS
ZYNQ®-7000
ISM_NET
Industrial
Networking
265 mm
54 mm
All trademarks or registered trademarks are property of their respective
owners.
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
SCILAB LIBRARY
• 200 Functions
• Synchronizaiton functions
© Copyright 2015 Xilinx
.
Full System
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Page 29
ZYNQ-7000 EtherCAT® 3-Levels Inverter
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Zynq based design
– 1 ARM A9 used – 2nd A9 free
– FOC and Acquisition in PL
Design available for evaluation
– Vivado 2014.4
– IPIntegrator ready
10KW power in very small volume
Fast Loop allows small size
Fast Loop allows small power filters
Very Low EMI
Full Field Oriented Control
Full Sensorless Control
EtherCAT® tested
Key Take Away
© Copyright 2015 Xilinx
.
Further Information
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Video explaining the 3-Level Inverter
• http://www.qdesys.com/3-level-inverter.php
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
Provide customer with information from this presentation
Look to the video http://www.qdesys.com/3-level-inverter.php
Information
– Address requests to
• info@qdesys.com
• Michael.zapke@Xilinx.com
• Giulio.Corradi@Xilinx.com
Information
• http://www.qdesys.com/pdf/MotorControlSolutions_QDESYS_Material.pdf
XILINX CONFIDENTIAL
.
© Copyright 2015 Xilinx
.
ZedBoard
– http://zedboard.org/
Carrier Board with SiC –
– TLIMOT available from QDESYS info@qdesys.com
PicoZed
– AES-Z7PZ-7Z010-SOM-G from Avnet (If EtherCAT is not used)
– AES-Z7PZ-7Z020-SOM-G from Avnet (If EtherCAT is used)
ISM-NET
– AES-FMC-ISMNET-G from Avnet (If EtherCAT is used)
Where
© Copyright 2015 Xilinx
.
Thank You

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ScilabTEC 2015 - Xilinx

  • 1. © Copyright 2015 Xilinx . ZYNQ-7000 High Performance Electric Drive and Silicon Carbide Multilevel inverter with Scilab Hardware-in-the-loop Giulio Corradi Xilinx ISM Senior System Architect Diego Quagreda QDESYS Principal
  • 2. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . AGENDA What is an Electric Drive – System – Challenges – Programmable Logic as Accelerator Realizing The Hardware in The Loop – ZYNQ-7000 the System On Chip – The SCILAB Library – The SCILAB Examples Multi-Level Inverter – System – State of the Art using Silicon Carbide – A Platform for Industry and Universities Other Applications in Drives – Fault Detection using Feature Extraction and Machine Vision
  • 3. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Open Source platform Accessible Expandable Professional level WHY SCILAB
  • 4. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Page 4 A Generation Ahead at 28nm First 28nm tape-out First All Programmable SoC First All Programmable 3D IC First SoC-strength design suite First Errata-Free Production Release 28nm
  • 5. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Page 5 Next: Create the First All Programmable MPSoC Family Heterogeneous Multi-Processing  Applications Processors  Secure and Smarter Real-Time Control  Hard Realtime & Soft Realtime Processing  Video and Vision
  • 6. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Page 6 Enabling All Programmable Heterogeneous Multi-Processing
  • 7. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Page 7 WHAT IS AN ELECTRICAL DRIVE Torque Control Speed Control Positioning Control La ra Lc rc rb Lb Power Modulation Motor Load Mechanical Sensors Electrical Feedback Diagnostic & Safety Networking Power Mechanical Feedback Braking  An electrical drive, converts energy from an electrical power source to control efficiently a mechanical load  Main electric to mechanical converter is an Electric Motor  Very good performances are obtained using Permanent Magnet Motors
  • 8. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Electric Drive – MAIN STAGES TIMESTEPS The Electric Drive requires small and large timesamp simulation is challenging and often requires uncountable iterations. 1ms 10us 100ns POWER SOURCE [50/60Hz] RETTIFICATION [100Hz/1KHz] Non linear POWER CONVERTER [10KHz/100KHz] Non linear MOTOR [10KHz] / [500Hz] Electrical / Mechanical La ra Lc rc rb Lb 1us 100us SPEED SENSOR [2MHz] Non linear 20ns CONTROLLER 500ns = Appropriate time step Networking Synchronization 10us 1us
  • 9. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . DEVELOPMENT PROCESS Modeling Inverter Simulation Testing Model unsatisfactory Model satisfactory Test unsatisfactory Modeling Inverter HiL Testing Model unsatisfactory Test satisfactory Test satisfactory LONG SHORT
  • 10. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . 2x GigE with DMA 2x USB with DMA 2x SDIO with DMA Static Memory Controller Quad-SPI, NAND, NOR Dynamic Memory Controller DDR3, DDR2, LPDDR2 AMBA® Switches I/O MUX MIO ARM® CoreSight™ Multi-core & Trace Debug 512 KB L2 Cache NEON™/ FPU Engine Cortex™-A9 MPCore™ 32/32 KB I/D Caches NEON™/ FPU Engine Cortex™-A9 MPCore™ 32/32 KB I/D Caches Snoop Control Unit (SCU) Timer Counters 256 KB On-Chip Memory General Interrupt Controller DMA Configuration 2x SPI 2x I2C 2x CAN 2x UART GPIO Processing System AMBA® Switches AMBA® Switches AMBA® Switches Zynq-7000 All Programmable SoC The World’s First Extensible Processing Platform Programmable Logic: System Gates, DSP, RAM XADC PCIe Multi-Standards I/Os (3.3V & High Speed 1.8V) Multi-StandardsI/Os(3.3V&HighSpeed1.8V) Multi Gigabit Transceivers PROGRAMMABLE LOGIC TO PROCESSING SYSTEM Page 10 PROGRAMMABLE LOGIC TO PROCESSING SYSTEM
  • 11. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Electric Drive - Partitioning Page 11 La ra Lc rc rb Lb Bridge Process Data Observer (Speed) Encoder readout Current Measurement Field Oriented Control IP SVM - RPFM SDC DDR La ra Lc rc rb Lb Bridge Process Data Observer (Speed) Encoder readout Current Measurement Field Oriented Control IP SVM - RPFM UDP/ Agent Dynamic Link Library Industrial Networking PC 1Gibit PROGRAMMABLE LOGIC PROCESSING SYSTEM
  • 12. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Page 12 INTELLIGENT ELECTRICAL DRIVE Torque Control Speed Control Positioning Control La ra Lc rc rb Lb Power Modulation Motor Load Mechanical Sensors Electrical Feedback Diagnostic & Safety Networking Power Mechanical Feedback Continuous Control & Hardware in the Loop Remote Agent 1Gigabit
  • 13. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . C# ARCHITECTURE OF THE DRIVE : The Host side Page 13 DLL for Mat applications C++ to C# GUI C# DLL for C++ / C# ANSI C++ ATL / COM MANAGER XML Database Shared Memory Ethernet HARDWARE IN THE LOOP
  • 14. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . ARCHITECTURE OF THE DRIVE : All together Page 14
  • 15. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . SCILAB SCRIPT
  • 16. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . SCILAB script and internals ARM #0 ARM #1 (free) FOC (Field Oriented Control) VHDL REALTIME LOGGING MEMORY POWERSTAGEDRIVER VHDL SVM DATAACQUISITION (Currents&DC_Link) VHDL FEEDBACK(Encoders) VHDL REGISTERSREGISTERS Server(agent) Primary Ethernet (UDP/IP) EtherCAT CAN Wireless RPC (Remote Procedure Call Manager) PS PL Software qmx_runlink(); qmp_linkcmd(1); - Run the Ethernet Link qmx_rundbsload(); - Run the Database motor=3; - Set the motor number qmxm_enc_rst4align(motor,1); - Align motor shaft qmpm_req_modulator(motor,0); Set Modulator qmpm_swt_power(motor,1); Enable qmpm_curset_pol(motor,qmgm_iscurrflux(motor),0); Set Flux qmpm_curset_pol(motor,qmgm_iscurrhigh(motor)*0.5,%pi/2); Set Current 50% qmpm_acqi_synmod(motor,1); Synch Acquisition qmpm_acqi_automemsz(motor,0); Automatic Acquisition qmxm_acqi_start(motor); Start Motor
  • 17. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Sensorless Field Oriented Control Sliding Mode Estimator (SDM) for rotor position and rotor speed Page 17 motor motor model SDM speed estimatorBemf estimator θ estimator ESTIMATOR Es * θ * ω * is is * ZVS NON LINEAR ADAPTIVE CONTROL SYSTEM SLIDING MODE PINK in Fabric
  • 18. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . SCILAB SCRIPT for Sensorless Control
  • 19. © Copyright 2015 Xilinx . 3- Level Inverter
  • 20. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Three-level power converters are used ac-to-dc, dc-to-ac, and dc- to-dc power conversion. 3-Levels inverter have the following benefits: – Smaller output voltage steps reduces cables issues between the inverter and the motor. – Reduced surge voltages creates less EMI (electro magnetic interference) – Output waveform deliver less Harmonic Distortion to the load – Output filters for reconstructing the load currents are smaller, and weight less than 2- Levels inverter. WHAT IS A 3-LEVELS INVERTER Page 20
  • 21. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . WHY SILICON CARBIDE POWER DEVICES Page 21
  • 22. © Copyright 2015 Xilinx . NEW TOPOLOGY “T” NPC SiC allows full usage of the middle switch
  • 23. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . 3Levels NPC & TNPC Topology SiC1 SiC2 P 0 N OUT SiC3 SiC4 SiC1 SiC4 SiC3 SiC2 P 0 N OUT NPC TNPC 3L TNPC phase leg 8 semiconductors: 4 SiC 4 Free-Wheeling Diodes 3L NPC phase leg 10 semiconductors: 4 SiC 4 Free-Wheeling Diodes 2 Clamping Diodes Page 23
  • 24. © Copyright 2015 Xilinx . 3-LEVELS INVERTER BLOCK DIAGRAM
  • 25. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . 3-LEVELS INVERTER + INDUSTRIAL NETWORK Page 25 PowerLink-PROFINET-EtherCAT® ETH1 ETH2 ISM_NET
  • 26. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . XILINX’s ZYNQ BASED 3-LEVELS INVERTER DC_Link Capacitors MicroZed SOM 12 Silicon Carbide MOSFETS ZYNQ®-7000 ISM_NET Industrial Networking 265 mm 54 mm All trademarks or registered trademarks are property of their respective owners.
  • 27. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . SCILAB LIBRARY • 200 Functions • Synchronizaiton functions
  • 28. © Copyright 2015 Xilinx . Full System
  • 29. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Page 29 ZYNQ-7000 EtherCAT® 3-Levels Inverter
  • 30. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Zynq based design – 1 ARM A9 used – 2nd A9 free – FOC and Acquisition in PL Design available for evaluation – Vivado 2014.4 – IPIntegrator ready 10KW power in very small volume Fast Loop allows small size Fast Loop allows small power filters Very Low EMI Full Field Oriented Control Full Sensorless Control EtherCAT® tested Key Take Away
  • 31. © Copyright 2015 Xilinx . Further Information
  • 32. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Video explaining the 3-Level Inverter • http://www.qdesys.com/3-level-inverter.php
  • 33. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . Provide customer with information from this presentation Look to the video http://www.qdesys.com/3-level-inverter.php Information – Address requests to • info@qdesys.com • Michael.zapke@Xilinx.com • Giulio.Corradi@Xilinx.com Information • http://www.qdesys.com/pdf/MotorControlSolutions_QDESYS_Material.pdf
  • 34. XILINX CONFIDENTIAL . © Copyright 2015 Xilinx . ZedBoard – http://zedboard.org/ Carrier Board with SiC – – TLIMOT available from QDESYS info@qdesys.com PicoZed – AES-Z7PZ-7Z010-SOM-G from Avnet (If EtherCAT is not used) – AES-Z7PZ-7Z020-SOM-G from Avnet (If EtherCAT is used) ISM-NET – AES-FMC-ISMNET-G from Avnet (If EtherCAT is used) Where
  • 35. © Copyright 2015 Xilinx . Thank You