Personal Information
Organização/Local de trabalho
New Delhi Area, India India
Cargo
Analog Circuit Design Intern at ST Microelectronics
Setor
Design
Sobre
Analysis and verification of analog blocks like Level shifters, Charge pumps, Reference circuits, Ring
oscillator, Comparators, Regulators, Memory cell array, row and column decoders across PVT
conditions which are used in embedded analog non-volatile memory macros esp. EEPROMs.
Performing Monte Carlo simulations, ELDO simulations and SOA checks to know the performance
of critical analog blocks in terms of functionality and reliability.
Run PLS (post layout simulation) to check the performance of circuit, its speed, the influence of
circuit parasitic (such as parasitic capacitance and resistances).
Performing DFT (Design for testability), which facilitates a design to b...
Apresentações
(1)Personal Information
Organização/Local de trabalho
New Delhi Area, India India
Cargo
Analog Circuit Design Intern at ST Microelectronics
Setor
Design
Sobre
Analysis and verification of analog blocks like Level shifters, Charge pumps, Reference circuits, Ring
oscillator, Comparators, Regulators, Memory cell array, row and column decoders across PVT
conditions which are used in embedded analog non-volatile memory macros esp. EEPROMs.
Performing Monte Carlo simulations, ELDO simulations and SOA checks to know the performance
of critical analog blocks in terms of functionality and reliability.
Run PLS (post layout simulation) to check the performance of circuit, its speed, the influence of
circuit parasitic (such as parasitic capacitance and resistances).
Performing DFT (Design for testability), which facilitates a design to b...