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Segmentation
          Pradyumna
Definition
• Way of offering protection to different data
  types and code.
Descriptor Tables
• Descriptor table is a array of 8k Descriptors
• 3 types
  – Global Descriptor Table (GDT)
  – Local Descriptor Table (LDT)
  – Interrupt Descriptor Table (IDT)
GDT&LDT
GDT                             LDT
• Contains Global descriptors   • Contains descriptors specific
  common to all tasks             to a particular task
• Contains al the descriptor    • Contains segment , task
  types except interrupt &        gate & call gate descriptors.
  trap descriptors
IDT
• The Interrupt Descriptor Table (IDT) is a data
  structure used to implement an interrupt
  vector table.
• The IDT is used by the processor to determine the
  correct response to interrupts & exceptions.
• Use of the IDT is triggered by three types of
  events: hardware interrupts, software
  interrupts, and processor exceptions, which
  together are referred to as "interrupts".
• The IDT consists of 256 interrupt vectors
Descriptors
• These carry all the info about a segment and its
  access rights
• These have 20 bit segment limit and 32-bit
  segment address.
• 5 types of descriptors
  –   Code or data segment Descriptors
  –   System Descriptors
  –   Local Descriptors
  –   TSS (Task State segment) Descriptors
  –   GATE Descriptors
Segment descriptor
• Segment descriptors are a part of the
  segmentation unit, used for translating
  a logical address to linear address. Segment
  descriptors describe the memory
  segment referred in the logical address
TSS
• The Task State Segment is a structure which
  holds information about a task.
• It is used by the OS kernel for task management.
• Specifically, the following information is stored in
  the TSS:
   –   Processor register state
   –   I/O Port permissions
   –   Inner level stack pointers
   –   Previous TSS link
Gate Descriptors
• Mechanism, for changing the privilege level of
  the CPU when it executes a
  predefined function callusing a CALL FAR
  instruction.
• BASE  Base Address of the         • A Accessed Bit
  segment                            • G  Granularity Bit-1=Segment
• LIMIT the length of the             Length is page
  segment                              granular,0=Segment length is byte
                                       granular
• P Present BIT-1=Present,0=Not
  Present                            • D  Default Operation Size-1=32
                                       bit segment,0=16-segment
• DPL  Descriptor Privilege Level
  0-3                                • 0  Bit must be zero for
                                       compatibility with future
• S  Segment Descriptor -             processors
  0=System Descriptor ,1=Code or
  Data Segment Descriptor            • AVL  Available field for user or
                                       OS
• TYPE  type of segment
Advantages
• memory protection added to segment table
  like paging
• sharing of memory similar to paging (but per
  area rather than per page)
Drawbacks
• Allocation algorithms as for memory partitions
• External fragmentation, back to compaction
  problem.

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Segmentation

  • 1. Segmentation Pradyumna
  • 2. Definition • Way of offering protection to different data types and code.
  • 3. Descriptor Tables • Descriptor table is a array of 8k Descriptors • 3 types – Global Descriptor Table (GDT) – Local Descriptor Table (LDT) – Interrupt Descriptor Table (IDT)
  • 4. GDT&LDT GDT LDT • Contains Global descriptors • Contains descriptors specific common to all tasks to a particular task • Contains al the descriptor • Contains segment , task types except interrupt & gate & call gate descriptors. trap descriptors
  • 5. IDT • The Interrupt Descriptor Table (IDT) is a data structure used to implement an interrupt vector table. • The IDT is used by the processor to determine the correct response to interrupts & exceptions. • Use of the IDT is triggered by three types of events: hardware interrupts, software interrupts, and processor exceptions, which together are referred to as "interrupts". • The IDT consists of 256 interrupt vectors
  • 6. Descriptors • These carry all the info about a segment and its access rights • These have 20 bit segment limit and 32-bit segment address. • 5 types of descriptors – Code or data segment Descriptors – System Descriptors – Local Descriptors – TSS (Task State segment) Descriptors – GATE Descriptors
  • 7. Segment descriptor • Segment descriptors are a part of the segmentation unit, used for translating a logical address to linear address. Segment descriptors describe the memory segment referred in the logical address
  • 8. TSS • The Task State Segment is a structure which holds information about a task. • It is used by the OS kernel for task management. • Specifically, the following information is stored in the TSS: – Processor register state – I/O Port permissions – Inner level stack pointers – Previous TSS link
  • 9. Gate Descriptors • Mechanism, for changing the privilege level of the CPU when it executes a predefined function callusing a CALL FAR instruction.
  • 10. • BASE  Base Address of the • A Accessed Bit segment • G  Granularity Bit-1=Segment • LIMIT the length of the Length is page segment granular,0=Segment length is byte granular • P Present BIT-1=Present,0=Not Present • D  Default Operation Size-1=32 bit segment,0=16-segment • DPL  Descriptor Privilege Level 0-3 • 0  Bit must be zero for compatibility with future • S  Segment Descriptor - processors 0=System Descriptor ,1=Code or Data Segment Descriptor • AVL  Available field for user or OS • TYPE  type of segment
  • 11. Advantages • memory protection added to segment table like paging • sharing of memory similar to paging (but per area rather than per page)
  • 12. Drawbacks • Allocation algorithms as for memory partitions • External fragmentation, back to compaction problem.