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Presenting a 10.7” flexible
                                                        colour electronic paper
                                                     display fabricated using a
                                                       qualified manufacturing
                                                                       process.



 James D. Watts (Jim Watts) - C.Eng, M.Phil, B.Eng (Hons) DIS, MIET




Presented at the International Symposium on Electronic Paper,   October 31st 2012.
Content
 Plastic Logic introduction
    • Plastic electronics technology
    • Development of flexible backplanes
    • Qualified production process

 Colour display technology
    •   OTFT device architecture
    •   Spatially separated colour filter array
    •   Review the colour performance
    •   Considerations associated with EP colour

 Summary
                   ISEP2012   Proprietary to Plastic Logic   2
Introducing Plastic Logic


            ISEP2012   Proprietary to Plastic Logic   3
Plastic Electronics Technology

Uses plastic instead of traditional silicon semiconductors
 and glass
Enables a revolutionary design and form-factor

  Shatterproof, Thin, Large and Light Display




                  ISEP2012   Proprietary to Plastic Logic     4
Company History

                                         Display Development




10+ transistors         100+ transistors          1.2 M transistors               Colour EPD             2.8 M transistors




                  Research, Process Development & Manufacturing




                                         2000: Cambridge Technology                2008: Dresden Display Factory
     Cambridge University                 Center translating research             First plastic electronics factory in
     Research in organic electronics             into products                                 the world



                                       ISEP2012    Proprietary to Plastic Logic                                          5
R&D and Production Set-Up

                                Technology

                                 Transfer
    Cambridge R&D
   Prototype Line (14”)


              Cambridge R&D Prototype Line
                                              Ideal for proving new
                                               concepts
                                              Highly configurable process
                                              New designs in < 1 month
                                              1” Chips to A4 displays
                                              R&D Engineers


                     ISEP2012    Proprietary to Plastic Logic                6
R&D and Production Set-Up

                        Technology

                         Transfer

                                                 Dresden Factory (Gen 3.5)


            Dresden Gen. 3.5 Factory
                                      Backplane Manufacturing
                                      Qualified volume process
                                      Production equipment
                                      Fully Automated Handling
                                      Process, Equipment, Integration
                                       Engineers
                                      Thousands of displays/week


             ISEP2012    Proprietary to Plastic Logic                        7
The Manufacturing Challenge

It is one thing to show a single display at a tradeshow…




...quite another to develop a high yield manufacturing process

                   ISEP2012   Proprietary to Plastic Logic   8
Plastic Logic’s Manufacturing Process

 Key differences in manufacturing organic and flexible
  electronics:
    − Utilize solution processing to fabricate OTFTs
    − Process is designed to use lower temperatures which permits the
      use of lower cost flexible substrates
    − Exploit direct-write fabrication techniques to improve overlay
      tolerances and feature registration
 Have developed unique process know-how and IP:
    − Handling plastic sheets through assembly processes
    − Large area deposition technologies of organic and inorganic
     materials
    − Cleaning and conditioning of the layers to improve device
     performance
 Passed through the “Industrialisation” phase
    − Reproducibility
    − Homogeneity
                        ISEP2012   Proprietary to Plastic Logic         9
Processing challenges in the development phase

Optimising process conditions is a critical part of industrialisation process


Monitoring data from coating process in the first year (2009)
Thickness mean




                                             Monitoring data from same process one year later
                      Thickness mean




                                       ISEP2012   Proprietary to Plastic Logic             10
Display Testing and Reliability
 Flexible displays require special handling practises


 Test development for transistor and display parameters
     − Definition of test specifications
     − Electrical and Optical tests for production
     − Test methods for OTFT and other characterisation structures


 Reliability optimization for quality and lifetime behaviour
     − Accelerated test under different environmental conditions for lifetime projections
     − Based on existing models for Si-based integrated circuits
     − Parameters adapted to organic materials in terms of
        temperature sensitivities and reaction to cycling




                              ISEP2012   Proprietary to Plastic Logic                       11
Reliability tests


         Name                 Test                                       Purpose
      Thermo cycling           TST                  Mechanical robustness & CTE mismatch
 High Temperature Storage      HTS                         Storage of transport conditions
Advance Humidity Storage       AHS                        Stability against moisture ingress
 Low Temperature Storage       LTS                         Storage of transport conditions
    Real World Usage          RWU                      Display use in non-accelerated mode
Advance Humidity Operation     AHO                    Accelerated operation at high humidity
Low Temperature Operation      LTO                  Accelerated operation at low temperature
    Ambient Operation          AO                 Accelerated operation at ambient conditions
      Solar storage            SOR                                     Solar robustness
       Altitude test           ALT                                 Pressure sensitivity




                             ISEP2012   Proprietary to Plastic Logic                           12
Colour electrophoretic displays


           ISEP2012   Proprietary to Plastic Logic   13
Colour EP Display Architecture

                                                                          Colour Filter Array (CFA)
                   Encapsulation sheet                                    layer
                     Plastic Substrate
                                                                          E Ink Imaging Film
                                                                          Electrophoretic
                                                                          Frontplane (FP)
             Plastic Logic Backplane Technology
                                                                          Low Distortion Plastic
                 Plastic Substrate                                        Logic Backplane


 Colour Filter patterned by multiple approaches (wet printing, sheet-to-sheet
  alignment).

 During CFA pattern formation, the backplane pixel electrodes are not
  visible (obscured by FP media layer).

 Backplane:
    1280 x 960 pixels (monochrome) == 640 x 480 Colour
    150PPI (monochrome) ==75PPI Colour
    Active Area: 217.6mm x 163.2mm (unchanged)

                               ISEP2012    Proprietary to Plastic Logic                            14
Process for overlaying a colour filter
Black and White pixel array     Coloured sub-pixel array                      Greyscale image showing overlay

                                               Display
                                             Colour pixel



                                                                                        G R
                                                                                        B W
                                     170m
Schematic Plan view

                                Colour sub-pixel
OTFT cross-sectional
                                                                 Frontplane media
view of single sub-
pixel
                                                                 Pixel Electrode and Via
                                        Pixel
                              Gate    Capacitor                  Interlayer Dielectric
                                                                 Gate Interconnect
                          Semiconductor
                                                                 Gate Dielectric


                         Data line      Drain                    Flexible Substrate

                               ISEP2012        Proprietary to Plastic Logic                              15
Process for resetting distortion

                                                                                               Pixel
 Plastic Logic have                                                                           Electrode
  presented a process for
  coping with the issue of
                                                                                                Interlayer
  overlay distortion for multi-                                         Via                     Dielectric
  layered stacks made of
  plastics

 The new process resets
  distortion at the top pixel
  electrode layer with no loss
  in pixel performance.

 This means pre-patterned
  layers can be placed on top
  (eg Colour Filter)

                                  Glass Backplane: All stack                  Plastic Backplane: Top Pixels
                                    layers on a regular grid                   maintained on a regular grid


                              ISEP2012   Proprietary to Plastic Logic                                      16
Displaying colour – demand on single pixel driving

  Displaying Red        Displaying Green                     Displaying Blue




 Displaying Cyan        Displaying Yellow Displaying Magenta




                   ISEP2012   Proprietary to Plastic Logic                 17
Colour plots - consistency

      15


      10


       5

                                                                   BATCH1
 b*    0
                                                                   BATCH2
                                                                   BATCH3
      -5


    -10


    -15
           -15   -10   -5   0        5       10        15
                            a*
Data for 30 samples taken from three production batches
                                 ISEP2012   Proprietary to Plastic Logic    18
Topic 1 - Image rendering
Topic introduction:
To display an image in colour on an electrophoretic display with a colour filter layer,
the image first needs to be processed to map to the layout of the colour filter.
Typically various parameters (i.e., saturation and brightness) are also adjusted
during this process to maximize the final colour viewing experience.




                                                            Before            After
                                                       Examples of files before and after
                                                             colour conversion.




        IMC application software.

                           ISEP2012   Proprietary to Plastic Logic                          19
Topic 2 – Colour linearity

• GRBW configuration offers independent control of the
  white sub-pixel
• What should we do with this?


Example 1: White sub-pixel follows minimum luminance of
the red, green and blue sub-pixels i.e., W=min{R,G,B}


Example 2: White sub-pixel follows minimum luminance
weighting of the red, green and blue sub-pixels using
{0.299Red, 0.587Green, 0.114Blue} i.e., W=lum{R,G,B}



                 ISEP2012   Proprietary to Plastic Logic   20
Topic 2 – Colour Linearity
                (Diluted colour)
(Pure colour)


                                            Pure colour              Diluted colour
                At 15th state
At 8th state




                                   GR                      GR    GR                GR
                                   BW        .. red ..     BW    BW       red ..   BW   …. driving red example when W=min{R,G,B}

GR
BW
                                   1   ..         ..   7   8     9   ..            .. 15
                GR
                BW
GR
BW
                GR
                BW
GR
BW
                GR
                BW
GR
BW
                GR
                BW

The problem:
− The diagram above shows 15 transitions from dark to light for various colours. The first 7
  transitions are to brighten the pure colour from black, the final 7 transitions are to brighten
  the overall colour-pixel (by raising the brightness of the remaining colour sub-pixels).
− The four box diagrams placed above the chart are given as an example for the colour red.
  In reality, the diagram above is more complicated as there are actually two sets of 0-15
  transitions (because we can drive 16 grey levels for each)
                                                               ISEP2012     Proprietary to Plastic Logic                   21
Topic 2: W=min{R,G,B}




                                                  W=min{R,G,B}

              ISEP2012   Proprietary to Plastic Logic            22
Topic 2: W=lum{R,G,B}




                                                W=lum{0.299R , 0.587G, 0.114B}

              ISEP2012   Proprietary to Plastic Logic                            23
Topic 3 – Drive waveform controlling blooming




Photograph revealing display effect of pixel blooming.

                     ISEP2012   Proprietary to Plastic Logic   24
Topic 3: Drive waveform controlling updates

• The waveform design for colour displays has a more
  significant impact on the waveform update appearance
  compared to monochrome displays.
• With colour there is now a risk that unwanted colours are
  displayed during page turns, which can be distracting
  and detrimental to the visual experience
• Minimising this effect whilst maintaining fast updates are
  vital considerations when developing drive waveform
  schemes.




                  ISEP2012   Proprietary to Plastic Logic   25
Topic 3: Drive waveform controlling updates

• Consider updating a colour pixel from white to red:
   • A standard method for driving monochrome EPD, which
     ensures all updating pixels finish at the same time, would
     result in the sub-pixel arrangement shown below during an
     update
   • In this example, during this transition it could be possible to
     introduce an interim state which forces the colour pixel to
     momentarily display cyan.




                            Colour sub pixel appearance during
                                    the display update.
                     ISEP2012   Proprietary to Plastic Logic           26
Summary


          ISEP2012   Proprietary to Plastic Logic   27
Qualified Flexible Displays: Now Available

        Display size           10.7”
    Backplane Grey Levels       16
      Sub-pixel density       150ppi
       Contrast Ratio          12:1
        Colour gamut         2% NTSC


 Highly flexible
 Paper-like finish
 Excellent readability
 Bi-stable EP media supports long
  battery life
 Colour ideal for office applications
  like charts and graphs



                                                       1280 x 960 Flexible Colour Display

                            ISEP2012   Proprietary to Plastic Logic                     28
Plastic Logic’s Displays


• Plastic Logic have presented a 10.7” flexible colour electronic paper
  display fabricated using its qualified manufacturing process


• The colour display is lightweight, robust and highly flexible


• Plastic Logic is constantly searching for partners wishing to create new
  markets and opportunities for our display technology.


• Please visit our YouTube channel to view our latest technology
  demonstrations:
     − www.youtube.com/user/plasticlogic



                        ISEP2012   Proprietary to Plastic Logic           29
THANK YOU




                                                        Plastic Logic Ltd
                                                 34, Cambridge Science Park
                                                     Cambridge, CB4 0FX
                                                               UK
                                                  Tel.: +44 (0) 1223 706034

                                             Email: jim.watts@plasticlogic.com
                                                   www.plasticlogic.com

This presentation is for the general purpose of supplying information. PLL shall be in no manner liable for loss arising from any party's reliance on
the contents of this presentation. Any party requiring specific advice or guidance should contact PLL separately on that specific matter.

You may need to own or be licensed to use complimentary technologies in order to use our flexible display technology in this application. It is your
responsibility to ensure that you secure such rights, if necessary.

                                                ISEP2012       Proprietary to Plastic Logic                                                   30

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ISEP 2012 conference - Presenting Colour EPD

  • 1. Presenting a 10.7” flexible colour electronic paper display fabricated using a qualified manufacturing process. James D. Watts (Jim Watts) - C.Eng, M.Phil, B.Eng (Hons) DIS, MIET Presented at the International Symposium on Electronic Paper, October 31st 2012.
  • 2. Content  Plastic Logic introduction • Plastic electronics technology • Development of flexible backplanes • Qualified production process  Colour display technology • OTFT device architecture • Spatially separated colour filter array • Review the colour performance • Considerations associated with EP colour  Summary ISEP2012 Proprietary to Plastic Logic 2
  • 3. Introducing Plastic Logic ISEP2012 Proprietary to Plastic Logic 3
  • 4. Plastic Electronics Technology Uses plastic instead of traditional silicon semiconductors and glass Enables a revolutionary design and form-factor Shatterproof, Thin, Large and Light Display ISEP2012 Proprietary to Plastic Logic 4
  • 5. Company History Display Development 10+ transistors 100+ transistors 1.2 M transistors Colour EPD 2.8 M transistors Research, Process Development & Manufacturing 2000: Cambridge Technology 2008: Dresden Display Factory Cambridge University Center translating research First plastic electronics factory in Research in organic electronics into products the world ISEP2012 Proprietary to Plastic Logic 5
  • 6. R&D and Production Set-Up Technology Transfer Cambridge R&D Prototype Line (14”) Cambridge R&D Prototype Line  Ideal for proving new concepts  Highly configurable process  New designs in < 1 month  1” Chips to A4 displays  R&D Engineers ISEP2012 Proprietary to Plastic Logic 6
  • 7. R&D and Production Set-Up Technology Transfer Dresden Factory (Gen 3.5) Dresden Gen. 3.5 Factory  Backplane Manufacturing  Qualified volume process  Production equipment  Fully Automated Handling  Process, Equipment, Integration Engineers  Thousands of displays/week ISEP2012 Proprietary to Plastic Logic 7
  • 8. The Manufacturing Challenge It is one thing to show a single display at a tradeshow… ...quite another to develop a high yield manufacturing process ISEP2012 Proprietary to Plastic Logic 8
  • 9. Plastic Logic’s Manufacturing Process  Key differences in manufacturing organic and flexible electronics: − Utilize solution processing to fabricate OTFTs − Process is designed to use lower temperatures which permits the use of lower cost flexible substrates − Exploit direct-write fabrication techniques to improve overlay tolerances and feature registration  Have developed unique process know-how and IP: − Handling plastic sheets through assembly processes − Large area deposition technologies of organic and inorganic materials − Cleaning and conditioning of the layers to improve device performance  Passed through the “Industrialisation” phase − Reproducibility − Homogeneity ISEP2012 Proprietary to Plastic Logic 9
  • 10. Processing challenges in the development phase Optimising process conditions is a critical part of industrialisation process Monitoring data from coating process in the first year (2009) Thickness mean Monitoring data from same process one year later Thickness mean ISEP2012 Proprietary to Plastic Logic 10
  • 11. Display Testing and Reliability  Flexible displays require special handling practises  Test development for transistor and display parameters − Definition of test specifications − Electrical and Optical tests for production − Test methods for OTFT and other characterisation structures  Reliability optimization for quality and lifetime behaviour − Accelerated test under different environmental conditions for lifetime projections − Based on existing models for Si-based integrated circuits − Parameters adapted to organic materials in terms of temperature sensitivities and reaction to cycling ISEP2012 Proprietary to Plastic Logic 11
  • 12. Reliability tests Name Test Purpose Thermo cycling TST Mechanical robustness & CTE mismatch High Temperature Storage HTS Storage of transport conditions Advance Humidity Storage AHS Stability against moisture ingress Low Temperature Storage LTS Storage of transport conditions Real World Usage RWU Display use in non-accelerated mode Advance Humidity Operation AHO Accelerated operation at high humidity Low Temperature Operation LTO Accelerated operation at low temperature Ambient Operation AO Accelerated operation at ambient conditions Solar storage SOR Solar robustness Altitude test ALT Pressure sensitivity ISEP2012 Proprietary to Plastic Logic 12
  • 13. Colour electrophoretic displays ISEP2012 Proprietary to Plastic Logic 13
  • 14. Colour EP Display Architecture Colour Filter Array (CFA) Encapsulation sheet layer Plastic Substrate E Ink Imaging Film Electrophoretic Frontplane (FP) Plastic Logic Backplane Technology Low Distortion Plastic Plastic Substrate Logic Backplane  Colour Filter patterned by multiple approaches (wet printing, sheet-to-sheet alignment).  During CFA pattern formation, the backplane pixel electrodes are not visible (obscured by FP media layer).  Backplane:  1280 x 960 pixels (monochrome) == 640 x 480 Colour  150PPI (monochrome) ==75PPI Colour  Active Area: 217.6mm x 163.2mm (unchanged) ISEP2012 Proprietary to Plastic Logic 14
  • 15. Process for overlaying a colour filter Black and White pixel array Coloured sub-pixel array Greyscale image showing overlay Display Colour pixel G R B W 170m Schematic Plan view Colour sub-pixel OTFT cross-sectional Frontplane media view of single sub- pixel Pixel Electrode and Via Pixel Gate Capacitor Interlayer Dielectric Gate Interconnect Semiconductor Gate Dielectric Data line Drain Flexible Substrate ISEP2012 Proprietary to Plastic Logic 15
  • 16. Process for resetting distortion Pixel  Plastic Logic have Electrode presented a process for coping with the issue of Interlayer overlay distortion for multi- Via Dielectric layered stacks made of plastics  The new process resets distortion at the top pixel electrode layer with no loss in pixel performance.  This means pre-patterned layers can be placed on top (eg Colour Filter) Glass Backplane: All stack Plastic Backplane: Top Pixels layers on a regular grid maintained on a regular grid ISEP2012 Proprietary to Plastic Logic 16
  • 17. Displaying colour – demand on single pixel driving Displaying Red Displaying Green Displaying Blue Displaying Cyan Displaying Yellow Displaying Magenta ISEP2012 Proprietary to Plastic Logic 17
  • 18. Colour plots - consistency 15 10 5 BATCH1 b* 0 BATCH2 BATCH3 -5 -10 -15 -15 -10 -5 0 5 10 15 a* Data for 30 samples taken from three production batches ISEP2012 Proprietary to Plastic Logic 18
  • 19. Topic 1 - Image rendering Topic introduction: To display an image in colour on an electrophoretic display with a colour filter layer, the image first needs to be processed to map to the layout of the colour filter. Typically various parameters (i.e., saturation and brightness) are also adjusted during this process to maximize the final colour viewing experience. Before After Examples of files before and after colour conversion. IMC application software. ISEP2012 Proprietary to Plastic Logic 19
  • 20. Topic 2 – Colour linearity • GRBW configuration offers independent control of the white sub-pixel • What should we do with this? Example 1: White sub-pixel follows minimum luminance of the red, green and blue sub-pixels i.e., W=min{R,G,B} Example 2: White sub-pixel follows minimum luminance weighting of the red, green and blue sub-pixels using {0.299Red, 0.587Green, 0.114Blue} i.e., W=lum{R,G,B} ISEP2012 Proprietary to Plastic Logic 20
  • 21. Topic 2 – Colour Linearity (Diluted colour) (Pure colour) Pure colour Diluted colour At 15th state At 8th state GR GR GR GR BW .. red .. BW BW red .. BW …. driving red example when W=min{R,G,B} GR BW 1 .. .. 7 8 9 .. .. 15 GR BW GR BW GR BW GR BW GR BW GR BW GR BW The problem: − The diagram above shows 15 transitions from dark to light for various colours. The first 7 transitions are to brighten the pure colour from black, the final 7 transitions are to brighten the overall colour-pixel (by raising the brightness of the remaining colour sub-pixels). − The four box diagrams placed above the chart are given as an example for the colour red. In reality, the diagram above is more complicated as there are actually two sets of 0-15 transitions (because we can drive 16 grey levels for each) ISEP2012 Proprietary to Plastic Logic 21
  • 22. Topic 2: W=min{R,G,B} W=min{R,G,B} ISEP2012 Proprietary to Plastic Logic 22
  • 23. Topic 2: W=lum{R,G,B} W=lum{0.299R , 0.587G, 0.114B} ISEP2012 Proprietary to Plastic Logic 23
  • 24. Topic 3 – Drive waveform controlling blooming Photograph revealing display effect of pixel blooming. ISEP2012 Proprietary to Plastic Logic 24
  • 25. Topic 3: Drive waveform controlling updates • The waveform design for colour displays has a more significant impact on the waveform update appearance compared to monochrome displays. • With colour there is now a risk that unwanted colours are displayed during page turns, which can be distracting and detrimental to the visual experience • Minimising this effect whilst maintaining fast updates are vital considerations when developing drive waveform schemes. ISEP2012 Proprietary to Plastic Logic 25
  • 26. Topic 3: Drive waveform controlling updates • Consider updating a colour pixel from white to red: • A standard method for driving monochrome EPD, which ensures all updating pixels finish at the same time, would result in the sub-pixel arrangement shown below during an update • In this example, during this transition it could be possible to introduce an interim state which forces the colour pixel to momentarily display cyan. Colour sub pixel appearance during the display update. ISEP2012 Proprietary to Plastic Logic 26
  • 27. Summary ISEP2012 Proprietary to Plastic Logic 27
  • 28. Qualified Flexible Displays: Now Available Display size 10.7” Backplane Grey Levels 16 Sub-pixel density 150ppi Contrast Ratio 12:1 Colour gamut 2% NTSC  Highly flexible  Paper-like finish  Excellent readability  Bi-stable EP media supports long battery life  Colour ideal for office applications like charts and graphs 1280 x 960 Flexible Colour Display ISEP2012 Proprietary to Plastic Logic 28
  • 29. Plastic Logic’s Displays • Plastic Logic have presented a 10.7” flexible colour electronic paper display fabricated using its qualified manufacturing process • The colour display is lightweight, robust and highly flexible • Plastic Logic is constantly searching for partners wishing to create new markets and opportunities for our display technology. • Please visit our YouTube channel to view our latest technology demonstrations: − www.youtube.com/user/plasticlogic ISEP2012 Proprietary to Plastic Logic 29
  • 30. THANK YOU Plastic Logic Ltd 34, Cambridge Science Park Cambridge, CB4 0FX UK Tel.: +44 (0) 1223 706034 Email: jim.watts@plasticlogic.com www.plasticlogic.com This presentation is for the general purpose of supplying information. PLL shall be in no manner liable for loss arising from any party's reliance on the contents of this presentation. Any party requiring specific advice or guidance should contact PLL separately on that specific matter. You may need to own or be licensed to use complimentary technologies in order to use our flexible display technology in this application. It is your responsibility to ensure that you secure such rights, if necessary. ISEP2012 Proprietary to Plastic Logic 30