Server Product Overview - 5 servers AMD Server Naming schema EPYC Processor Architecture Overview EPYC Processor Naming EPYC v's Intel Processor Specs Processor selection tool

1. PowerEdge Rack and Tower Server Masters:
AMD Processors
Technical Sales

2. Internal Use - Confidential
Learning objectives
This course has been designed to help you:
– Server Product Overview - 5 servers
– AMD Server Naming schema
– EPYC Processor Architecture Overview
– EPYC Processor Naming
– EPYC v's Intel Processor Specs
– Processor selection tool

3. AMD server overview

4. Internal Use - Confidential
4
Internal Use - Confidential
Unique server features
KEY DESIGN INNOVATIONS
PCI Gen4
Universal storage backplanes
2 x PCIe speed
Thermal Design for Balanced Air Flow
OCP 3.0 NICs
New storage controllers:
• PERC 10.5 with 16 ports
Optimized risers designed
to address demanding workloads

5. Internal Use - Confidential
R6515
Single-socket 1U
rack for SDS and
NFV workloads
R7515 R6525 R7525
Single-socket 2U
rack for Data
Analytics and SDS
workloads
Dual-socket 1U
rack for HPC,
Virtualization, VDI
workloads
Dual-socket 2U
rack for Data
Analytics, SDS,
Virtualization, VDI
and NFV workloads
C6525
Dual-socket 2U
rack server for
HPC workloads
1S RACKS 2S RACKS C-SERIES
Expanding the New Dell EMC PowerEdge Servers
with the 2nd Generation AMD EPYCTM
| |
MULTI - CLOUD
| |
EMERGING WORKLOADS

6. Internal Use - Confidential
AMD server naming
1 2 3 9
4 5 8
6 7 Processor
Generation
4 4 0
R
R
R
1 2 3 9
4 5 8
6 7 Proc quantity
Generation Processor
6 4 1
R 5
4 4 0
6 4 1 5
© Copyright 2017 Dell Inc.

7. AMD EPYC overview

8. Internal Use - Confidential
Sustained High-Performance Leadership
COMPUTE ARCHITECTURE ROADMAP
7nm+
Design Complete
7nm
Shipping
14nm / 12nm
Shipping
Future
2017 2022
ROME MILAN
NAPLES
Source: AMD Corporate Presentation | 2019 - Roadmaps subject to change

9. Internal Use - Confidential
2nd Generation AMD EPYCTM
*Perf projections based on AMD internal 20Jan2019. Subject to change.
14nm Zen cores
14nm
IO/Mem die
7nm
Zen2 chiplets
Rome: Single IO/Mem die removes
internal bottleneck for lower latency
Up to 64 cores / 128 threads
2x L3 cache per core
(16MB per 4 cores)
2x PCIe performance with Gen4
at 16GT/s
20% memory speed increase:
2666MHz to 3200MHz
Double the speed per socket
with xGMI-2 (~16GT/s)
Secure Encrypted Virtualization SEV
provides 509 unique hypervisor keys
MULTI-CHIP DESIGN BENEFITS
Separate I/O die from Zen2 chiplets allows:
• Flexible core configurations
• Higher chip yields
Dedicated I/O+mem die defaults to 1 NUMA domain
• Flexibility to also configure 2 or 4 NUMA domains
• 30ns improvement in latency for non NUMA aware apps
(analytics, HPC – NamD, Linpack)
2x performance*
Naples: I/O and memory spread across
each Zen core creates lots of internal traffic

10. Internal Use - Confidential
Rome drop-in on Naples: JUST DON’T DO IT !
Significant technology disadvantages and performance Limitations
ROME ON ROME:
 Supports FULL processor stack
– up to 225W and highest
frequencies
 20% faster memory speed @
3200MT/s
 25% more lanes and 2x PCIe
speed - up to 160 PCIe Gen4
 60% faster interconnect fabric
with xGMI-2 @ 16GT/s
ROME ON NAPLES:
Supports for only up to
200W CPUs
LOWER
PERFORMANCE
SLOWER
INTERCONNECT
ROME ON NAPLES:
Only 128 PCIe Gen3
lanes
ROME ON NAPLES:
Inter-chip Global
memory Interconnect
(xGMI) at only 10GT/s
POOR
NETWORKING
ROME ON NAPLES:
memory speeds at only
2666MT/s
SLOWER
MEMORY
Rome on Naples is
 Lower Performance
 Decreased Capabilities
 Slower Memory Speeds
 Subpar Networking
 Limited Scalability
 Not supported by Dell EMC
* System board shown for illustrative purposes only

11. Internal Use - Confidential
AMD EPYC processor naming
EPYC 7551P EPYC 7 5 5 1 P
Single or dual processor
• P = Single-socket, not present in
dual-socket configuration
SKU level
• 7 = 7000 Series
Processor SKU
• 23~60 = Dual-digit
number indicative of
stack positioning /
performance (non-linear)
Processor generation
• 1 = 1st generation

12. Internal Use - Confidential
AMD EPYC (Rome) Processor Platform Mapping
CONFIDENTIAL RESTRICTED CONTENT – DO NOT DISTRIBUTE
Processor
Model #
Base
Frequency
Cores/
Threads
TDP L3 Cache
Max DDR
Freq
(1 DPC)
R6515 R7515 R6525 R7525 C6525
7742 2.25GHz 64/128 225W 256MB 3200    Δ 
7702 2.00GHz 64/128 200W 256MB 3200  Δ 
7702P 2.00GHz 64/128 200W 256MB 3200   Δ
7642 2.30GHz 48/96 225W 192MB 3200 Δ Δ Δ Δ Δ
7552 2.20GHz 48/96 200W 192MB 3200 Δ Δ Δ Δ Δ
7542 2.90GHz 32/64 225W 128MB 3200    Δ 
7502 2.50GHz 32/64 180W 128MB 3200  Δ 
7502P 2.50GHz 32/64 180W 128MB 3200   
7452 2.35GHz 32/64 155W 128MB 3200    Δ 
7402 2.80GHz 24/48 180W 128MB 3200  Δ 
7402P 2.80GHz 24/48 180W 128MB 3200   
7352 2.30GHz 24/48 155W 128MB 3200    Δ 
7302 3.00GHz 16/32 155W 128MB 3200  Δ 
7302P 3.00GHz 16/32 155W 128MB 3200   
7282 2.80GHz 16/32 120W 64MB 3200* Δ Δ Δ Δ Δ
7272 2.90GHz 12/24 120W 64MB 3200* Δ Δ Δ Δ Δ
7262 3.20GHz 8/16 155W 128MB 3200    Δ 
7252 3.10GHz 8/16 120W 64MB 3200* Δ Δ Δ
7232P 3.10GHz 8/16 120W 64MB 3200* Δ Δ Δ
 = Available September, 2019  = Available October, 2019 Δ = Available February, 2020
The processors are 8-channel and 3200 capable, but they are performance
Optimized for 4-channels @ 2666

13. Internal Use - Confidential
A3 tool- Workload and Processor recommendations

14. Internal Use - Confidential
A3 tool- Workload and Processor recommendations

15. Internal Use - Confidential
A3 tool- Workload and Processor recommendations

16. Internal Use - Confidential
A3 tool- Workload and Processor recommendations

17. Internal Use - Confidential
Thank you