This is a PPT about toy compiler.

1. Toy Compiler

2. Toy compiler
Front end :
It performs lexical , syntax and semantic Involved functions…
1.Determining validity of a source statement from the view point
of analysis.
2.Determine the “content” of source statement.
3.Construct a suitable representation of the source statement for
being used by subsequent analysis function (or)the synthesis
phase of the language processor.

3. FrontEnd…
•Lexical analysis=Content in lexical class.
•Syntax analysis=syntactic structure of source
statement.
•Semantic analysis=In meaning of statement
_ For a declaration statement
_ It is set of attributes of a declared variable
Example: Type, length and dimensionality

4. FrontEnd…
Output of Front end:
1.Tables of information.
2.An intermediate code which is the
description of the source program.

5. Analysis phase for the program..
I : integer;
a ,b :=real;
a :=b+I;
Symbol table:
Intermediate code:
1.Convert(Id,#1)to real , giving(Id,#4)
2.Add(Id,#4)to(Id,#3),giving(Id,#5)
3.Store(Id,#5)in(Id,#2)
Symbol type length address
i int
a real
b real
i* real
Temp real

6. Lexical analysis(scanning):
Identifies lexical units in source statement.Its
Classifies units into different lexical classes.
Eg: id’s,constants,reserved id’s etc.
Eg:the statement a := b+i represented as string
of tokens.
Id#2 Op#5 Id#3 OP#3 Id#1 Op#10

7. Syntax Analysis:
Syntax analysis processes the string of tokens
built by lexical analysis to determine the
statement classes.
Eg: assignment statement,if statement ,etc..
real :=
a b a +
b i

8. •Semantic Analysis:
:= := :=
a,real + a,real + a,real temp,real
b,real i,int b,real i*,real

9. Back End:
• Involves Two phases
• Memory Allocation
• Code Generation

10. Memory Allocation
• It is a simple task given the presence of the
symbol table.
• The memory requirement of an identifier is
computed from its type,length,dimensionality
and memory is allocated
• For example
Symbol Type Length Address
1 i int 2000
2 a real 2001
3 a real 2002

11. Code Generation
• It uses knowledge of the target architectue i.e.. Knowledge of
instructions and addressing modes
• Issues
• 1.Detremine the places where the intermediate results to be
kept (either on memory locations or in machine registers)
• 2.Determine which instruction should be used for type
conversion
• 3.determine which addressing mode to be used while
accessing variables.

12. Code Generation
• a:=b+i
• 1.convert I to real, giving i*
• 2.add i* to b giving temp
• 3.store temp in a
• Synthesis phase may decide to hold values of i* and temp in
machine register and may generate assembly code
• CONV_R AREG,I
• ADD_R AREG,B
• MOVEM AREG,A