2. 2
Contents
Introduction
Computer Architecture
ARM Architecture
Development Tools
GNU Development Tools
ARM Instruction Set
ARM Assembly Language
ARM Assembly Programming
GNU ARM ToolChain
Interrupts and Monitor
4. 4
Outline
Exception Handling and Software Interrupts
ELF: Executable and Linking Format
ARM Monitor and Program Loading
5. 5
Normal Program Flow vs. Exception
Normally, programs execute sequentially (with a
few branches to make life interesting)
Normally, programs execute in user mode
Exceptions and interrupts break the sequential
flow of a program, jumping to architecturally-
defined memory locations
In ARM, SoftWare Interrupt (SWI) is the “system
call” exception
6. 6
ARM Exceptions
Types of ARM exceptions
Reset: when CPU reset pin is asserted
undefined instruction: when CPU tries to execute an
undefined op-code
software interrupt: when CPU executes the SWI
instruction
prefetch abort: when CPU tries to execute an
instruction pre-fetched from an illegal address
data abort: when data transfer instruction tries to read
or write at an illegal address
IRQ: when CPU's external interrupt request pin is
asserted
FIQ: when CPU's external fast interrupt request pin is
asserted
7. 7
The Programmer’s Model
Processor Modes (of interest)
User: the “normal” program execution mode.
IRQ: used for general-purpose interrupt handling.
Supervisor: a protected mode for the operating system.
The Register Set
Registers R0-R15 + CPSR
R13: Stack Pointer (by convention)
R14: Link Register (hardwired)
R15: Program Counter where bits 0:1 are ignored
(hardwired)
8. 8
Terminology
The terms exception and interrupt are often
confused
Exception usually refers to an internal CPU event
floating point overflow
MMU fault (e.g., page fault)
trap (SWI)
Interrupt usually refers to an external I/O event
I/O device request
reset
In the ARM architecture manuals, the two terms
are mixed together
9. 9
What do SWIs do?
SWIs (often called software traps) allow a user
program to “call” the OS that is, SWIs are how
system calls are implemented.
When SWIs execute, the processor changes modes
(from User to Supervisor mode on the ARM) and
disables interrupts.
10. 10
SWI Example
Types of SWIs in ARM Angel (axd or armsd)
SWI_WriteC(SWI 0) Write a byte to the debug
channel
SWI_Write0(SWI 2) Write the nullterminated
string to debug channel
SWI_ReadC(SWI 4) Read a byte from the debug
channel
SWI_Exit(SWI 0x11) Halt emulation this is how a
program exits
SWI_EnterOS(SWI 0x16) Put the processor in
supervisor mode
SWI_Clock(SWI 0x61) Return the number of centi-
seconds
SWI_Time(SWI 0x63) Return the number of secs
since Jan. 1, 1970
11. 11
What happens on an SWI?1
The ARM architecture defines a Vector Table indexed by
exception type
One SWI, CPU does the following: PC <0x08
Also, sets LR_svc, SPSR_svc, CPSR (supervisor mode,
no IRQ)
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program to R_Handler
to U_Handler
to S_Handler
to P_Handler
to D_Handler
...
to I_Handler
to F_Handler
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
(Reset
(Undef instr.)
(SWI)
(Prefetch abort)
(Data abort)
(Reserved)
(IRQ)
(FIQ)
SWI Handler
1
12. 12
What happens on an SWI?2
Not enough space in the table (only one instruction per
entry) to hold all of the code for the SWI handler function
This one instruction must transfer control to appropriate
SWI Handler
Several options are presented in the next slide
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program to R_Handler
to U_Handler
to S_Handler
to P_Handler
to D_Handler
...
to I_Handler
to F_Handler
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
(Reset
(Undef instr.)
(SWI)
(Prefetch abort)
(Data abort)
(Reserved)
(IRQ)
(FIQ)
SWI Handler
2
13. 13
“Vectoring” Exceptions to Handlers
Option of choice: Load PC from jump table (shown below)
Another option: Direct branch (limited range)
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program LDR pc, pc, 0x100
LDR pc, pc, 0x100
LDR pc, pc, 0x100
LDR pc, pc, 0x100
LDR pc, pc, 0x100
LDR pc, pc, 0x100
LDR pc, pc, 0x100
LDR pc, pc, 0x100
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
SWI Handler
(S_Handler)
2
&A_Handler
&U_Handler
&S_Handler
&P_Handler
...
“Jump” Table
0x108
0x10c
0x110
0x114
...
Why 0x110?
14. 14
What happens on SWI completion?
Vectoring to the S_Handler starts executing the SWI
handler
When the handler is done, it returns to the program at the
instruction following the SWI
MOVS restores the original CPSR as well as changing pc
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program to R_Handler
to U_Handler
to S_Handler
to P_Handler
to D_Handler
...
to I_Handler
to F_Handler
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
(Reset
(Undef instr.)
(SWI)
(Prefetch abort)
(Data abort)
(Reserved)
(IRQ)
(FIQ)
3 MOVS pc, lr
SWI Handler
(S_Handler)
15. 15
How to determine the SWI number?
All SWIs go to 0x08
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program to R_Handler
to U_Handler
to S_Handler
to P_Handler
to D_Handler
...
to I_Handler
to F_Handler
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
(Reset
(Undef instr.)
(SWI)
(Prefetch abort)
(Data abort)
(Reserved)
(IRQ)
(FIQ)
SWI Handler must
serve as clearing
house for different
SWIs
MOVS pc, lr
SWI Handler
(S_Handler)
16. 16
SWI Instruction Format
Example: SWI 0x18
24-bit “comment” field (ignored by processor)
1 1 1 1
cond
0
23
24
27
31 28
SWI number
17. 17
Executing SWI Instruction
On SWI, the processor
(1) copies CPSR to SPSR_SVC
(2) set the CPSR mode bits to supervisor mode
(3) sets the CPSR IRQ to disable
(4) stores the value (PC + 4) into LR_SVC
(5) forces PC to 0x08
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program to R_Handler
to U_Handler
to S_Handler
to P_Handler
to D_Handler
...
to I_Handler
to F_Handler
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
(Reset
(Undef instr.)
(SWI)
(Prefetch abort)
(Data abort)
(Reserved)
(IRQ)
(FIQ)
LDR r0,[lr,#4]
BIC r0,r0,#0xff000000
R0 holds SWI number
MOVS pc, lr
SWI Handler
(S_Handler)
24-bit “comment” field (ignored by processor)
1 1 1 1
cond
18. 18
Jump to “Service Routine”
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program to R_Handler
to U_Handler
to S_Handler
to P_Handler
to D_Handler
...
to I_Handler
to F_Handler
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
(Reset
(Undef instr.)
(SWI)
(Prefetch abort)
(Data abort)
(Reserved)
(IRQ)
(FIQ)
LDR r0,[lr,#4]
BIC r0,r0,#0xff000000
switch (r0){
case 0x00: service_SWI1();
case 0x01: service_SWI2();
case 0x02: service_SWI3();
…
}
MOVS pc, lr
SWI Handler
(S_Handler)
24-bit “comment” field (ignored by processor)
1 1 1 1
cond
On SWI, the processor
(1) copies CPSR to SPSR_SVC
(2) set the CPSR mode bits to supervisor mode
(3) sets the CPSR IRQ to disable
(4) stores the value (PC + 4) into LR_SVC
(5) forces PC to 0x08
19. 19
Problem with The Current Handler
On SWI, the processor
(1) copies CPSR to SPSR_SVC
(2) set the CPSR mode bits to supervisor mode
(3) sets the CPSR IRQ to disable
(4) stores the value (PC + 4) into LR_SVC
(5) forces PC to 0x08
ADD r0,r0,r1
SWI 0x10
SUB r2,r2,r0
USER Program to R_Handler
to U_Handler
to S_Handler
to P_Handler
to D_Handler
...
to I_Handler
to F_Handler
Vector Table (spring board)
starting at 0x00 in memory
0x00
0x04
0x08
0x0c
0x10
0x14
0x18
0x1c
(Reset
(Undef instr.)
(SWI)
(Prefetch abort)
(Data abort)
(Reserved)
(IRQ)
(FIQ)
LDR r0,[lr,#4]
BIC r0,r0,#0xff000000
switch (r0){
case 0x00: service_SWI1();
case 0x01: service_SWI2();
case 0x02: service_SWI3();
…
}
MOVS pc, lr
SWI Handler
(S_Handler)
What was in R0? User program
may have been using this
register. Therefore, cannot just
use it must first save it
20. 20
Full SWI Handler
S_Handler:
SUB sp, sp, #4 @ leave room on stack for SPSR
STMFD sp!, {r0r12, lr} @ store user's gp registers
MRS r2, spsr @ get SPSR into gp registers
STR r2, [sp, #14*4] @ store SPSR above gp registers
MOV r1, sp @ pointer to parameters on stack
LDR r0, [lr, #4] @ extract the SWI number
BIC r0,r0,#0xff000000 @ get SWI # by bit-masking
BL C_SWI_handler @ go to handler (see next slide)
LDR r2, [sp, #14*4] @ restore SPSR (NOT “sp!”)
MSR spsr_csxf, r2 @ csxf flags
LDMFD sp!, {r0r12, lr} @ unstack user's registers
ADD sp, sp, #4 @ remove space used to store SPSR
MOVS pc, lr @ return from handler
gp = general-purpose
SPSR is stored above gp registers since the registers
may contain system call parameters (sp in r1)
21. 21
C_SWI_Handler
void C_SWI_handler(unsigned number, unsigned *regs)
{
switch (number){
case 0: /* SWI number 0 code */ break;
case 1: /* SWI number 1 code */ break;
...
case 0x100: puts(“SWI 0x100 trigged!n”);
break;
...
case XXX: /* SWI number XXX code */ break;
default:
} /* end switch */
} /* end C_SWI_handler() */
spsr_svc
lr_svc
r4
r3
r12
r11
r10
r9
r8
r7
r6
r5
r2
r1
r0
Previous sp_svc
sp_svc
regs[12]
regs[0] (also *regs)
22. 22
Loading the Vector Table
/* For 18-349, the Vector Table will use the ``LDR PC, PC,
* offset'' springboard approach */
unsigned Install_Handler(unsigned int routine, unsigned int *vector)
{
unsigned int pcload_instr, old_handler, *soft_vector;
pcload_instr = *vector; /* read the Vector Table instr (LDR ...) */
pcload_instr &= 0xfff; /* compute offset of jump table entry */
pcload_instr += 0x8 + (unsigned)vector; /* == offset adjusted by PC
and prefetch */
soft_vector = (unsigned *)pcload_instr; /* address to load pc from */
old_handler = *soft_vector; /* remember the old handler */
*soft_vector = routine; /* set up new handler in jump table */
return (old_handler); /* return old handler address */
} /* end Install_Handler() */
Called as
Install_Handler ((unsigned) S_Handler, swivec);
where,
unsigned *swivec = (unsigned *) 0x08;
24. 24
Exercise #3
Write a service routine that receives a file name
from a trigger and display the first lines of the file
on the screen.
Void service101(char *filename);
Write a trigger that pass a file name as an
argument to the above service routine through
SWI #0x101.
void trigger101(char *filename);
Write a main program to perform a demonstration.
25. 25
Outline
Exception Handling and Software Interrupts
ELF: Executable and Linking Format
ARM Monitor and Program Loading
26. 26
Introduction to ELF
Executable and Linking Format
Developed by Unix System Lab.
Default binary format on Linux, Solaris 2.x, etc…
Some of the capabilities of ELF are dynamic
linking, dynamic loading, imposing runtime
control on a program, and an improved method for
creating shared libraries.
The ELF representation of control data in an
object file is platform independent.
27. 27
Three Types of ELF Files
Relocatable file
describes how it should be linked with other object files
to create an executable file or shared library.
Executable file
supplies information necessary for the operating system
to create a process image suitable for executing the
code and accessing the data contained within the file.
Shared object file
contains information needed in both static and dynamic
linking.
28. 28
ELF File Format
Two views for each of the three file types.
Linking view and execution view
These views support both the linking and
execution of a program.
Linking view is partitioned by sections.
Execution view is partitioned by segments.
The ELF access library, libelf, provides
tools to extract and manipulate ELF object
files.
29. 29
ELF File Format (cont.)
Linking View Execution View
ELF header
Program header table
(optional)
Section 1
…
Section n
…
…
Section header table
ELF header
Program header table
Segment 1
…
Segment n
…
…
Section header table
(optional)
30. 30
Example: readelf
We can use “readelf” to output ELF information
Example
use “-e” option to read all header from the executable
file of “hello.c”
$ cat hello.c
/* hello.c, a simple example program */
#define GREETING "Hello, World!n"
int main()
{
puts(GREETING);
}
$ arm-elf-gcc –o hello.elf hello.c
$ arm-elf-readelf –e hello.elf
31. 31
Example: ELF Header
ELF Header:
Magic: 7f 45 4c 46 01 01 01 61 00 00 00 00 00 00 00 00
Class: ELF32
Data: 2's complement, little endian
Version: 1 (current)
OS/ABI: ARM
ABI Version: 0
Type: EXEC (Executable file)
Machine: ARM
Version: 0x1
Entry point address: 0x8100
Start of program headers: 52 (bytes into file)
Start of section headers: 168152 (bytes into file)
Flags: 0x202, has entry point, GNU EABI, software FP
Size of this header: 52 (bytes)
Size of program headers: 32 (bytes)
Number of program headers: 1
Size of section headers: 40 (bytes)
Number of section headers: 25
Section header string table index: 22
33. 33
Example: Program Header
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x008000 0x00008000 0x00008000 0x03b88 0x03c94 RWE 0x8000
Section to Segment mapping:
Segment Sections...
00 .init .text .fini .rodata .data .eh_frame .ctors .dtors .jcr .bss
34. 34
Data Representation
Support various processors with 8-bit bytes and
32-bit architectures.
Intended to be extensible to larger or smaller
architecture.
Name Size Alignment Purpose
Elf32_Addr 4 4 Unsigned program address
Elf32_Half 2 2 Unsigned medium integer
Elf32_Off 4 4 Unsigned file offset
Elf32_Sword 4 4 Signed large integer
Elf32_Word 4 4 Unsigned large integer
unsigned char 1 1 Unsigned small integer
35. 35
ELF Header1
It is always the first section of the file.
Describes the type of the object file .
Its target architecture, and the version of ELF it is
using.
The location of the Program Header table, Section
Header table, and String table along with
associated number and size of entries for each
table are also given.
Contains the location of the first executable
instruction.
36. 36
ELF Header2
#define EI_NIDENT 16
typedef struct {
unsigned char e_ident[EI_NIDENT];// file ID, interpretation
Elf32_Half e_type; // object file type
Elf32_Half e_machine; // target architecture
Elf32_Word e_version; // ELF version
Elf32_Addr e_entry; // starting virtual address
Elf32_Off e_phoff; // file offset to program header
Elf32_Off e_shoff; // file offset to section header
Elf32_Word e_flags; // processor-specific flags
Elf32_Half e_ehsize; // the ELF header’s size
Elf32_Half e_phentsize; // program header entry size
Elf32_Half e_phnum; // program header entry number
Elf32_Half e_shentsize; // section header entry size
Elf32_Half e_shnum; // section header entry number
Elf32_Half e_shtrndx; // section header index for string
} Elf32_Ehdr;
37. 37
Section Header
The section header table is an array of structures.
A section header table index is a subscript into
this array.
Each entry correlates to a section in the file.
The entry provides the name, type, memory
image starting address, file offset, the section’s
size in bytes, alignment.
38. 38
The Section Header Table
typedef struct {
Elf32_Word sh_name; // name of section, an index
Elf32_Word sh_type; // type of section
Elf32_Word sh_flags; // section-specific attributes
Elf32_Addr sh_addr; // memory location of section
Elf32_Off sh_offset; // file offset to section
Elf32_Word sh_size; // size of section
Elf32_Word sh_link; // section type, dependent
Elf32_Word sh_info; // extra information, dependent
Elf32_Word sh_addralign; // address alignment
Elf32_Word sh_entsize; // size of an entry in section
} Elf32_Shdr;
39. 39
ELF Sections
A number of types of sections described by
entries in the section header table.
Sections can hold executable code, data, dynamic
linking information, debugging data, symbol
tables, relocation information, comments, string
tables, and notes.
40. 40
Special Sections1
Various sections in ELF are pre-defined.
A list of special sections
.bss un-initialized data
.comment version control information
.data and .data1 initialized data present
.debug… information for symbolic debugging
.dynamic dynamic linking information
.dynstr strings needed for dynamic linking
.hash symbol hash table
.line line number information for debugging
41. 41
Special Sections2
A list of special sections (cont.)
.note file notes
.relname and .relaname
relocation data
.rodata and .rodata1
read-only data
.shstrtab section names
.strtab the strings that represent the names
associated with symbol table entries
.symtab symbol table
.text executable instructions
42. 42
String Table
The object file uses these strings to represent
symbol and section names.
The first and last byte is defined to hold a null
character.
An empty string table section is permitted.
Ex:
index +0 +1 +2 +3 +4 +5 +6 +7 +8 +9
0 0 n a m e . 0 V a r
10 i a b l e 0 a b l e
20 0 0 x x 0
43. 43
Symbol Table
Holds information needed to locate and relocate a
program’s symbolic definitions and references.
A symbol table entry
typedef struct {
Elf32_Word st_name; // symbol name, an index
Elf32_Addr st_value; // symbol value
Elf32_Word st_size; // symbol size
unsigned char st_info; // symbol’s type and binding attributes
unsigned char st_other; // symbol visibility
Elf32_Half st_shndx; // relevant section header table index
} Elf32_Sym;
44. 44
Program Header
Program headers are meaningful only for
executable and shared object files.
The program header table is an array of
structures, each describing a segment or other
information.
An object file segment contains one or more
sections.
A file specifies its own program header size with
the ELF header’s e_phentsize & e_phnum.
45. 45
The Program Header Table
typedef struct {
Elf32_Word p_type; // type of the segment
Elf32_Off p_offset; // file offset to segment
Elf32_Addr p_vaddr; // virtual address of first byte
Elf32_Addr p_paddr; // segments’ physical address
Elf32_Word p_filesz; // size of file image of segment
Elf32_Word p_memsz; // size of memory image of segment
Elf32_Word p_flags; // segment-specific flags
Elf32_Word p_align; // alignment requirements
} Elf32_Phdr;
46. 46
Executable Programs
A program to be loaded by the system must have
at least one loadable segment.
Segments are a way of grouping related sections.
A process image is created by loading and
interpreting segments.
Segment contents
A segment comprises one or more sections.
Text segments contain read-only instructions and data.
Data segments contain writable data and instructions
47. 47
ELF Segments
Text segment example Data segment example
.hash
.dynsym
.dynstr
.text
.rodata
.rel
.plt
.data
.dynamic
.got
.bss
48. 48
Exercise #4
Write a service routine that receives the name of
an ELF executable file as a parameter and display
the offset of program header on the screen.
Void service102(char *filename);
Write a trigger that pass a file name to the above
service routine through SWI #102.
void trigger102(char *filename);
Write a main program to perform a demonstration.
49. 49
Outline
Exception Handling and Software Interrupts
ELF: Executable and Linking Format
ARM Monitor and Program Loading
50. 50
Overview of ARM Debug Monitor
The ARM Debug Monitor is called “Angel”
(earlier versions called it the “Demon” – get it?)
Provides
lowlevel programming C library and debugging
environment
When the X-board first boots, they load the demon
from flash memory (emulator pretends that this
happens)
This activity is called “bootstrapping”
51. 51
Memory Map of Demon
0x0000 CPU reset vector
0x0004 ...0x1c CPU undefined instruction ... CPU Fast Interrupt Vector
0x0020 ~1K Bytes for FIQ and FIQ mode stack
0x0400 256 bytes for IRQ mode stack
0x0500 256 bytes for Undefined mode stack
0x0600 256 bytes for Abort mode stack
0x0700 256 bytes for SVC mode stack
0x0800 Debug monitor private workspace
0x1000 Free for user-supplied Debug Monitor
0x2000 Floating Point Emulation Space
0x8000 Application Space
top of memory SWI_Getenv returns top of memory = 0x08000000
52. 52
Monitor Program
Provide Capability to
Setup Hardware on startup
Load and run programs
Debug code
Minimal OS functionality
Many embedded systems are just
Monitor + application
Monitor still handles other types of interrupts (we'll
cover this later)
l timer, I/O (e.g., keypad, switches, LED, LCD)
53. 53
Example System
Interrupt from external
devices
keyboards, timers, disk
drives
We refer to each piece
of software as a
process
Codes
Program counter
Registers
Stack
Other terms
Task
Thread
54. 54
Debug Monitor SWIs
Angel provides a number of SWIs that you can use
SWI_WriteC (0) Write a byte to the debug channel
SWI_Write0(2) Write the null-terminated string to debug channel
SWI_ReadC(4) Read a byte from the debug channel
SWI_Exit (0x11) Halt emulation this is how a program exits
SWI_EnterOS (0x16) Put the processor in supervisor mode
SWI_GetErrno (0x60) Returns (r0) the value of the C library err-no variable
SWI_Clock (0x61) Return the number of centi-seconds
SWI_Time (0x63) Return the number of seconds since Jan. 1, 1970
SWI_Remove (0x64) Deletes the file named by pointer in r0
SWI_Rename (0x65) Renames a file
SWI_Open (0x66) Open file (or device)
SWI_Close (0x68) Close a file (or device)
SWI_Write (0x69) Read a file
SWI_Read (0x6a) Write a file
SWI_Seek (0x6b) Seek to a specific location in a file
SWI_Flen (0x6c) Returns length of the file object
SWI_InstallHandler(0x70) installs a handler for a hardware exception
55. 55
Program Loading
Monitor reads program from ??? and puts it into
RAM
Does it just copy the executable into RAM??
Where does it put it??
Who sets up the user stack??
Who sets up the user heap??
56. 56
ARM File Formats
ARM supports many formats for executables
Executable ARM Image Format (AIF)
Non-executable ARM Image Format (AIF)
ARM Object Format (AOF)
ARM Object Library Format
ARM Symbolic Debug Table Format
ARM ELF
Specialized version of ELF
Each provides code + data + other information
We will focus on ARM ELF
57. 57
ARM ELF
ARM ELF
ELF (Executable and Linking
Format) header
Image's code
Image's initialized static data
Debug and relocation
information (optional)
We will use static linking
(no dynamic linking or
shared libraries)
ELF Header
Program Header Table
Segment 1
Segment 2
… …
Section Header Table
optional
ARM ELF File
58. 58
Loading an Executable1
Read the executable file
ARMulator gets stuff from the native file system
Loader uses the SWI_Open and SWI_Read Monitor
system calls
Parse the header to determine the size of the image
Starting location and image base
Create new address space for program large
enough to hold text and data segments, along with
a stack segment
Copy instructions and data from executable file
into the new address space
59. 59
Loading an Executable2
Zero-init the un-initialized data
Copy arguments passed to the program onto the
stack
Initializes machine registers
Most registers cleared, but stack pointer assigned
address of 1st free stack location
Jumps to start-up routine that copies program’s
arguments from stack to registers and sets the PC
If main routine returns, start-up routine terminates
program with the SWI_Exit system call
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Optional ARM ELF Components
Compression
Self-decompression code included in image
Relocation
Self relocation code included in image
Debugging
Symbol table for debugger use
String tables for efficient allocation of strings
Can have more than one section per segment
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Starting a Program
We discussed how an application's initial PC is set
The loader gets the address of the starting instruction
from the object file header
To start the program, the loader moves the specified
address into the PC
Is main() the starting point?
In other words, does the PC initially get set to the
address of main()?
Let's look at an example
69. 69
Starting a C Program
To get to main() takes hundreds of instructions!
In a modern OS, it can take several thousands of
instructions!
Why? Because the C compiler generates code for a
number of setup routines before the call to main().
These setup routines handle the stack, data segments,
heap and other miscellaneous functions.
70. 70
Starting an Assembly Program
What about assembly code?
If the assembly code interfaces to C code and the
ENTRY point is the C function main(), then the C
compiler will generate the setup code
But, if the entire program is written in assembly OR
there is no C function called main(), then the setup code
is not generated.
What does this mean for you?
What's the SP register pointing to when you start your
program?
