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72 International Journal for Modern Trends in Science and Technology
Volume: 2 | Issue: 04 | April 2016 | ISSN: 2455-3778IJMTST
A New Configuration of Asymmetric
Multilevel Converter to Maximize the Number
of Levels in Output Voltage Waveform
Md. Khwaja Mohiddin
Assistant Professor, Department of Electronics & Telecommunication Engineering,
Bhilai Institute of Technology, Raipur, Chhattisgarh, India

The multilevel converters are increasingly becoming popular because of its high power applications. This
research paper describes about the new structure that can produce increased number of output voltage
waveform using a single source and reduced number of power electronic components. In designing a
multilevel converter, the power electronic switches play a very imperative role as it describes the installation
area, cost, configuration complexity and may more things that play a significant role while designing. The
prime function of multilevel converter is to abolish total harmonic distortion and to incorporate desired ac
voltage from several separate dc sources. Each level consists of H-Bridge converter units. High efficiency,
high voltage capability, lower switching losses are its prime advantages. A multilevel power converter
structure can be introduced as an alternative in medium voltage and high power situations. This structure not
only achieves high power ratings but also empower the use of renewable energy sources. It finds its basic
application in adjustable speed drives, Static Compensator (STATCOM).
KEYWORDS: Asymmetric, Multilevel Inverter, SVM, Cascaded H-Bridge
Copyright © 2015 International Journal for Modern Trends
in Science and Technology
All rights reserved.
I. INTRODUCTION
The researchers started working in the concept of
multilevel converter in 1975[1]. The fundamental
concept of a multilevel converter is to achieve high
power. It uses a series of power semiconductor
switches with several lower voltage dc sources to
perform the power conversion. The multilevel
converters can act as both a converter and an
inverter. They can produce large number of output
voltage levels with high voltage capability. The
multilevel converters have more than two output
voltage levels with respect to a reference point.
The concept of multilevel converters began with
the three level converters. For a medium voltage
grid, it is difficult to associate only one power
semiconductor switch directly. Thus, a multilevel
power converter introduces a substitute in high
power and medium voltage situations [2]. A
multilevel converter finds several advantages over
a conventional two level converter that uses high
switching frequencies pulse width modulation
(PWM) [3].
i.Staircase waveform quality: The converter
not only generates output voltage with low
distortion but also low dv/dt stress.
ii.Common-mode (CM) voltage: The converters
produce smaller common mode voltage; hence,
the stress in the bearings of a motor connected
to a multilevel motor drive can be reduced. The
common mode voltage can be eliminated using
the advanced modulation strategies.
iii.Input current: Multilevel converter can tie
input current with low distortion
iv.Switching frequency: The converters can
operate at both principal switching frequency
and high switching frequency PWM.
On the basis of configuration, the converters can
be divided as symmetric, asymmetric and
cascaded form multilevel converter [4]. The
symmetric multilevel converter uses dc sources of
similar values, while asymmetric multilevel
converter uses dc sources of unequal values. The
cascaded multilevel converter uses the
ABSTRACT
73 International Journal for Modern Trends in Science and Technology
A New Configuration of Asymmetric Multilevel Converter to Maximize the Number of Levels in
Output Voltage Waveform
configuration of either symmetric or asymmetric
multilevel converter.
Multilevel converters also have some
disadvantages. The greatest of them is the
requirement of greater number of semiconductor
switches [5]. Lower voltage rated switches can be
utilized, but each switch will require a related gate
drive circuit. This can increase the overall
complexity and cost of the system. In general,
there are three types of multilevel converters:
1)Neutral Point Clamped (NPC) converter
2)Flying Capacitor (FC) converter
3)Cascade H-Bridge (CHB) converter
The main drawback of NPC converter is the
unequal voltage in the midst of series connected
capacitors. Moreover, this structure needs large
number of clamping diodes for higher levels [6]-[8].
Contrary to this, the FC converter requires large
number of storage capacitors for higher output
voltage levels and capacitor voltage balancing is
difficult. Conventional cascade multilevel
converter is the most important amongst the used
topologies because it requires least number of
components [9]. A cascaded multilevel converter
comprises of H-bridge cells. The major drawback is
that it requires large number of isolated dc
supplies. This can increase the overall complexity
of the system. So, to overcome it, split source
capacitors are used [10].
Numerous studies have been made by the
researchers for the control on multilevel converter.
They can be different on the basis of configuration
[11]. For asymmetric multilevel converter, voltage
vector approximation technique is applied, which
is a type of fundamental frequency control.
Whereas for symmetric multilevel converter, both
low switching and high switching frequencies are
considered. These approaches include space
vector modulation, multicarrier PWM strategy,
amplitude control and harmonic reduction.
II. PREVIOUS WORK
In the previous work of asymmetric multilevel
converter, the level of output voltage waveform is
raised up to 15 levels. IGBT’s are used as the
switches with a total of three sources. In case of
asymmetric, the sources used were of unequal
values. However, such type of structure requires
large number of sources and switches as
compared to cascade configuration.
The previous topology suggested two main
methods named as binary and trinary
configuration. The asymmetric configuration can
produce maximum number of output voltage
levels with less number of switches when
compared to symmetric multilevel converter.
This configuration can also be used in
renewable energy sources. Since this system used
only one full bridge converter, it restricted the use
of high power applications. Thus the previous
configuration was suitable only for low voltage and
medium voltage applications.
III. PROPOSED 19 LEVEL ASYMMETRIC MULTILEVEL
CONVERTER
The block diagram below shows the proposed
work of asymmetric multilevel converter.
Figure 1 Block Diagram
The proposed system of asymmetric multilevel
converter consists of a single dc source. The
asymmetric multilevel converter provides an
optimized number of output voltage levels for the
same number of power electronic devices when
compared to its symmetric counterpart. It should
be noted that a multilevel converter can act both
as an inverter and a rectifier. The cascaded
H-Bridge topology is used to get the desired
number of levels. Each switch is comprised of
H-bridge cells. Each block of switches is provided
with a triggering pulse. The major disadvantage of
cascaded H-bridge cells is that it requires greater
number of isolated dc sources in the input side.
The greater number of dc sources can increase the
complexity of the circuit and cost. To minimize this
complexity, split source capacitors are used. The
main function of these capacitors is to equally
divide the input voltage source amongst the power
electronic switches. The methodology used in the
multilevel converter is the space vector
modulation technique.
74 International Journal for Modern Trends in Science and Technology
Volume: 2 | Issue: 04 | April 2016 | ISSN: 2455-3778IJMTST
IV. EXPERIMENTAL METHOD
The space vector PWM technique is an algorithm
for control of pulse width modulation. It is
commonly used to drive 3 phase ac powered
motors at alternating speeds from dc using
multiple Class D amplifiers. One active area of
development of SVM is in the reduction of total
harmonic distortion (THD) created by rapid
switching inherent to these algorithms (figure 2).
An inverter is commonly used in variable speed AC
motor drives to yield a variable, three phase, AC
output voltage from a constant DC voltage.
Basically, amplitude and frequency defines the
two characteristics of AC voltage. Thus it is
essential to work out a strategy on how to control
both these quantities [13].
Figure 2 Topology of a Basic Three Phase Inverter
With a three phase voltage source inverter there
are eight possible operating states. In (figure 4),
the upper switch of the inverter’s pole A is on
whereas the lower switch is off. Contrary to this,
on the other two legs, the upper switch is off while
the lower switch is on for V (100) condition.
Because of the constraint that the input lines
must at no time be shorted and the output current
must always be continuous a voltage source
inverter can assume only eight distinct topologies.
Six out of these eight topologies yield a non-zero
output voltage and are admitted as non-zero
switching states and the remaining two topologies
produce zero output voltage and are certified as
zero switching states.
The space vector modulation (SVM) for three-leg
VSI is positioned on the representation of the
three phase quantities as vectors in a
two-dimensional ( plane. This can be seen in
the vector representation diagram. The voltages
Vab, Vbc and Vca are three line voltage vectors
displaced by 120 degrees in space.
Figure 3 Vector Representation of SVM
The desired three phase voltages at the output of
the inverter could be described by an equivalent
vector Vref. The reference vector is then
synthesized using combination of two adjacent
active switching vectors and one or both of the
zero vectors.
Figure 4 Eight Possible Switching States
The magnitude of this vector is related to the
degree of the output voltage and the time this
vector takes to complete one revolution is the
same as the principal time period of the output
voltage.
V. EXPERIMENTAL SETUP
The diagram below shows the circuit diagram of
the proposed system. The input dc source of 90 V
is used. A total of nine split source capacitors are
used. The main function of split source capacitor
is to equally divide the input source to the
switches. MOSFETs are used as the switches with
the combination of diodes with it.
A total of thirty two diodes are used. Also twelve
MOSFET switches are used. A subsystem
designated as “Out1” is used to provide the pulses
to the gate of MOSFET and input to the triggering
pulses block. The diodes are such connected that
they are anti parallel to each other.
75 International Journal for Modern Trends in Science and Technology
A New Configuration of Asymmetric Multilevel Converter to Maximize the Number of Levels in
Output Voltage Waveform
Some of the MOSFET switches are individually
used and the pulses are given through the
subsystem interconnected to it. The voltage
measurement and current measurement blocks
are also used for ideal voltage and current
measurement respectively. Series RL branch is
also used to obtain the desired output. Finally the
output is taken from the output voltage
parameter.
Figure 5 Subsystem of Generating Pulses
Discrete,
Ts = 5e-005 s.
powergui
v+
-
Vo
v
+
-
Vin
Vdc
Triggerin
Pulses 3
Triggerin
Pulses 2
Triggerin
Pulses 1
signal THD
Total Harmonic
Distortion
gm
DS
S9
gm
DS
S8
gm
DS
S7
gm
DS
S6
gm
DS
S5
gm
DS
S4
gm
DS
S3
gm
DS
S2
gm
DS
S12
gm
DS
S11
gm
DS
S10
gm
DS
S1
R1
R
O/P VOLTAGE
O/P CURRENT
I/P Voltage
Out1
G9
Out1
G8
Out1
G7
Out1
G6
Out1
G5
G4
Out1
G3
G2
Out1
G12
Out1
G11
Out1
G10
Out1
G1
m
a
k
Diode9
m
a
k
Diode8
m
a
k
Diode7
m
a
k
Diode6
m
a
k
Diode5
m
a
k
Diode4
m
a
k
Diode31
m
a
k
Diode30
m
a
k
Diode3
m
a
k
Diode29
m
a
k
Diode28
m
a
k
Diode27
m
a
k
Diode26
m
a
k
Diode25
m
a
k
Diode24
m
a
k
Diode23
m
a
k
Diode22
m
a
k
Diode21
m
a
k
Diode20
m
a
k
Diode2
m
a
k
Diode19
m
a
k
Diode18
m
a
k
Diode17
m
a
k
Diode16
m
a
k
Diode15
m
a
k
Diode14
m
a
k
Diode13
m
a
k
Diode12
m
a
k
Diode11
m
a
k
Diode10
m
a
k
Diode1
m
a
k
Diode
i
+
-
C 9
C 8
C 7
C 6
C 5
C 4
C 3
C 2
C 1
Figure 6 Circuit Diagram of Proposed System
VI. SIMULATION RESULTS
This section deals with the simulation results of
the proposed 19 level asymmetric multilevel
converter. Single dc source of value 90V is used as
the input source. The value of output voltage
frequency is 50 Hz.
Figure 7 Output Voltage Waveform
Figure 8 Output Current Waveform
Figure 9 Total Harmonic Distortion (5.70%)
VII. CONCLUSION
This paper proposes a new structure for
asymmetric multilevel converter. This new
structure minimizes the use of dc source and also
increases the levels of output voltage waveform.
This system is suitable for medium and high
voltage applications. Because of the use of single
dc source and less number of switches, the overall
76 International Journal for Modern Trends in Science and Technology
Volume: 2 | Issue: 04 | April 2016 | ISSN: 2455-3778IJMTST
cost and complexity of the system is reduced. The
fundamental frequency control strategy increases
the efficiency of the converter.
VIII. FUTURE SCOPE
The proposed design can be further used to raise
the level of output voltage. Also other power
electronic components like IGBT can be used in
place of MOSFET. The proposed structure can also
be changed to get the desired number of levels
which can also minimize the total harmonic
distortion.
REFERENCES
[1] Rasoul Shalchi Alishah, Daryoosh Nazarpour,
Seyed Hossein Hosseini, “Novel Topologies for
Symmetric, Asymmetric and Cascade
Switched-Diode Multilevel Converter with Minimum
Number of Power Electronic Components”, IEEE
Transactions on Industrial Electronics, Vol. 61, no.
10, October 2014, pp 5300- 5310
[2] Surin Khomfoi, Leon M. Tolbert, “Chapter-31
Multilevel Power Converters”, the University of
Tennessee, Publication: EECS, 2007, pp 1-50
[3] Valery Vodovozov, Raik Jansikene, “Power
Electronic Converters”, Publisher Tallinn: TUT,
2006, pp 1-120
[4] Mohammad N. Abdul Kadir, Saad Mekhilef, Hew
Wooi Ping, “Dual Vector Control Strategy for a Three
Stage Hybrid Cascaded Multilevel Inverter”, Journal
of Power Electronics, Vol. 10, no. 2, March 2010, pp
155-164
[5] E. Babaei, M. T. Haque, S. H. Hosseini, “A Novel
Structure for Multilevel Converter”, Electrical
Machines and Systems, 2005, ICEMS, 2005,
Proceedings of Eighth International Conference (Vol.
2), pp 1278-1283
[6] M. N. Abdul Kadir, S. Mekhilef, H. W. Ping, “Voltage
Control of Three Stage Hybrid Multilevel Inverter
Using Vector Decomposition”, Power Electronics,
IEEE Transactions on Vol. 3, no. 4, 2010, pp
601-611
[7] Madhav D. Manjrekar, Peter K. Steimer, Thomas A.
Lipo, “Hybrid Multilevel Power Conversion System:
A Competitive Solution for High Power Application”,
IEEE Transactions on Industry Applications, Vol.
36, no. 3, May/June 2000, pp 834-841
[8] R. A. Ahmed, S. Mekhilef, H. W. Ping, “New
Multilevel Inverter Topology with Reduced Number
of Switches”, in Proc. Int. Middle East Power System
Conf., 2010, pp 565-570
[9] Y. S. Lai, F. S. Shyu, “Topology for Hybrid Multilevel
Inverter”, Proc. Int. Elect. Engg.-Elect. Power Appl.,
Vol 149, no. 6, November 2002, pp 449-458
[10]N Khader Basha, M Abid Nayeemuddin, “A New
Cascaded multilevel Inverter with Less Number of
Switches”, International Journal of Research in
Engineering and Technology, pISSN: 2321-7308,
Vol. 2, Issue 9, September 2013, pp 159-165
[11]Rokan Ali Ahmed, S. Mekhilef, Hew Wooi Ping, “New
Multilevel Inverter Topology with Less Number of
Switches”, Proceedings of 14th International Middle
East Power Systems Conference (MEPCON’10),
Cairo University, Egypt, December 19-21, 2010,
Paper ID 236, pp 565-570
[12]Hulusi Karaca, “A Novel Topology for Multilevel
Inverter with Reduced number of Switches”,
Proceedings of World Congress on Engineering and
Computer Science (WCECS) 2013, Vol. 1, October
23-25, 2013, San Francisco, USA, pp 350-354
[13]Implementing Space Vector Modulation with the
ADMCF32X, © Analog Devices Inc., January 2000,
pp 1-22

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A New Configuration of Asymmetric Multilevel Converter to Maximize the Number of Levels in Output Voltage Waveform

  • 1. 72 International Journal for Modern Trends in Science and Technology Volume: 2 | Issue: 04 | April 2016 | ISSN: 2455-3778IJMTST A New Configuration of Asymmetric Multilevel Converter to Maximize the Number of Levels in Output Voltage Waveform Md. Khwaja Mohiddin Assistant Professor, Department of Electronics & Telecommunication Engineering, Bhilai Institute of Technology, Raipur, Chhattisgarh, India The multilevel converters are increasingly becoming popular because of its high power applications. This research paper describes about the new structure that can produce increased number of output voltage waveform using a single source and reduced number of power electronic components. In designing a multilevel converter, the power electronic switches play a very imperative role as it describes the installation area, cost, configuration complexity and may more things that play a significant role while designing. The prime function of multilevel converter is to abolish total harmonic distortion and to incorporate desired ac voltage from several separate dc sources. Each level consists of H-Bridge converter units. High efficiency, high voltage capability, lower switching losses are its prime advantages. A multilevel power converter structure can be introduced as an alternative in medium voltage and high power situations. This structure not only achieves high power ratings but also empower the use of renewable energy sources. It finds its basic application in adjustable speed drives, Static Compensator (STATCOM). KEYWORDS: Asymmetric, Multilevel Inverter, SVM, Cascaded H-Bridge Copyright © 2015 International Journal for Modern Trends in Science and Technology All rights reserved. I. INTRODUCTION The researchers started working in the concept of multilevel converter in 1975[1]. The fundamental concept of a multilevel converter is to achieve high power. It uses a series of power semiconductor switches with several lower voltage dc sources to perform the power conversion. The multilevel converters can act as both a converter and an inverter. They can produce large number of output voltage levels with high voltage capability. The multilevel converters have more than two output voltage levels with respect to a reference point. The concept of multilevel converters began with the three level converters. For a medium voltage grid, it is difficult to associate only one power semiconductor switch directly. Thus, a multilevel power converter introduces a substitute in high power and medium voltage situations [2]. A multilevel converter finds several advantages over a conventional two level converter that uses high switching frequencies pulse width modulation (PWM) [3]. i.Staircase waveform quality: The converter not only generates output voltage with low distortion but also low dv/dt stress. ii.Common-mode (CM) voltage: The converters produce smaller common mode voltage; hence, the stress in the bearings of a motor connected to a multilevel motor drive can be reduced. The common mode voltage can be eliminated using the advanced modulation strategies. iii.Input current: Multilevel converter can tie input current with low distortion iv.Switching frequency: The converters can operate at both principal switching frequency and high switching frequency PWM. On the basis of configuration, the converters can be divided as symmetric, asymmetric and cascaded form multilevel converter [4]. The symmetric multilevel converter uses dc sources of similar values, while asymmetric multilevel converter uses dc sources of unequal values. The cascaded multilevel converter uses the ABSTRACT
  • 2. 73 International Journal for Modern Trends in Science and Technology A New Configuration of Asymmetric Multilevel Converter to Maximize the Number of Levels in Output Voltage Waveform configuration of either symmetric or asymmetric multilevel converter. Multilevel converters also have some disadvantages. The greatest of them is the requirement of greater number of semiconductor switches [5]. Lower voltage rated switches can be utilized, but each switch will require a related gate drive circuit. This can increase the overall complexity and cost of the system. In general, there are three types of multilevel converters: 1)Neutral Point Clamped (NPC) converter 2)Flying Capacitor (FC) converter 3)Cascade H-Bridge (CHB) converter The main drawback of NPC converter is the unequal voltage in the midst of series connected capacitors. Moreover, this structure needs large number of clamping diodes for higher levels [6]-[8]. Contrary to this, the FC converter requires large number of storage capacitors for higher output voltage levels and capacitor voltage balancing is difficult. Conventional cascade multilevel converter is the most important amongst the used topologies because it requires least number of components [9]. A cascaded multilevel converter comprises of H-bridge cells. The major drawback is that it requires large number of isolated dc supplies. This can increase the overall complexity of the system. So, to overcome it, split source capacitors are used [10]. Numerous studies have been made by the researchers for the control on multilevel converter. They can be different on the basis of configuration [11]. For asymmetric multilevel converter, voltage vector approximation technique is applied, which is a type of fundamental frequency control. Whereas for symmetric multilevel converter, both low switching and high switching frequencies are considered. These approaches include space vector modulation, multicarrier PWM strategy, amplitude control and harmonic reduction. II. PREVIOUS WORK In the previous work of asymmetric multilevel converter, the level of output voltage waveform is raised up to 15 levels. IGBT’s are used as the switches with a total of three sources. In case of asymmetric, the sources used were of unequal values. However, such type of structure requires large number of sources and switches as compared to cascade configuration. The previous topology suggested two main methods named as binary and trinary configuration. The asymmetric configuration can produce maximum number of output voltage levels with less number of switches when compared to symmetric multilevel converter. This configuration can also be used in renewable energy sources. Since this system used only one full bridge converter, it restricted the use of high power applications. Thus the previous configuration was suitable only for low voltage and medium voltage applications. III. PROPOSED 19 LEVEL ASYMMETRIC MULTILEVEL CONVERTER The block diagram below shows the proposed work of asymmetric multilevel converter. Figure 1 Block Diagram The proposed system of asymmetric multilevel converter consists of a single dc source. The asymmetric multilevel converter provides an optimized number of output voltage levels for the same number of power electronic devices when compared to its symmetric counterpart. It should be noted that a multilevel converter can act both as an inverter and a rectifier. The cascaded H-Bridge topology is used to get the desired number of levels. Each switch is comprised of H-bridge cells. Each block of switches is provided with a triggering pulse. The major disadvantage of cascaded H-bridge cells is that it requires greater number of isolated dc sources in the input side. The greater number of dc sources can increase the complexity of the circuit and cost. To minimize this complexity, split source capacitors are used. The main function of these capacitors is to equally divide the input voltage source amongst the power electronic switches. The methodology used in the multilevel converter is the space vector modulation technique.
  • 3. 74 International Journal for Modern Trends in Science and Technology Volume: 2 | Issue: 04 | April 2016 | ISSN: 2455-3778IJMTST IV. EXPERIMENTAL METHOD The space vector PWM technique is an algorithm for control of pulse width modulation. It is commonly used to drive 3 phase ac powered motors at alternating speeds from dc using multiple Class D amplifiers. One active area of development of SVM is in the reduction of total harmonic distortion (THD) created by rapid switching inherent to these algorithms (figure 2). An inverter is commonly used in variable speed AC motor drives to yield a variable, three phase, AC output voltage from a constant DC voltage. Basically, amplitude and frequency defines the two characteristics of AC voltage. Thus it is essential to work out a strategy on how to control both these quantities [13]. Figure 2 Topology of a Basic Three Phase Inverter With a three phase voltage source inverter there are eight possible operating states. In (figure 4), the upper switch of the inverter’s pole A is on whereas the lower switch is off. Contrary to this, on the other two legs, the upper switch is off while the lower switch is on for V (100) condition. Because of the constraint that the input lines must at no time be shorted and the output current must always be continuous a voltage source inverter can assume only eight distinct topologies. Six out of these eight topologies yield a non-zero output voltage and are admitted as non-zero switching states and the remaining two topologies produce zero output voltage and are certified as zero switching states. The space vector modulation (SVM) for three-leg VSI is positioned on the representation of the three phase quantities as vectors in a two-dimensional ( plane. This can be seen in the vector representation diagram. The voltages Vab, Vbc and Vca are three line voltage vectors displaced by 120 degrees in space. Figure 3 Vector Representation of SVM The desired three phase voltages at the output of the inverter could be described by an equivalent vector Vref. The reference vector is then synthesized using combination of two adjacent active switching vectors and one or both of the zero vectors. Figure 4 Eight Possible Switching States The magnitude of this vector is related to the degree of the output voltage and the time this vector takes to complete one revolution is the same as the principal time period of the output voltage. V. EXPERIMENTAL SETUP The diagram below shows the circuit diagram of the proposed system. The input dc source of 90 V is used. A total of nine split source capacitors are used. The main function of split source capacitor is to equally divide the input source to the switches. MOSFETs are used as the switches with the combination of diodes with it. A total of thirty two diodes are used. Also twelve MOSFET switches are used. A subsystem designated as “Out1” is used to provide the pulses to the gate of MOSFET and input to the triggering pulses block. The diodes are such connected that they are anti parallel to each other.
  • 4. 75 International Journal for Modern Trends in Science and Technology A New Configuration of Asymmetric Multilevel Converter to Maximize the Number of Levels in Output Voltage Waveform Some of the MOSFET switches are individually used and the pulses are given through the subsystem interconnected to it. The voltage measurement and current measurement blocks are also used for ideal voltage and current measurement respectively. Series RL branch is also used to obtain the desired output. Finally the output is taken from the output voltage parameter. Figure 5 Subsystem of Generating Pulses Discrete, Ts = 5e-005 s. powergui v+ - Vo v + - Vin Vdc Triggerin Pulses 3 Triggerin Pulses 2 Triggerin Pulses 1 signal THD Total Harmonic Distortion gm DS S9 gm DS S8 gm DS S7 gm DS S6 gm DS S5 gm DS S4 gm DS S3 gm DS S2 gm DS S12 gm DS S11 gm DS S10 gm DS S1 R1 R O/P VOLTAGE O/P CURRENT I/P Voltage Out1 G9 Out1 G8 Out1 G7 Out1 G6 Out1 G5 G4 Out1 G3 G2 Out1 G12 Out1 G11 Out1 G10 Out1 G1 m a k Diode9 m a k Diode8 m a k Diode7 m a k Diode6 m a k Diode5 m a k Diode4 m a k Diode31 m a k Diode30 m a k Diode3 m a k Diode29 m a k Diode28 m a k Diode27 m a k Diode26 m a k Diode25 m a k Diode24 m a k Diode23 m a k Diode22 m a k Diode21 m a k Diode20 m a k Diode2 m a k Diode19 m a k Diode18 m a k Diode17 m a k Diode16 m a k Diode15 m a k Diode14 m a k Diode13 m a k Diode12 m a k Diode11 m a k Diode10 m a k Diode1 m a k Diode i + - C 9 C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 Figure 6 Circuit Diagram of Proposed System VI. SIMULATION RESULTS This section deals with the simulation results of the proposed 19 level asymmetric multilevel converter. Single dc source of value 90V is used as the input source. The value of output voltage frequency is 50 Hz. Figure 7 Output Voltage Waveform Figure 8 Output Current Waveform Figure 9 Total Harmonic Distortion (5.70%) VII. CONCLUSION This paper proposes a new structure for asymmetric multilevel converter. This new structure minimizes the use of dc source and also increases the levels of output voltage waveform. This system is suitable for medium and high voltage applications. Because of the use of single dc source and less number of switches, the overall
  • 5. 76 International Journal for Modern Trends in Science and Technology Volume: 2 | Issue: 04 | April 2016 | ISSN: 2455-3778IJMTST cost and complexity of the system is reduced. The fundamental frequency control strategy increases the efficiency of the converter. VIII. FUTURE SCOPE The proposed design can be further used to raise the level of output voltage. Also other power electronic components like IGBT can be used in place of MOSFET. The proposed structure can also be changed to get the desired number of levels which can also minimize the total harmonic distortion. REFERENCES [1] Rasoul Shalchi Alishah, Daryoosh Nazarpour, Seyed Hossein Hosseini, “Novel Topologies for Symmetric, Asymmetric and Cascade Switched-Diode Multilevel Converter with Minimum Number of Power Electronic Components”, IEEE Transactions on Industrial Electronics, Vol. 61, no. 10, October 2014, pp 5300- 5310 [2] Surin Khomfoi, Leon M. Tolbert, “Chapter-31 Multilevel Power Converters”, the University of Tennessee, Publication: EECS, 2007, pp 1-50 [3] Valery Vodovozov, Raik Jansikene, “Power Electronic Converters”, Publisher Tallinn: TUT, 2006, pp 1-120 [4] Mohammad N. Abdul Kadir, Saad Mekhilef, Hew Wooi Ping, “Dual Vector Control Strategy for a Three Stage Hybrid Cascaded Multilevel Inverter”, Journal of Power Electronics, Vol. 10, no. 2, March 2010, pp 155-164 [5] E. Babaei, M. T. Haque, S. H. Hosseini, “A Novel Structure for Multilevel Converter”, Electrical Machines and Systems, 2005, ICEMS, 2005, Proceedings of Eighth International Conference (Vol. 2), pp 1278-1283 [6] M. N. Abdul Kadir, S. Mekhilef, H. W. Ping, “Voltage Control of Three Stage Hybrid Multilevel Inverter Using Vector Decomposition”, Power Electronics, IEEE Transactions on Vol. 3, no. 4, 2010, pp 601-611 [7] Madhav D. Manjrekar, Peter K. Steimer, Thomas A. Lipo, “Hybrid Multilevel Power Conversion System: A Competitive Solution for High Power Application”, IEEE Transactions on Industry Applications, Vol. 36, no. 3, May/June 2000, pp 834-841 [8] R. A. Ahmed, S. Mekhilef, H. W. Ping, “New Multilevel Inverter Topology with Reduced Number of Switches”, in Proc. Int. Middle East Power System Conf., 2010, pp 565-570 [9] Y. S. Lai, F. S. Shyu, “Topology for Hybrid Multilevel Inverter”, Proc. Int. Elect. Engg.-Elect. Power Appl., Vol 149, no. 6, November 2002, pp 449-458 [10]N Khader Basha, M Abid Nayeemuddin, “A New Cascaded multilevel Inverter with Less Number of Switches”, International Journal of Research in Engineering and Technology, pISSN: 2321-7308, Vol. 2, Issue 9, September 2013, pp 159-165 [11]Rokan Ali Ahmed, S. Mekhilef, Hew Wooi Ping, “New Multilevel Inverter Topology with Less Number of Switches”, Proceedings of 14th International Middle East Power Systems Conference (MEPCON’10), Cairo University, Egypt, December 19-21, 2010, Paper ID 236, pp 565-570 [12]Hulusi Karaca, “A Novel Topology for Multilevel Inverter with Reduced number of Switches”, Proceedings of World Congress on Engineering and Computer Science (WCECS) 2013, Vol. 1, October 23-25, 2013, San Francisco, USA, pp 350-354 [13]Implementing Space Vector Modulation with the ADMCF32X, © Analog Devices Inc., January 2000, pp 1-22