Personal Information
Organização/Local de trabalho
Phoenix, Arizona Area United States
Cargo
Actively seeking full-time positions in RTL, ASIC Physical design and Verification.
Sobre
Electrical Engineering graduate student specialized in CMOS technologies and Digital Circuit Design at Arizona State University. Actively seeking full-time positions in RTL, Physical Design and verification positions.
As part of course curriculum, worked on
- Digital ASIC design using Cadence and Synopsis design Flow tools.
- Microprocessor desgin, Cache replacement policies in Compuer Architecture. Knowledge on gem5 and CMPSim.
- Custom ASIC Design for 32 x 32 Register File on 7nm PDK (Layout Design, Optimization, DRC,
LVS using Calibre and Timing Analysis using Hspice.
- Design and Optimization of Standard SRAM cell for minimum Data retention Voltage using AS...
Apresentações
(1)Personal Information
Organização/Local de trabalho
Phoenix, Arizona Area United States
Cargo
Actively seeking full-time positions in RTL, ASIC Physical design and Verification.
Sobre
Electrical Engineering graduate student specialized in CMOS technologies and Digital Circuit Design at Arizona State University. Actively seeking full-time positions in RTL, Physical Design and verification positions.
As part of course curriculum, worked on
- Digital ASIC design using Cadence and Synopsis design Flow tools.
- Microprocessor desgin, Cache replacement policies in Compuer Architecture. Knowledge on gem5 and CMPSim.
- Custom ASIC Design for 32 x 32 Register File on 7nm PDK (Layout Design, Optimization, DRC,
LVS using Calibre and Timing Analysis using Hspice.
- Design and Optimization of Standard SRAM cell for minimum Data retention Voltage using AS...