2. Syllabus
• Instruction format, op-codes, mnemonics,
no. of bytes computation of the instruction,
Machine cycles and T states and
Execution time computation of an
instruction.
• Classification of instruction with their
examples.
• Writing of assembly Language programs.
4. • The 8085 is an 8-bit general purpose microprocessor
that can address 64K Byte of memory.
• It has 40 pins and uses +5V for power. It can run at a
maximum frequency of 3 MHz.
– The pins on the chip can be grouped into 6 groups:
• Address Bus.
• Data Bus.
• Control and Status Signals.
• Power supply and frequency.
• Externally Initiated Signals.
• Serial I/O ports.
Pin Diagram
5. • Higher Order Address pins- A15 – A8
– The address bus has 8 signal lines A8 – A15 which are
unidirectional.
• Lower Order Address/ Data Pins- AD7-AD0
– These are time multiplexed pins and are de-multiplexed using
the pin ALE
– So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and
D0 – D7 at the same time.
• During the execution of the instruction, these lines carry the
address bits during the early part, then during the late parts
of the execution, they carry the 8 data bits.
– In order to separate the address from the data, we can use a
latch to save the value before the function of the bits changes.
Pin Diagram
6. • Control Pins – RD, WR
– These are active low Read & Write pins
• Status Pins – ALE, IO/M (active low), S1, S0
– ALE (Address Latch Enable)-Used to de-multiplex AD7-AD0
– IO/M – Used to select I/O or Memory operation
– S1,S0 – Denote the status of data on data bus
• Interrupt Pins – TRAP, RST7.5, RST 6.5, RST 5.5, INTR,
INTA
– These are hardware interrupts used to initiate an interrupt
service routine stored at predefined locations of the system
memory.
• Serial I/O pins – SID (Serial Input Data), SOD (Serial Output
Data)
– These pins are used to interface 8085 with a serial device.
Pin Diagram
7. • Clock Pins- X1, X2, CLK(OUT)
– X1, X2– These are clock input pins. A crystal is connected
between these pins such that fcrystal= 2f8085 where fcrystal=
crystal frequency & f8085 = operating frequency of 8085
– CLK(OUT) – This is an auxiliary clock output source
• Reset Pins – Reset In (active low), Reset Out
– Reset In is used to reset 8085 whereas Reset Out can be
used to reset other devices in the system
• DMA (Direct Memory Access) pins – HOLD, HLDA
– These pins are used when data transfer is to be performed
directly between an external device and the main memory
of the system.
• Power Supply Pins – +VCC, VSS
Pin Diagram
9. Internal architecture
• The architecture of 8085 microprocessor mainly
includes the Timing & Control Unit, Arithmetic
and Logic Unit, Decoder, Instruction Register,
Interrupt Control, a Register Array, Serial Input /
Output control.
• The most important part of the microprocessor is
the central processing unit.
• Internal Registers: The two temporary internal
registers, W and Z, hold 8-bit data during the
execution of a few arithmetic and logical
instructions, as well as the CALL and XCHG
instructions.
10. • Arithmetic Logic Unit (ALU): Arithmetic logic
unit carries out bitwise arithmetic operations
such as addition, subtraction. It also carries out
the logical operations like AND, OR rotate and
much more.
• Timing and Control Unit: The control unit is
obliged for all operations and the operations
occur at the same time with the help of clock
signal.
Internal architecture
11. Internal architecture
• General Purpose Registers: The eight-bit
general purpose registers are B, C, D, E, H, L
and these can be used as single eight-bit
registers and in pairs as 16-bit registers like BC,
DE etc., these are also called as scratch pad
registers.
• Program Status Word: The group of five flip-
flops which deed as status flags and in INTEL
8085 the five status flags are: Carry (CS), Zero
(Z), Sign (S), Parity (P), and Auxillary Carry (AC)
and along with these there are three undefined
bits which together called as program status
word.
12. Internal architecture
• Program Counter: Program is a collection of
instructions and microprocessor searches these
instructions from memory. Well, a program counter is a
unique register which saves the address of next
instruction to be searched.
• Stack Pointer: Stack is a reticent part of the memory in
RAM where temporary data can be saved.
• Instruction Register and Decoder: The processor
foremost searches the op-code instruction from the
memory and it is stored in a register called instruction
register. The stored instruction is sent to the instruction
decoder where it is decoded and according to it, the
timing and control signals are generated.
13. Internal architecture
• Interrupt Control: Normally the processor
executes the operations in an order but
sometimes it need to automatically execute a
collection. After such execution, the program
counter needs to come back in the normal
condition and the occurrence of such special
condition is called interrupt.
• Serial I/O Control: This provides two signals
namely SID and SOD which are used to receive
and transmit the information serially.
14. • Address and Data Bus: 8085 microprocessor’s
data bus is eight bit long and eight bits of
information can be transmitted over it. In a case
of 16 bits of information, the most important bits
of an address are sent through (A8 TO A15) and
the remaining bits are sent through AD0 to AD7.
• Increment or Decrement Register: The ‘8-bit
register contents’ or a ‘memory position’ can be
increased or decreased by one. The 16-bit
register is useful for incrementing/decrementing
the PC or the SP registers’ content by one.
Internal architecture
15. Instruction Format
• An instruction is a command to the
microprocessor to perform a given task on a
specified data.
• Each instruction has two parts: one is task to be
performed, called the operation code (opcode),
and the second is the data to be operated on,
called the operand. Mnemonics is combination
of Opcode and operand
• The operand (or data) can be specified in
various ways. It may include 8-bit (or 16-bit )
data, an internal register, a memory location, or
8-bit (or 16-bit) address. In some instructions,
the operand is implicit.
16. Instruction word size
• The 8085 instruction set is classified into the
following three groups according to word size: 1.
One-word or 1-byte instructions 2. Two-word or
2-byte instructions 3. Three-word or 3-byte
instructions.
• In the 8085, "byte" and "word" are synonymous
because it is an 8-bit microprocessor.
• However, instructions are commonly referred to
in terms of bytes rather than words.
17. One-Byte Instructions
• A 1-byte instruction includes the op-code and
operand in the same byte.
• Operand(s) are internal register and are coded
into the instruction.
Example:
Task Opcode Operand Binary
Code
Hex.
Code
Copy the contents of the accumulator in
the register C.
MOV C, A 0100
1111
4FH
Add the contents of register B to the
contents of the accumulator
ADD B 1000
0000
80H
Invert (compliment) each bit in the
accumulator.
CMA 0010
1111
2FH
18. • These instructions are 1-byte instructions performing
three different tasks.
• In the first instruction, both operand registers are
specified.
• In the second instruction, the operand B is specified
and the accumulator is assumed.
• Similarly, in the third instruction, the accumulator is
assumed to be the implicit operand.
• These instructions are stored in 8- bit binary format
in memory; each requires one memory location
One-Byte Instructions
19. Two-Byte Instructions
• In a two-byte instruction, the first byte
specifies the operation code and the
second byte specifies the operand.
• Source operand is a data byte immediately
following the opcode. For example:
Task Opcode Operand Binary
Code
Hex
Code
Load an 8-bit data byte
in the accumulator
MVI A,
Data
0011
1110
Data
3E
Data
First Byte
Second
Byte
20. • In a 3-byte instruction, the first byte specifies the
opcode, and the following two bytes specify the
16-bit address.
• Note that the second byte is the low-order
address and the third byte is the high-order
address.
Three - Byte Instructions
Task Opcode Operand Binary Code Hex
Code
Transfer the
Program
sequence to the
memory location
2085H
JMP 2085H
1100 0011
1000 0101
0010 0000
C3
85
20
First Byte
Second Byte
Third Byte
21. TIMING DIAGRAM
• Timing Diagram is a graphical representation. It
represents the execution time taken by each
instruction in a graphical format.
• The execution time is represented in T-states.
Instruction Cycle: The time required to execute
an instruction is called instruction cycle.
• 8085 instruction cycle consist of 1 to 6 machine
cycle ( or operations).
23. TIMING DIAGRAM
Machine Cycle:
• The time required to complete one operation of
accessing memory, input/output devices or
acknowledging an external request is called machine
cycle.
• It consist of 3 to 6 T-states.
• The 8085 microprocessor has 5 (seven) basic machine
cycles. They are
Op-code Fetch Cycle (4T)
Memory Read Cycle (3 T)
Memory Write Cycle (3 T)
I/O Read Cycle (3 T)
I/O Write Cycle (3 T)
24. T-State ( or Clock Period):
• The machine cycle and instruction cycle takes
multiple clock periods.
• A portion of an operation carried out in one
system clock period is called as T-state.
• These subdivision are internal states
synchronized by system clock.
TIMING DIAGRAM
25. Classification of instruction with their examples
• An Instruction is a command given to the
computer to perform a specified operation on
given data.
• The instruction set of a microprocessor is the
collection of the instructions that the
microprocessor is designed to execute
26. • DATA TRANSFER (COPY) OPERATIONS:
This group of instructions copies data from a
location, called a destination without modifying the
contents of the source.
The various types of data transfer (copy) are listed
below.
Classification of instruction with their examples
27. Type Examples Comment
Between Registers MOV D,B Copy the contents of
Register B into
Register D
Specific Data Byte to
a Register or a
Memory Location
MVI B,32 Load Register B with
the Data Byte 32H
Between a Memory
Location and a
Register
MOV B,M From the Memory
Location M to Register
B
Between an I/O
Device and an
Accumulator
IN PORT #? From an Input
Keyboard to the
Accumulator
Classification of instruction with their examples
28. 1. MOV r1, r2 (Move Data; Move the content of the one
register to another). [r1] <-- [r2]
2. MOV r, m (Move the content of memory register). r <--
[M]
3. MOV M, r. (Move the content of register to memory). M
<-- [r]
4. MVI r, data. (Move immediate data to register). [r] <--
data.
5. MVI M, data. (Move immediate data to memory). M <--
data.
6. LXI rp, data 16. (Load register pair immediate). [rp] <--
data 16 bits, [rh] <-- 8 LSBs of data.
Data TRANSFER GROUP of instructions
30. ARITHMETIC OPERATIONS GROUP OF
INSTRUCTIONS
These Instructions perform Arithmetic Operations such as Addition
Subtraction, Increment and Decrement
Addition:- Any 8 –bit number, or the contents of a register, or the
contents of a memory location can be added to the contents of the
accumulator and the sum is stored in the accumulator. No two other
8-bit registers can be added directly. The Instruction DAD is an
exception; it adds 16-bit data directly in register pairs.
Subtraction:- Any 8 –bit number, or the contents of a register, or
the contents of a memory location can be subtracted from the
contents of the Accumulator and the result is stored in the
accumulator. The subtraction is performed in 2’s Complement, and
the result if negative are expressed in 2’s Complement. No two other
registers can be subtracted directly.
31. • Increment/Decrement:- The 8-bit contents of a
register or a memory location can be
incremented or decremented by 1. Similarly, the
16-bit contents of a register pair (such as BC)
can be incremented or decremented by 1. These
increment and decrement operations differ from
addition and subtraction in an important way;
i.e., they can be performed in any one of the
registers or in a memory locations.
ARITHMETIC OPERATIONS GROUP OF
INSTRUCTIONS
32. 1. ADD r. (Add register to accumulator) [A] <-- [A] + [r].
2. 2. ADD M. (Add memory to accumulator) [A] <-- [A] +
[[H-L]].
3. 3. ADC r. (Add register with carry to accumulator). [A] <-
- [A] + [r] + [CS].
4. ADC M. (Add memory with carry to accumulator) [A] <--
[A] + [[H-L]] [CS].
5. ADI data (Add immediate data to accumulator) [A] <-- [A]
+ data.
6. ACI data (Add with carry immediate data to
accumulator). [A] <-- [A] + data + [CS].
7. DAD rp. (Add register paid to H-L pair). [H-L] <-- [H-L] +
[rp].
ARITHMETIC OPERATIONS GROUP OF
INSTRUCTIONS
33. 8. SUB r. (Subtract register from accumulator). [A] <-- [A] –
[r].
9. SUB M. (Subtract memory from accumulator). [A] <-- [A]
– [[H-L]].
10. SBB r. (Subtract register from accumulator with
borrow). [A] <-- [A] – [r] – [CS].
11. SBB M. (Subtract memory from accumulator with
borrow). [A] <-- [A] – [[H-L]] – [CS].
12. SUI data. (Subtract immediate data from accumulator)
[A] <-- [A] – data.
13. SBI data. (Subtract immediate data from accumulator
with borrow). [A] <- - [A] – data – [CS].
ARITHMETIC OPERATIONS GROUP OF
INSTRUCTIONS
35. • The instruction DAA is used in the program after ADD, ADI, ACI,
ADC, etc instructions.
• After the execution of ADD, ADC, etc instructions the result is in
hexadecimal and it is placed in the accumulator.
• The DAA instruction operates on this result and gives the final result
in the decimal system.
• It uses carry and auxiliary carry for decimal adjustment. 6 is added
to 4 LSBs of the content of the accumulator if their value lies in
between A and F or the AC flag is set to 1.
• Similarly, 6 is also added to 4 MSBs of the content of the
accumulator if their value lies in between A and F or the CS flag is
set to 1. All status flags are affected.
• When DAA is used data should be in decimal numbers.
ARITHMETIC OPERATIONS GROUP OF
INSTRUCTIONS
36. • These Instructions perform various logical operations
with the contents of the accumulator.
• AND, OR, Exclusive-OR:- Any 8-bit number, or the
contents of a Register, or a Memory Location can be
logically ANDed, ORed, or Exclusive-ORed with the
contents of the Accumulator. The results are stored in
the Accumulator.
• Rotate:- Each bit in the Accumulator can be shifted
either left or right to the next position.
• Compare:- Any 8-bit number, or the contents of a
register, or a memory location can be compared for
equality , greater than, or less than, with the contents of
the Accumulator
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
37. • Complement:- The contents of the Accumulator can be
Complemented; all 0’s are replaced by 1’s and all 1’s are
replaced by 0’s.
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
38. 1. ANA r. (AND register with accumulator) [A] <-- [A] ^ [r].
2. 2. ANA M. (AND memory with accumulator). [A] <-- [A] ^
[[H-L]].
3. 3. ANI data. (AND immediate data with accumulator)
[A] <-- [A] ^ data.
4. ORA r. (OR register with accumulator) [A] <-- [A] v [r].
5. ORA M. (OR memory with accumulator) [A] <-- [A] v [[
H-L]]
6. ORI data. (OR immediate data with accumulator) [A] <--
[A] v data
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
39. 7. XRA r. (EXCLUSIVE – OR register with
accumulator) [A] <-- [A] v [r]
8. XRA M. (EXCLUSIVE-OR memory with
accumulator) [A] <-- [A] v [[H-L]]
9. XRI data. (EXCLUSIVE-OR immediate data with
accumulator) [A] <-- [A]
10. CMA. (Complement the accumulator) [A] <--
[A]
11. CMC. (Complement the carry status) [CS] <--
[CS]
12. STC. (Set carry status) [CS] <-- 1.
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
40. 13. CMP r. (Compare register with accumulator)
[A] – [r]
14. CMP M. (Compare memory with accumulator)
[A] – [[H-L]]
15. CPI data. (Compare immediate data with
accumulator) [A] – data.
The 2nd byte of the instruction is data, and it is
subtracted from the content of the accumulator.
The status flags are set according to the result of
subtraction. But the result is discarded. The
content of the accumulator remains unchanged.
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
41. 16. RLC (Rotate accumulator left) [An+1] <-- [An],
[A0] <-- [A7], [CS] <-- [A7].
The content of the accumulator is rotated left by one bit.
The seventh bit of the accumulator is moved to carry bit
as well as to the zero bit of the accumulator.
Only CS flag is affected.
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
42. 17. RRC. (Rotate accumulator right) [A7] <-- [A0],
[CS] <-- [A0], [An] <-- [An+1].
The content of the accumulator is rotated right
by one bit.
The zero bit of the accumulator is moved to the
seventh bit as well as to carry bit.
Only CS flag is affected.
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
43. 18. RAL. (Rotate accumulator left through carry)
[An+1] <-- [An], [CS] <-- [A7], [A0] <-- [CS].
19. RAR. (Rotate accumulator right through carry)
[An] <-- [An+1], [CS] <-- [A0], [A7] <-- [CS]
LOGICAL OPERATION GROUP OF
INSTRUCTIONS
44. • This group of Instructions alters the sequence of
program execution either conditionally or
unconditionally.
• Jump:- Conditional Jumps are an important
aspect of the decision-making process in
programming. These Instructions test for a
certain condition(e.g. Zero or Carry Flag) and
alter the program sequence when the condition
is met . In addition, the Instruction Set Includes
an instruction called unconditional Jump.
branching OPERATIONs GROUP OF
INSTRUCTIONS
45. • Call, Return, and Restart:- These Instructions
change the sequence of a Program either by
Calling a Sub-Routine or returning from a Sub-
Routine. The Conditional Call and Return
Instructions also can test Conditional Flags
branching OPERATIONs GROUP OF
INSTRUCTIONS
46. 1. JMP addr (label). (Unconditional jump: Jump to the
instruction specified by the address). [PC] <-- Label.
2. Conditional Jump addr (label): After the execution of
the conditional jump instruction the program jumps to the
instruction specified by the address (label) if the specified
condition is fulfilled.
The program proceeds further in the normal sequence if
the specified condition is not fulfilled.
If the condition is true and program jumps to the
specified label, the execution of a conditional jump takes
3 machine cycles: 10 states.
If the condition is not true, only 2 machine cycles; 7
states are required for the execution of the instruction
branching OPERATIONs GROUP OF
INSTRUCTIONS
47. 1. JZ addr (label). (Jump if the result is zero)
2. JNZ addr (label) (Jump if the result is not zero)
3. JC addr (label). (Jump if there is a carry)
4. JNC addr (label). (Jump if there is no carry)
5. JP addr (label). (Jump if the result is plus)
6. JM addr (label). (Jump if the result is minus)
7. JPE addr (label) (Jump if even parity)
8. JPO addr (label) (Jump if odd parity)
branching OPERATIONs GROUP OF
INSTRUCTIONS
48. 3. CALL addr (label) (Unconditional CALL: call the
subroutine identified by the operand).
CALL instruction is used to call a subroutine.
Before the control is transferred to the subroutine,
the address of the next instruction of the main
program is saved in the stack.
The content of the stack pointer is decremented by
two to indicate the new stack top.
Then the program jumps to subroutine starting at
address specified by the label.
branching OPERATIONs GROUP OF
INSTRUCTIONS
49. 4. RET:- (Return from subroutine)
5. RST n (Restart):- Restart is a one-word CALL
Instruction.
The content of the program counter is saved in
the stack.
The program jumps to the instruction starting at
restart location.
branching OPERATIONs GROUP OF
INSTRUCTIONS
50. • These Instructions control Machine Functions
such as Halt, Interrupt or do nothing.
1. IN port-address. (Input to accumulator from I/O
port) [A] <-- [Port]
2. OUT port-address (Output from accumulator to
I/O port) [Port] <-- [A]
3. PUSH rp (Push the content of register pair to
stack)
4. PUSH PSW (PUSH Processor Status Word)
5. POP rp (Pop the content of register pair, which
was saved, from the stack)
Stack, i/o and machine control OPERATIONs
GROUP OF INSTRUCTIONS
51. 7. HLT (Halt)
8. XTHL (Exchange stack-top with H-L)
9. SPHL (Move the contents of H-L pair to stack
pointer)
10. EI (Enable Interrupts)
11. DI (Disable Interrupts)
12. SIM (Set Interrupt Masks)
13. RIM (Read Interrupt Masks)
14. NOP (No Operation)
Stack, i/o and machine control OPERATIONs
GROUP OF INSTRUCTIONS
52. Writing of assembly Language programs.
(1) To perform addition of two 8 bit numbers using 8085
ALGORITHM
1) Start the program by loading the first data into Accumulator.
2) Move the data to a register (B register).
3) Get the second data and load into Accumulator.
4) Add the two register contents.
5) Check for carry.
6) Store the value of sum and carry in memory location.
7) Terminate the program.
53. Alp(Assembly Language Program) to perform
Addition of two 8-bit Numbers
Label Opcode Operand Comments
MVI C, 00 Initialize C register
to 00
LDA 4150 Load the Value to
Accumulator
MOV B,A Move the content of
Accumulator to B
Register
LDA 4151 Load the value to
Accumulator
ADD B Add the value of
register B to A
JNC LOOP Jump on no carry
INR C Increment value of
register C
LOOP: STA 4152 Store the value of
Accumulator (SUM).
54. Label Opcode Operand Comments
MOV A,C
Move the content
of register C to
Accumulator
STA 4153
Store the value of
Accumulator
(CARRY)
HLT Halt the program
Alp(Assembly Language Program) to perform
Addition of two 8-bit Numbers