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It is the mark of an educated mind to be able to entertain
a thought without accepting it.
Aristotle
What is computer?
 an electronic device for storing and processing data,
typically in binary form, according to instructions given to it in
variable program.
Computer
 because computers are controlled by programs written for
them, this makes them very versatile because their operation
can be changed simply by changing the program.
PROGRAM – is a set of INSTRUCTIONS that cause a
computer to perform a given task.
*each instruction affect the memory and the accumulator ,
a register with in a control unit that contains that basic
operand used in each instruction.
WHAT IS AN INSTRUCTION SET?
• The complete collection of instructions that are
understood by a CPU
• Machine language: binary representation of operations
and (addresses of) arguments
• Assembly language: mnemonic representation for
humans, e.g.,
OP A,B,C (meaning A <- OP(B,C))
COMPUTER INSTRUCTION
An instruction consist of two parts , Op code and
address.
OP CODE – tells the computer what to do if
encounters an instruction.
ADDRESS – is the memory location involved
 The total number of instructions and the types
and formats of the operands determine the
length of an instruction.
Instruction Symbol Explanation
LOAD (M) (A)
The contents of memory
(at the address specified in
the instruction) are written
to the accumulator.
STORE (A) (M)
The contents of the
accumulator are written in
the memory.
ADD (A) + (M) (A)
The contents of memory
are added to the
accumulator. The results go
to the accumulator.
SUB (A) – (M) (A)
The contents of memory
are subtracted to the
accumulator. The results go
to the accumulator.
SOME COMMON INSTRUCTION
ELEMENTS OF AN INSTRUCTION
 Operation code (op code)
Do this: ADD, SUB, MPY, DIV, LOAD,
STOR
 Source operand reference
To this: (address of) argument of op, e.g.
register, memory location
 Result operand reference
Put the result here (as above)
 Next instruction reference (often implicit)
When you have done that, do this: BR
COMPUTER INSTRUCTION
SET
• The shorter the instruction, the faster the time that it
can be fetched and decoded.
• Shorter instructions are better than longer ones:
(i) take up less space in memory
(ii) transferred to the CPU faster
• A machine with 2^N instructions must require at least
N-bit to encode all the op-codes.
INSTRUCTION CYCLE STATE
DIAGRAM
OP-CODE ENCODING
 1. Block-code technique
 To each of the 2K
instructions a unique binary
bit pattern of length K is assigned.
 An K-to-2K
decoder can then be used to decode
all the instructions. For example,
3-to-8
decoder3-bit Op-code
instruction 0
instruction 1
instruction 2
instruction 3
instruction 4
instruction 5
instruction 6
instruction 7
OP-CODE ENCODING
 2. Expanding op-code technique
 Consider an 4+12 bit instruction with a 4-bit op-code and three 4-
bit addresses.
 It can at most encode 16 three-address instructions.
 If there are only 15 such three-address instructions, then one of the
unused op-code can be used to expand to two-address, one-address
or zero address instructions
 Again, this expanded op-code can encode at most 16 two-address
instructions. And if there are less than 16 such instructions, we can
expand the op-code further.
Op-code Address 1 Address 2 Address 3
1 1 1 1 Op-code Address 1 Address 2
1 1 1 1 1 1 1 1 Op-code Address 1
1 1 1 1 1 1 1 1 1 1 1 1 Op-code
OPCODE ENCODING
 Note that the three address fields may not
necessarily be used to encode a three-address
operand; they can be used as a single 12-bit one-
address operand.
 Can have some part of the op-code to specify the
instruction format and/or length.
 if there are few two-address instructions, we may
attempt to make them shorter instead and to use the
first two bits to indicate the instruction length, e.g.,
10 means two-address and 11 means three address.
OP-CODE ENCODING
 Huffman encoding
 Given the probability of occurrences of each instruction,
it is possible to encode all the instructions with minimal
number of bits, and with the following property:
Fewer bits are used for most frequently used instructions
and more for the least frequently used ones.
1
1/4
1/2
1/8 1/8 1/4 1/2
1/16 1/16 1/16 1/16 1/8 1/8 1/4 1/4
LOADSTOSHIFT NOTJUMPHALT AND ADD
1
10
0
1
0
101010
10
11100110100011001000010000
OPCODE ENCODING,
HUFFMAN CODES
 Huffman encoding algorithm:
 1. Initialize the leaf nodes each with a probability of an
instruction. All nodes are unmarked.
 2. Find the two unmarked nodes with the smallest values
and mark them. Add a new unmarked node with a value
equal to the sum of the chosen two.
 3. Repeat step (2) until all nodes have been marked except
the last one, which has a value of 1.
 4. The encoding for each instruction is found by tracing the
path from the unmarked node (the root) to that instruction.
 may mark branches arbitrarily with 0, 1
OPCODE ENCODING,
HUFFMAN CODES
• Advantage:
– minimal number of bits
• Disadvantage:
– must decode instructions bit-by-bit, (can be slow).
– to decode, must have a logical representation of the encoded
tree, and follow branches as you decipher bits
– Fact is, most decoding is done in parallel
– Gives a speed advantage
ADDRESSING MODES
Immediate
Direct
Indirect
Register
Displacement (Indexed)
Stack
IMMEDIATE ADDRESSING
Operand is part of instruction
Operand = address field
e.g., ADD #5
Add 5 to contents of accumulator
5 is operand
No memory reference to fetch data
Fast
Limited range
DIRECT ADDRESSING
 Address field contains address of operand
 Effective address (EA) = address field (A)
 e.g., ADD A
Add contents of cell A to accumulator
Look in memory at address A for
operand
 Single memory reference to access data
 No additional calculations needed to work
out effective address
 Limited address space (length of address
field)
DIRECT ADDRESSING DIAGRAM
Address AOpcode
Instruction
Memory
Operand
INDIRECT ADDRESSING
Memory cell pointed to by address
field contains the address of the
operand
EA = (A)
Look in A, find effective address and
look there for operand
E.g. ADD (A)
Add content of cell pointed to by content
of A to accumulator
INDIRECT ADDRESSING DIAGRAM
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
REGISTER ADDRESSING
Operand is held in register
named in address field
EA = R
Limited number of registers
Very small address field needed
Shorter instructions
Faster fetch
DISPLACEMENT
ADDRESSING
EA = A + (R)
Address field holds two values
A = base value
R = register that holds
displacement
or vice versa
See segmentation
STACK ADDRESSING
Operand is (implicitly) on top
of stack
e.g.
ADDPop top two items from
stack and add and push result
on top
ADDRESSING MODES
 inherent
 an op-code indicates the address of its operand
CLI ; clear the interrupt flag
 immediate
 an instruction contains or immediately precedes its
operand value
ADD #250, R1 % R1 := R1 + 250;
 Absolute/Direct
 an instruction contains the memory address of its
operand
ADD 250, R1 % R1 := R1 + *(250);
 register
 an instruction contains the register address of its
ADDRESSING MODES
 register indirect
 the register address in an instruction specifies the
address of its operand
ADD @R2, @R1 % *R1 := *R1 + *R2;
 auto-decrement or auto-increment
 The contents of the register is automatically
decremented or incremented before or after the
execution of the instruction
MOV (R2)+, R1 % R1 := *(R2); R2 := R2 + k;
MOV -(R2), R1 % R2 := R2 - k; R1 := *(R2);
ADDRESSING MODES
 indexed
 an offset is added to a register to give the address of the
operand
MOV 2(R2), R1 % R1 := R2[2];
 base-register
 a displacement is added to an implicit or explicit base
register to give the address of the operand
 relative
 same as base-register mode except that the instruction
pointer is used as the base register
ADDRESSING MODES
 Indirect addressing mode in general also applies to
absolute addresses, not just register addresses; the
absolute address is a pointer to the operand.
 The offset added to an index register may be as
large as the entire address space. On the other
hand, the displacement added to a base register is
generally much smaller than the entire address
space.
 The automatic modification (i.e., auto-increment or
auto-decrement) to an index register is called
autoindexing.
 Relative addresses have the advantage that the
code is position-independent.
INSTRUCTION TYPES
 Instructions, of most modern computers, may be
classified into the following six groups:
 Data transfer (40% of user program instructions)
MOV, LOAD
 Arithmetic
ADD, SUB, DIV, MUL
 Logical
AND, OR, NOT, SHIFT, ROTATE
 System-control
Test-And-Set
 I/O
Separate I/O space input/output

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Compreport

  • 1. It is the mark of an educated mind to be able to entertain a thought without accepting it. Aristotle
  • 3.  an electronic device for storing and processing data, typically in binary form, according to instructions given to it in variable program. Computer  because computers are controlled by programs written for them, this makes them very versatile because their operation can be changed simply by changing the program. PROGRAM – is a set of INSTRUCTIONS that cause a computer to perform a given task. *each instruction affect the memory and the accumulator , a register with in a control unit that contains that basic operand used in each instruction.
  • 4. WHAT IS AN INSTRUCTION SET? • The complete collection of instructions that are understood by a CPU • Machine language: binary representation of operations and (addresses of) arguments • Assembly language: mnemonic representation for humans, e.g., OP A,B,C (meaning A <- OP(B,C))
  • 5. COMPUTER INSTRUCTION An instruction consist of two parts , Op code and address. OP CODE – tells the computer what to do if encounters an instruction. ADDRESS – is the memory location involved  The total number of instructions and the types and formats of the operands determine the length of an instruction.
  • 6. Instruction Symbol Explanation LOAD (M) (A) The contents of memory (at the address specified in the instruction) are written to the accumulator. STORE (A) (M) The contents of the accumulator are written in the memory. ADD (A) + (M) (A) The contents of memory are added to the accumulator. The results go to the accumulator. SUB (A) – (M) (A) The contents of memory are subtracted to the accumulator. The results go to the accumulator. SOME COMMON INSTRUCTION
  • 7. ELEMENTS OF AN INSTRUCTION  Operation code (op code) Do this: ADD, SUB, MPY, DIV, LOAD, STOR  Source operand reference To this: (address of) argument of op, e.g. register, memory location  Result operand reference Put the result here (as above)  Next instruction reference (often implicit) When you have done that, do this: BR
  • 8. COMPUTER INSTRUCTION SET • The shorter the instruction, the faster the time that it can be fetched and decoded. • Shorter instructions are better than longer ones: (i) take up less space in memory (ii) transferred to the CPU faster • A machine with 2^N instructions must require at least N-bit to encode all the op-codes.
  • 10. OP-CODE ENCODING  1. Block-code technique  To each of the 2K instructions a unique binary bit pattern of length K is assigned.  An K-to-2K decoder can then be used to decode all the instructions. For example, 3-to-8 decoder3-bit Op-code instruction 0 instruction 1 instruction 2 instruction 3 instruction 4 instruction 5 instruction 6 instruction 7
  • 11. OP-CODE ENCODING  2. Expanding op-code technique  Consider an 4+12 bit instruction with a 4-bit op-code and three 4- bit addresses.  It can at most encode 16 three-address instructions.  If there are only 15 such three-address instructions, then one of the unused op-code can be used to expand to two-address, one-address or zero address instructions  Again, this expanded op-code can encode at most 16 two-address instructions. And if there are less than 16 such instructions, we can expand the op-code further. Op-code Address 1 Address 2 Address 3 1 1 1 1 Op-code Address 1 Address 2 1 1 1 1 1 1 1 1 Op-code Address 1 1 1 1 1 1 1 1 1 1 1 1 1 Op-code
  • 12. OPCODE ENCODING  Note that the three address fields may not necessarily be used to encode a three-address operand; they can be used as a single 12-bit one- address operand.  Can have some part of the op-code to specify the instruction format and/or length.  if there are few two-address instructions, we may attempt to make them shorter instead and to use the first two bits to indicate the instruction length, e.g., 10 means two-address and 11 means three address.
  • 13. OP-CODE ENCODING  Huffman encoding  Given the probability of occurrences of each instruction, it is possible to encode all the instructions with minimal number of bits, and with the following property: Fewer bits are used for most frequently used instructions and more for the least frequently used ones. 1 1/4 1/2 1/8 1/8 1/4 1/2 1/16 1/16 1/16 1/16 1/8 1/8 1/4 1/4 LOADSTOSHIFT NOTJUMPHALT AND ADD 1 10 0 1 0 101010 10 11100110100011001000010000
  • 14. OPCODE ENCODING, HUFFMAN CODES  Huffman encoding algorithm:  1. Initialize the leaf nodes each with a probability of an instruction. All nodes are unmarked.  2. Find the two unmarked nodes with the smallest values and mark them. Add a new unmarked node with a value equal to the sum of the chosen two.  3. Repeat step (2) until all nodes have been marked except the last one, which has a value of 1.  4. The encoding for each instruction is found by tracing the path from the unmarked node (the root) to that instruction.  may mark branches arbitrarily with 0, 1
  • 15. OPCODE ENCODING, HUFFMAN CODES • Advantage: – minimal number of bits • Disadvantage: – must decode instructions bit-by-bit, (can be slow). – to decode, must have a logical representation of the encoded tree, and follow branches as you decipher bits – Fact is, most decoding is done in parallel – Gives a speed advantage
  • 17. IMMEDIATE ADDRESSING Operand is part of instruction Operand = address field e.g., ADD #5 Add 5 to contents of accumulator 5 is operand No memory reference to fetch data Fast Limited range
  • 18. DIRECT ADDRESSING  Address field contains address of operand  Effective address (EA) = address field (A)  e.g., ADD A Add contents of cell A to accumulator Look in memory at address A for operand  Single memory reference to access data  No additional calculations needed to work out effective address  Limited address space (length of address field)
  • 19. DIRECT ADDRESSING DIAGRAM Address AOpcode Instruction Memory Operand
  • 20. INDIRECT ADDRESSING Memory cell pointed to by address field contains the address of the operand EA = (A) Look in A, find effective address and look there for operand E.g. ADD (A) Add content of cell pointed to by content of A to accumulator
  • 21. INDIRECT ADDRESSING DIAGRAM Address AOpcode Instruction Memory Operand Pointer to operand
  • 22. REGISTER ADDRESSING Operand is held in register named in address field EA = R Limited number of registers Very small address field needed Shorter instructions Faster fetch
  • 23. DISPLACEMENT ADDRESSING EA = A + (R) Address field holds two values A = base value R = register that holds displacement or vice versa See segmentation
  • 24. STACK ADDRESSING Operand is (implicitly) on top of stack e.g. ADDPop top two items from stack and add and push result on top
  • 25. ADDRESSING MODES  inherent  an op-code indicates the address of its operand CLI ; clear the interrupt flag  immediate  an instruction contains or immediately precedes its operand value ADD #250, R1 % R1 := R1 + 250;  Absolute/Direct  an instruction contains the memory address of its operand ADD 250, R1 % R1 := R1 + *(250);  register  an instruction contains the register address of its
  • 26. ADDRESSING MODES  register indirect  the register address in an instruction specifies the address of its operand ADD @R2, @R1 % *R1 := *R1 + *R2;  auto-decrement or auto-increment  The contents of the register is automatically decremented or incremented before or after the execution of the instruction MOV (R2)+, R1 % R1 := *(R2); R2 := R2 + k; MOV -(R2), R1 % R2 := R2 - k; R1 := *(R2);
  • 27. ADDRESSING MODES  indexed  an offset is added to a register to give the address of the operand MOV 2(R2), R1 % R1 := R2[2];  base-register  a displacement is added to an implicit or explicit base register to give the address of the operand  relative  same as base-register mode except that the instruction pointer is used as the base register
  • 28. ADDRESSING MODES  Indirect addressing mode in general also applies to absolute addresses, not just register addresses; the absolute address is a pointer to the operand.  The offset added to an index register may be as large as the entire address space. On the other hand, the displacement added to a base register is generally much smaller than the entire address space.  The automatic modification (i.e., auto-increment or auto-decrement) to an index register is called autoindexing.  Relative addresses have the advantage that the code is position-independent.
  • 29. INSTRUCTION TYPES  Instructions, of most modern computers, may be classified into the following six groups:  Data transfer (40% of user program instructions) MOV, LOAD  Arithmetic ADD, SUB, DIV, MUL  Logical AND, OR, NOT, SHIFT, ROTATE  System-control Test-And-Set  I/O Separate I/O space input/output