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Intel proccessor manufacturing

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Intel proccessor manufacturing

  1. 1. Processing Chip
  2. 2. Topics will be covered  What is a Processor ?  How a Processor works ?  Why is a Processor needed ?  intel Processor & it’s history  intel Processor Generations  Making of a CHIP  intel Processor market growth
  3. 3. What is a processor ??  A processor or "microprocessor”, is a small chip that resides in computers and other electronic devices.  Its basic job is to receive input and provide the appropriate output.  While this may seem like a simple task, modern processors can handle trillions of calculations per second.  The central processor of a computer is also known as the CPU, or "central processing unit”.  This processor handles all the basic system instructions, such as processing mouse and keyboard input and running applications.
  4. 4. How a Processor works ?? The Processor Chip is the “brain” of every electronics devices known today. The processor chip's primary function is as an integrated circuit, translating electrical currents into usable forms. The discovery of the first processor chip in 1971 initiated a whole new direction for the field of electronic technology. The most amazing feature of processing chips is how small they are. The side of a chip can be up to 1 inch long, but the chip itself can contain thousands of components.
  5. 5. Why is a processor needed ??  Computers, TVs, radios, satellites, watches and calculators are just a few of the things that processor chips have brought into our everyday lives.  A processor is the thinking mechanism of the computer. While a Hard Drive/Disk holds the data of a computer, the processor is what 'thinks' and determines how to run whatever files are on your computer, as well as keeps them updated.  Basically, if you have no processor, your computer will sit with a load of data and take no commands, do no thinking or display information.  In simpler words it is the heart of the Computer without it you can't do anything.
  6. 6. integrated electronics corporation
  7. 7. History of Intel  At its founding on July 18, 1968, Intel had carved out a unique challenge: to make semiconductor memory practical.  The 4004 microcomputer set (the term "microprocessor" was not coined until later) was formally introduced at the end of 1971.  Moore's law is the observation that, over the history of computing hardware, the number of transistors on integrated circuits doubles approximately every two years. The period often quoted as "18 months" is due to Intel executive David House, who predicted that period for a doubling in chip performance (being a combination of the effect of more transistors and their being faster).
  8. 8. Intel's First Microprocessor
  9. 9. 2 1972 Intel® 8008 processor Initial clock speed: 800KHz Transistors: 3,500 Manufacturing technology: 10 micron 1 1971 Intel® 4004 processor Initial clock speed: 108KHz Transistors: 2,300 Manufacturing technology: 10 micron
  10. 10. 4 1978 Intel® 8086 processor Initial clock speed: 5MHz Transistors: 29,000 Manufacturing technology: 3 micron 3 1974 Intel® 8080 processor Initial clock speed: 2MHz Transistors: 4,500 Manufacturing technology: 6 micron
  11. 11. 6 1985 Intel® 386™ processor Initial clock speed: 16MHz Transistors: 275,000 Manufacturing technology: 1.5 micron 5 1982 Intel® 286™ processor Initial clock speed: 6MHz Transistors: 134,000 Manufacturing technology: 1.5 micron
  12. 12. 8 1993 Intel® Pentium® processor Initial clock speed: 66MHz Transistors: 3.1 million Manufacturing technology: 0.8 micron 7 1989 Intel® 486™ processor Initial clock speed: 25MHz Transistors: 1.2 million Manufacturing technology: 1 micron
  13. 13. 10 1997 Intel® Pentium® II processor Initial clock speed: 300MHz Transistors: 7.5 million Manufacturing technology: 0.25 micron 9 1995 Intel® Pentium® Pro processor Initial clock speed: 200MHz Transistors: 5.5 million Manufacturing technology: 0.35 micron
  14. 14. 12 1999 Intel® Pentium® III processor Initial clock speed: 600MHz Transistors: 9.5 million Manufacturing technology: 0.25 micron 11 1998 Intel® Celeron® processor Initial clock speed: 266MHz Transistors: 7.5 million Manufacturing technology: 0.25 micron
  15. 15. 14 2001 Intel® Xeon® processor Initial clock speed: 1.7GHz Transistors: 42 million Manufacturing technology: 0.18 micron 13 2000 Intel® Pentium® 4 processor Initial clock speed: 1.5GHz Transistors: 42 million Manufacturing technology: 0.18 micron
  16. 16. 16 2006 Intel® Core™2 Duo processor Initial clock speed: 2.66GHz Transistors: 291 million Manufacturing technology: 65nm 15 2003 Intel® Pentium® M processor Initial clock speed: 1.7GHz Transistors: 55 million Manufacturing technology: 90nm
  17. 17. 18 2008 Intel® Atom™ processor Initial clock speed: 1.86GHz Transistors: 47 million Manufacturing technology: 45nm 17 2008 Intel® Core™2 Duo processor Initial clock speed: 2.4GHz Transistors: 410 million Manufacturing technology: 45nm
  18. 18. 20 2012 3rd generation Intel® Core™ processor Initial clock speed: 2.9GHz Transistors: 1.4 billion Manufacturing technology: 22nm 19 2010 2nd generation Intel® Core™ processor Initial clock speed: 3.8GHz Transistors: 1.16 billion Manufacturing technology: 32nm
  19. 19. “Making of a Chip” 22nm 3D/Trigate Transistors – Version
  20. 20. Sand / Ingot
  21. 21. • Sand – • Silicon is the second most abundant element in the earth's crust. Common sand has a high percentage of silicon. Silicon – the starting material for computer chips – is a semiconductor, meaning that it can be readily turned into an excellent conductor or an insulator of electricity, by the introduction of minor amounts of impurities. • Melted Silicon – • scale: wafer level (~300mm / 12 inch) . In order to be used for computer chips, silicon must be purified so there is less than one alien atom per billion. It is pulled from a melted state to form a solid which is a single, continuous and unbroken crystal lattice in the shape of a cylinder, known as an ingot. • Monocrystalline Silicon Ingot – • scale: wafer level (~300mm / 12 inch) . The ingot has a diameter of 300mm and weighs about 100 kg. Sand / Ingot
  22. 22. Ingot / wafer
  23. 23. • Ingot Slicing – • scale: wafer level (~300mm / 12 inch) . The ingot is cut into individual silicon discs called wafers. Each wafer has a diameter of 300mm and is about 1 mm thick. • Wafer – • scale: wafer level (~300mm / 12 inch) . The wafers are polished until they have flawless, mirror-smooth surfaces. Intel buys manufacturing-ready wafers from its suppliers. Wafer sizes have increased over time, resulting in decreased costs per chip. when Intel began making chips, wafers were only 50mm in diameter. Today they are 300mm, and the industry has a plan to advance to 450mm. Ingot / wafer
  24. 24. Photolithography
  25. 25. • Applying Photoresist – • scale: wafer level (~300mm / 12 inch) . Photolithography is the process by which a specific pattern is imprinted on the wafer. It starts with the application of a liquid known as photoresist, which is evenly poured onto the wafer while it spins. It gets its name from the fact that it is sensitive to certain frequencies of light (“photo”) and is resistant to certain chemicals that will be used later to remove portions of a layer of material (“resist”). • Exposure – • scale: wafer level (~300mm / 12 inch) . The photoresist is hardened, and portions of it are exposed to ultraviolet (UV) light, making it soluble. The exposure is done using masks that act like stencils, so only a specific pattern of photoresist becomes soluble. The mask has an image of the pattern that needs to go on the wafer; it is optically reduced by a lens, and the exposure tool steps and repeats across the wafer to form the same image a large number of times. • Resist Development– • scale: wafer level (~300mm / 12 inch) . The soluble photoresist is removed by a chemical process, leaving a photoresist pattern determined by what was on the mask. Photolithography
  26. 26. Ion Implantation
  27. 27. • Ion Implantation– • scale: wafer level (~300mm / 12 inch) . The wafer with patterned photoresist is bombarded with a beam of ions (positively or negatively charged atoms) which become embedded beneath the surface in the regions not covered by photoresist. This process is called doping, because impurities are introduced into the silicon. This alters the conductive properties of the silicon (making it conductive or insulating, depending on the type of ion used) in selected locations. Here we show the creation of wells, which are regions within which transistors will be formed. • Removing Photoresist– • scale: wafer level (~300mm / 12 inch) . After ion implantation, the photoresist is removed and the resulting wafer has a pattern of doped regions in which transistors will be formed. • Begin Transistor Formation– • scale: transistor level (~50-200nm) . Here we zoom into a tiny part of the wafer, where a single transistor will be formed. The green region represents doped silicon. Today’s wafers can have hundreds of billions of such regions which will house transistors. Ion Implantation
  28. 28. Etching
  29. 29. • Etch– • scale: transistor level (~50-200nm) . In order to create a fin for a tri- gate transistor, a pattern of material called a hard mask (blue) is applied using the photolithography process just described. Then a chemical is applied to etch away unwanted silicon, leaving behind a fin with a layer of hard mask on top. • Removing Photoresist – • scale: transistor level (~50-200nm) . The hard mask is chemically removed, leaving a tall, thin silicon fin which will contain the channel of a transistor. Etching
  30. 30. Temporary Gate Formation
  31. 31. • Silicon Dioxide Gate Dielectric– • scale: transistor level (~50-200nm) . Using a photolithography step, portions of the transistor are covered with photoresist and a thin silicon dioxide layer (red) is created by inserting the wafer in an oxygen-filled tube-furnace. This becomes a temporary gate dielectric. • Polysilicon Gate Electrode– • scale: transistor level (~50-200nm) . Again using a photolithography step, a temporary layer of polycrystalline silicon (yellow) is created. This becomes a temporary gate electrode. • Insulator– • scale: transistor level (~50-200nm) . In another oxidation step, a silicon dioxide layer is created over the entire wafer (red/transparent layer) to insulate this transistor from other elements. Temporary Gate Formation
  32. 32. “Gate-Last” High-k/Metal Gate Formation
  33. 33. • Removal of Sacrificial Gate– • scale: transistor level (~50-200nm) . Using a masking step, the temporary (sacrificial) gate electrode and gate dielectric are etched away. The actual gate will now be formed; because the first gate was removed, this procedure is known as “gate last”. • Applying High-k Dielectric – • scale: transistor level (~50-200nm) . Individual molecular layers are applied to the surface of the wafer in a process called “atomic layer deposition”. The yellow layers shown here represent two of these. Using a photolithography step, the high-k material is etched away from the undesired areas such as above the transparent silicon dioxide. • Metal Gate– • scale: transistor level (~50-200nm) . A metal gate electrode (blue) is formed over the wafer and, using a lithography step, removed from regions other than where the gate electrode is desired. The combination of this and the high-k material (thin yellow layer) gives the transistor much better performance and reduced leakage than would be possible with a traditional silicon dioxide/polysilicon gate. “Gate-Last” High-k/Metal Gate Formation
  34. 34. Metal Deposition
  35. 35. • Ready Transistor – • scale: transistor level (~50-200nm) . This transistor is close to being finished. Three holes have been etched into the insulation layer (red color) above the transistor. These three holes will be filled with copper or other material which will make up the connections to other transistors. • Electroplating – • scale: transistor level (~50-200nm) . The wafers are put into a copper sulphate solution at this stage. The copper ions are deposited onto the transistor thru a process called electroplating. The copper ions travel from the positive terminal (anode) to the negative terminal (cathode) which is represented by the wafer. • After Electroplating – • scale: transistor level (~50-200nm) . On the wafer surface the copper ions settle as a thin layer of copper. Metal Deposition
  36. 36. Metal Layer
  37. 37. • Polishing – • scale: transistor level (~50-200nm) . The excess material is mechanically polished away to reveal a specific pattern of copper. • Metal Layers – • scale: transistor level (six transistors combined ~500nm) . Multiple metal layers are created to interconnect (think: wires) all the transistors on the chip in a specific configuration. How these connections have to be “wired” is determined by the architecture and design teams that develop the functionality of the respective processor (e.g. 2nd Generation Intel® Core™ i5 Processor). While computer chips look extremely flat, they may actually have over 30 layers to form complex circuitry. A magnified view of a chip will show an intricate network of circuit lines and transistors that look like a futuristic, multi-layered highway system. Metal Layer
  38. 38. Wafer Sort / Singulation
  39. 39. • Wafer Sort – • scale: die level (~10mm / ~0.5 inch) . This portion of a ready wafer is being put through a test. A tester steps across the wafer; leads from its head make contact on specific points on the top of the wafer and an electrical test is performed. Test patterns are fed into every single chip and the response from the chip is monitored and compared to “the right answer”. • Wafer Slicing – • scale: wafer level (~300mm / 12 inch) . The wafer is cut into pieces (called die). The above wafer contains future Intel processors codenamed Ivy Bridge. • Selecting Die for Packaging – • scale: wafer level (~300mm / 12 inch) . The die that responded with the right answer to the test patterns will be packaged. Wafer Sort/Singulation
  40. 40. Packaging
  41. 41. • Individual Die – • scale: die level (~10mm / ~0.5 inch) . These are individual die which have been cut out in the previous step (singulation). The die shown here is Intel’s first 22nm microprocessor codenamed Ivy Bridge. • Packaging – • scale: package level (~20mm / ~1 inch) . The package substrate, the die and the heat spreader are put together to form a completed processor. The green substrate builds the electrical and mechanical interface for the processor to interact with the rest of the PC system. The silver heat spreader is a thermal interface which helps dissipate heat. • Processor – • scale: package level (~20mm / ~1 inch) . Completed processor (Ivy Bridge in this case). A microprocessor has been called the most complex manufactured product made by man. Packaging
  42. 42. Class Testing/Completed Processor
  43. 43. • Class Testing – • scale: package level (~20mm / ~1 inch) . During this final test the processor is thoroughly tested for functionality, performance and power. • Binning – • scale: package level (~20mm / ~1 inch) . Based on the test result of class testing, processors with equal capabilities are binned together in trays, ready for shipment to customers. • Retail Package – • scale: package level (~20mm / ~1 inch) . The readily manufactured and tested processors either go to system manufacturers in trays (see binning image) or into retail stores in a box such as the one shown here. Class Testing/Completed Processor
  44. 44. Core intelligent 3, 5 & 7 processors are ruling the market…
  45. 45. Business Performance
  46. 46. B.Techin Computer Science & Engineering MBA 1st Semester pursuing WEST BENGAL UNIVERSITY OF TECHNOLOGY CONTACT • E-mail – tirthamal2010@gmail.com • Mobile no. – +91 9477420420