03 workshop

Renesas Electronics Taiwan
Victron Technology Co., Ltd.
FAE Ziyuan Chen
RX600 Short Seminar
~從開發環境使用到撰寫程式作動~

© 2015 Renesas Electronics Corporation. All rights reserved.
Content
 Coding : Create/Build C Application Project.
 Debugging : Emulator Connection/Debug.
 Coding : Startup of Sample Program.
 Coding : Compiler Language Specifications.
 Practices
 Clock Generation Circuit Setting.
 Module Stop & Pin Function Select.
 Interrupt Controller.
2

Project Create & Build
3

CubeSuite+
 The new integrated environment whose concept is Easy, Convenience,
Confidence.
4

Materials
5
Please verify you have the following materials at your lab station.
SW
CS+ for CC V3.00.00 or above
RX compiler CC-RX V2.03.00 or above
HW
QB-RX63TH-21x V1.1
E1 Emulator

CubeSuite+起動
 [ ] →[ ] →[Renesas Electronics CS+] →
[CS+ for CC (RX,RH850)]
6

Create New Project
7

Project Setting
8
③ 輸入專案名稱
④ 輸入專案儲存路徑
① Select MCU type、MCU part name
② 指定專案類型
空白專案
C開發用標準專案
C++開發用標準專案
Library專案
Debug空白專案
- Empty Application
- Application(CC-RX)
- C++ Application(CC-RX)
- Library
- Debug Only
Kind of project
RX
R5F563TBAxFB( 144 pin )
Application(CC-RX)
Sample
C:WorkSpace

開發環境
9
Project Window
Edit Window
Output Window

Files of Application Type
10
dbsct.c
intprg.c
resetprg.c
sample.c
sbrk.c
vecttbl.c
iodefine.h
sbrk.h
startsct.h
typedefine.h
vect.h
Section initialization processing (table)
Vector function definitions
Initial setting routine (reset vector function)
Main Program
Memory management-related low-level interface routine.
Fixed vector table
Definition of I/O registers.
Memory management-related low-level interface routine.
Stack size settings
Type definition header
Vector function header
DefaultBuild/
sample.xxx.mtud
sample.mtpj
sample.rcpe
hwsetup.c
lowlvl.src
lowsrc.c
lowsrc.h
Folder of build mode setting
CubeSuite+ common project file
CubeSuite+ main project file
CubeSuite+ common project file
Hardware setup function
IOStream Assembler List
IOStream Low-level Library Source File
IOStream Low-level Library Header File

File structure of Project Generator
resetprg.c
Reset Program, contains
program entry function
Type alias declaration header
dbsct.c
Specification of memory
initialization target
vecttbl.c
Vector table
intprg.c
Interrupt Program,
containing skeleton
interrupt functions
sbrk.c
Low-level interface routine
for memory management
Definition of I/O Registers, for
onchip peripherals
typedefine.h
iodefine.h
stacksct.h
Definition of I/O Registers, for
onchip peripherals
vect.h
iodefine.h
vect.h
typedefine.h
Low-level used header for
memory management
sbrk.h
typedefine.h
Stack section size header
Vector table header
hwsetup.c
Peripheral I/O setup Function Definition of I/O Registers, for
onchip peripherals
iodefine.h
lowsrc.c
I/O low-level interface routine I/O low-level function header
lowsrc.h
lowlvl.src
I/O low-level interface routine
Vector table header
11

Build & Error
 Build (F7) .
 Error , Error Message .
 Error Message, Error Message Help.
12

E1 Emulator Connection / Debug
13

連接 E1 與 Target Board
14
SW6
debugger

滑鼠右鍵
Debug tool 選擇
15
•設定Debug tool 種類與連線方式

E1 與 Target Board 連接設定

16
右鍵
•設定使用Debug tool 供電
•設定Main clock

Connect to Debug Tool
17

編譯範例程式
18
編譯 source code 生成 download module

Program Download
19
Download the load module files to be
debugged.

Debug Command
20
To reset CPU, When CPU is reset, the current PC value is set to the reset address.
Reset the CPU and start the execution of the program from the reset address.
Normal execution.
Stop the program manually.

Set Breakpoint
21

Other Debug Window
22

Disconnect from Debug Tool
23

Change Microcontroller
24
右鍵
 快速變更 CPU Type ?
當想更換 CPU Type 卻不想建立新的專案時，
可藉由進行上述方法來處理。

Startup of Sample Program
25

Startup Flow
26
Power ON . Reset Fixed_Vector Table
PowerON_Reset_PC function
1. Sets INTB, FPSW.
2. Call section initialization function.
Initialize section B (uninitialized data section) to
zero. For section D (initialized data section), copy
the initial value of the ROM area to the RAM area.
3. Hardware initialization.
4. PSW setting.
5. Call main function.
6. Execute BRK instruction.
vecttbl.c and vect.h
resetprg.c
_INITSCT
Standard library
Setup the memory
sections of the code and
provide the interrupt
vector
dbsct.c
HardwareSetup( ) function
hwsetup.c
Main( ) function
Project_name.c

Peripheral Function Coding
 Peripheral function register (SFR)
27
struct st_tmr0 {
union {
unsigned char BYTE;
struct {
unsigned char CMIEB:1;
unsigned char CMIEA:1;
unsigned char OVIE:1;
unsigned char CCLR:2;
} BIT;
} TCR;
char wk0[1];
union {
unsigned char BYTE;
struct {
unsigned char :4;
unsigned char OSB:2;
unsigned char OSA:2;
} BIT;
} TCSR;
char wk1[1];
unsigned char TCORA;
#define TMR0 (*(volatile struct st_tmr0 __evenaccess *)0x88200)
iodefine.h
void main(void)
{
TMR0.TCR.BYTE = 0x12;
TMR0.TCSR.BIT.OSB = 0x01;
TMR0.TCR.BIT.OVIE = 1;
TMR0.TCORA = 0x12;
}
Program coding
< Module name >.< Register name >.< Access size>
< Module name >.< Register name >.BIT.<Bit name>
< Module name >.< Register name >
iodefine.h

Compiler Language Specifications
28

Renesas MCUs Migration
RX SH H8 R32C M32C M16C How to maintain compatibility
char type with no sign Unsigned Signed Signed Unsigned Unsigned Unsigned Specify the signed_char option.
int-type size 32 bits 32 bits 16 bits 32 bits 16 bits 16 bits Specify the int_to_short option.
double /
long double-type
32 bits 64 bits 64 bits 64 bits 32 bits 32 bits Specify the dbl_size=8 option.
bit-field type with no sign Unsigned Signed Signed Unsigned Unsigned Unsigned Specify the signed_bitfield option.
Data type
RX SH H8 R32C M32C M16C How to maintain compatibility
Endian Little Big Big Little Little Little Specify the endian=big option.
Bit fields
Aligned from
the lowest-
order bit.
Aligned from
the highest-
order bit.
Aligned from
the highest-
order bit.
Aligned from
the lowest-
order bit.
Aligned from
the lowest-
order bit.
Aligned from
the lowest-
order bit.
Specify the bit_order=left option.
Uninitialized variables
Order of
definition
Order of
declaration
Order of
declaration
Order of
definition
Order of
definition
Order of
definition
Declare the data in the desired order
of allocation.
const data with
no initial values
const
section
Uninitialize
d section
Uninitialize
d section
const
section
const
section
const
section
Use #pragma section directives to
divide up the sections.
Alignment specifications

Integer Types and Values
30
Type Value Range Data Size H8 M16C
char *1 0 ～ 255 1 byte × ○
Signed char -128 ～ 127 1 byte ○ ○
unsigned char 0 ～ 255 1 byte ○ ○
[signed] short -32768 ～ 32767 2 bytes ○ ○
unsigned short 0 ～ 65535 2 bytes ○ ○
[signed] int *2 -2147483648 ～ 2147483647 4 bytes × ×
unsigned int *2 0 ～ 4294967295 4 bytes × ×
[signed] long -2147483648 ～ 2147483647 4 bytes ○ ○
unsigned long 0 ～ 4294967295 4 bytes ○ ○
[signed] long long -9223372036854775808 ～ 9223372036854775807 8 bytes ○ ○
unsigned long long 0 ～ 18446744073709551615 8 bytes ○ ○
1. When the signed_char option is specified, the char type is handled as the signed char type.
2. When the int_to_short option is specified, the int type is handled as the short type, the signed int type as the signed
short type, and the unsigned int type as the unsigned short type.
Notes

Floating-Point Type Values
31
1. dbl_size=4 is specified (default)
2. dbl_size=8 is specified
Notes
Value Range
Item Decimal Notation*1
Internal Representation
(Hexadecimal)
float Maximum value 3.4028235677973364e+38f 0x7F7FFFFF
float Minimum positive value 7.0064923216240862e-46f 0x00000001
double
long double Maximum values *1
3.4028235677973364e+38 0x7F7FFFFF
double
long double Minimum positive values *1
7.0064923216240862e-46 0x00000001
double
long double Maximum values *2
1.7976931348623158e+308 0x7FEFFFFFFFFFFFFF
double
long double Minimum positive values *2
4.9406564584124655e-324 0x0000000000000001

Endian
 RX family default setting is little endian.
32

Bit Field（LSB default）
33

Bit Field（MSB option）
34

Clock Generation Circuit Setting
35

Clock Operation After Reset
 After reset, LOCO(125KHz) is working.
 Change to 12MHz external Clock.
Low-Speed On-Chip Oscillator
LOCO(125kHz) operates.
after reset
FCLK
ICLK
PCLKA
PCLKB
PCLKC
PCLKD
12MHz External Clock

Clock Setting Procedure
 Main clock setting
 Main clock oscillator: Operating
 PLL clock setting
 PLL: Operating
 System clock switching
 Clock switched to: PLL
 Internal Clock Division Ratio
 Stop LOCO
37

Clock Oscillation Stabilization Wait Time
 tMAINOSC recommended by the crystal/ceramic resonator
manufacturer
38
set in registers
set by the user software

Main Clock Oscillator Wait Control Register
 Control the oscillation settling time of the main clock oscillator.
 As long as the main clock oscillator stabilization time (tMAINOSC).
39
(MOSCWTCR)
値
12MHz 131072cyc =10.92ms

Main Clock Oscillator Control Register
 Control main clock oscillator operate/stop.
 Only set this register after setting the main clock oscillator wait
control register.
 When changing the value of the MOSTP bit, checking that its
value has actually been updated.
40
(MOSCCR)

PLL Control Register
 Set frequency of PLL input & output.
 The input frequency is within the range of 8 ~ 12.5 MHz.
 The output frequency is within the range of 104 ~ 200 MHz.
41
(PLLCR)
値
12MHz 1 =12MHz
値
12MHz 16 =192MHz

PLL Wait Control Register
 Select the oscillation settling time of the PLL.
 Set the waiting time is greater than the PLL clock stabilization
time (tPLL2).
42
(PLLWTCR)
値
192MHz 2097152cyc 10.92ms

PLL Control Register 2
 Control PLL operating/stopped.
 Only set this register after setting the PLL wait control register.
 After the setting has been changed so that the PLL operates,
only start using the PLL clock after the PLL clock oscillation
stabilization waiting time (tPLLWT2) has elapsed.
43
(PLLCR2)
値
tPLLWT2 tMAINOSC tPLL1 + PLLWTCR.PSTS + 131072) / fPLL
10ms + 0.5ms + ( 2097152cyc + 131072cyc ) / 192MHz
22.1053ms

Register Write Protection Function
 Protects important registers from being overwritten for in
case a program runs out of control.
 The registers to be protected are set with the protect register
(PRCR).
44

Protect Register
 Enable/disable writing to the corresponding registers to be
protected.
 To modify the PRCR register, write A5h to the eight higher-
order bits.
45
(PRCR)

Add file – hwsetup.c
46
hwsetup.c
Uncomment line ( resetprg.c line 103 )
HardwareSetup(); // Use Hardware Setup
右鍵

Clock Generation Circuit (PLL)
Sample Program (1/3)
47
MOV.L #636,R5 ; 1cyc
L11: NOP ; 1cyc
SUB #01H,R5 ; 1cyc
BNE L11 ; 3cyc
Max. LOCO clock oscillation frequency
void HardwareSetup(void)
{
int i;
SYSTEM.PRCR.WORD = 0xA503; // Disable write protection
SYSTEM.MOSCWTCR.BYTE = 0x0D; // 131072cyc Oscillator Waiting Time
SYSTEM.MOSCCR.BYTE = 0x00; // Operate the main clock oscillator
while( SYSTEM.MOSCCR.BYTE ) // Confirm that the written value
nop( );
SYSTEM.PLLCR.WORD = 0x0F00; // 12MHz/1*16=192MHz (multiply-by-16)
SYSTEM.PLLWTCR.BYTE = 0x0E; // Set wait time 2097152cyc
SYSTEM.PLLCR2.BYTE = 0x00; // PLL is operating
for( i=0 ; i<636 ; i++ ) // 22.1053ms Wait processing
nop( ); // 22.1053ms*143.75kHz/5cyc=636
#include "iodefine.h"
#include <machine.h>

Set The Internal Clock Division Ratio
 Set an appropriate value according
to the user system.
SCKCR
FCLK
ICLK
PCLKA
PCLKB
PCLKC
PCLKD

System Clock Control Register
 When changing the value, read back the register and confirm
the value has been changed.
49
(SCKCR)

Writing the System Clock Control Register
 Care should be taken when writing to the individual bit fields
in the SCKCR register.
50

System Clock Switching
 Clock source select.
SCKCR3
FCLK
ICLK
PCLKA
PCLKB
PCLKC
PCLKD

System Clock Control Register 3
 Clock source select.
 When changing the value, read back the register and confirm
the value has been changed.
52
(SCKCR3)

System Clock Source/Control
Sample Program (2/3)
53
SYSTEM.SCKCR.LONG = 0x21021212; // Set the internal clock division ratio
while( SYSTEM.SCKCR.LONG != 0x21021212)
nop( ) ; // Confirm that the written value
SYSTEM.SCKCR3.WORD = 0x0400; // PLL circuit is selected.
while( SYSTEM.SCKCR3.WORD != 0x0400 )
nop( ) ; // Confirm that the written value
FCLK : 192MHz * 1/4 => 48MHz
ICLK : 192MHz * 1/2 => 96MHz
BCLK : 192MHz * 1/4 => 48MHz &
PCLKA: 192MHz * 1/2 => 96MHz
PCLKB: 192MHz * 1/4 => 48MHz
PCLKC: 192MHz * 1/4 => 48MHz
PCLKD: 192MHz * 1/4 => 48MHz

Stop LOCO
Low-Speed On-Chip Oscillator
LOCO(125kHz) operates.
FCLK
ICLK
PCLKA
PCLKB
PCLKC
PCLKD
12MHz External Clock

Low-Speed On-Chip Oscillator Control
Register
 Runs or stops the LOCO.
55
(LOCOCR)

LOCO Setting Sample Program (3/3)
56
SYSTEM.LOCOCR.BYTE = 0x01; // Stop LOCO
SYSTEM.PRCR.WORD = 0xA500; // Protect setting
}

Module Stop & Pin Function Select
57

Module-stop function
 The module-stop function can be set for
each on-chip peripheral module.
GPT Unit1
RIIC
MTU
CMT
CAN
SCI
MTSPAn=1
MTSPAn=0
MTSPAn=1
MTSPAn=1
MTSPBn=1
MTSPBn=1
MTSPBn=1

Module Stop Control Register A
59
(MSTPCRA)
The bit access operation is "MSTP(name)".
The name that can be used is a macro name defined with "iodefine.h".
for example :
MSTP(MTU4) = 0; // MTU,MTU0,MTU1,MTU2,MTU3,MTU4,... expands to :
SYSTEM.MSTPCRA.BIT.MSTPA9 = 0;
 After reset, all peripheral function clock are stop.
 When using peripheral function, disable module-stop.

Register Write Protection Function
 Protects important registers from being overwritten for in
case a program runs out of control.
 The registers to be protected are set with the protect register
(PRCR).
60

Protect Register
 Enable/disable writing to the corresponding registers to be
protected.
 To modify the PRCR register, write A5h to the eight higher-
order bits.
61
(PRCR)

PWM Output Sample Program (1/2)
( Disable Module-Stop )
62
void main(void)
{
SYSTEM.PRCR.WORD = 0xA502; // Register protect disable
MSTP( MTU ) = 0; // MTU module-stop disable
SYSTEM.PRCR.WORD = 0xA500; // Register protect enable
MTU.TOERA.BIT.OE4A = 1; // MTIOC4A output enable
MTU4.TMDR1.BYTE = 0x02; // PWM mode 1
MTU4.TCR.BYTE = 0x21; // Counter setting, Internal clock: PCLKA/4
MTU4.TIORH.BYTE = 0x12; // Init=Low TGRB=Low TGRA=High
MTU4.TGRA = 12000; // 96M/4/1000/2 = 12000(0.5ms)
MTU4.TGRB = 120; // duty = 1%
PWM Mode 1 Operation
//#include "typedefine.h"
#include "iodefine.h "

Pin Function Setting ( IO / Peripheral )
63
 Pin functions are switched by PmnPFS PMR register settings.
Uses the pin as an
peripheral functions.
Peripheral function select
Interrupt Input Function Select

Pin Function Setting Flow
 Each bit of PORTm.PMR corresponds to each pin of port m,
pin function can be specified in 1-bit units.
 The multi-function pin selects and assigns input/output of
peripheral functions and interrupt input signals from multiple
ports. Port Mode Register PORTm.PMR
0 peripheral functions1
Pin Function Control Register MPC.PmnPFS
PSEL
Pin Function Select
ISEL
Interrupt Input
Function Select
ASEL
Analog Input
Function Select
00001b MTIOC4A
00110b GTIOC1A
0 Not use
1 use
0 Not use
1 use
0 Not use
1 use
general I/O
Write-Protect Register (PWPR)
Write protect disable

Port Mode Register
65
(PMR)
 Each bit of PORTm.PMR corresponds to each pin of port m;
pin function can be specified in 1-bit units.
 The bit corresponding to a pin that does not exist is
reserved. A reserved bit is read as 0. The write value should
be 0.

Pin Function Control Register
66
(PmnPFS)

Write-Protect Register
 Write 0 to the B0WI bit before setting the PFSWE bit to 1.
 Only when 1 is written to the PFSWE bit,
writing to the PmnPFS and UDPUEPFS registers is allowed.
67
(PWPR)

PWM Output Sample Program (2/2)
( Pin Function Select)
68
MPC.PWPR.BIT.B0WI = 0; // PWPR.PFSWE write-protect disable
MPC.PWPR.BIT.PFSWE = 1; // PFS write-protect disable
MPC.P72PFS.BIT.PSEL = 1; // Select MTIOC4A
MPC.PWPR.BYTE = 0x80; // PFS write-protect enable
PORT7.PMR.BIT.B2 = 1; // P72 used as peripheral functions
MTU.TSTRA.BIT.CST4 = 1; // MTU4 counting start
while( 1 )
{
nop( );
}
}

Interrupt Controller
69

RX Interrupt Control Unit
70
Interrupt Request
Interrupt Enable Bit
Interrupt
request
register
Interrupt
request enable
register
Interrupt
source priority
register
IPR > IPL

MTU
71

Timer Interrupt Enable Register
 Each function have interrupt enable bit.
73
(TIER)

Interrupt Request Register n
 Status flag of an individual interrupt request.
 This flag is set to 1 when the corresponding interrupt
request is generated.
74
(IRn) (n = interrupt vector number)
The bit access operation is "IR (module name, interrupt source )".
The name that can be used is a macro name defined with "iodefine.h".
for example :
IR(MTU0,TGIA0) = 0; // expands to :
ICU.IR[126].BIT.IR = 0;

Polling Interrupt Request Flag
75
MTU4.TIER.BIT.TGIEA = 1; // Interrupt requests (TGIA) enabled
MTU.TSTRA.BIT.CST4 = 1; // MTU4 counting start
while( 1 )
{
while( !IR( MTU4, TGIA4 ) ) // IR flag polling
nop() ;
IR( MTU4, TGIA4 ) = 0; // Clear IR flag
MTU4.TSR.BIT.TGFA = 0; // Clear Compare Flag
if( !updown ) // Duty increase?
if( MTU4.TGRB >= 11880 ) // Max duty check
updown = 1; // Duty decrease next time.
else
MTU4.TGRB += 12; // Duty increase 0.01%
else // Duty decrease ?
if( MTU4.TGRB <= 120 ) // Min duty check
updown = 0; // Duty increase next time.
else
MTU4.TGRB -= 12; // Duty decrease 0.01%
}
//#include "typedefine.h"
#include "iodefine.h
unsigned int updown = 0;

Interrupts vs. Polling
76
IR
IR
IR value change from 0 to 1

Interrupt Request Enable Register m
 Interrupt request enable/disable.
77
(IERm) (m = 02h to 1Fh)

Interrupt Source Priority Register n
 Specify the priority level of the corresponding interrupt source.
78
(IPRn) (n = 000 to 250)

Interrupt Vector Table
79
Number of IR[n] Number of IER[m] & IENn Number of IPR[n]

Interrupt Vector Table & iodefine.h macro
80
IR( MTU4 , TGIA4 ) = 0; // Clear MTU4_TGIA4 interrupt flag.
IEN( MTU4 , TGIA4 ) = 1; // Enable MTU4_TGIA4 interrupt.
IPR( MTU4 , TGIA4 ) = 5; // Set MTU4_TGIA4 interrupt priority = 5.

PWM Output Program (initialization, 1/2)
81
void main(void)
{
SYSTEM.PRCR.WORD = 0xA502; // Register protect disable
MSTP( MTU ) = 0; // MTU module-stop disable
SYSTEM.PRCR.WORD = 0xA500; // Register protect enable
MTU.TOER.BIT.OE4A = 1; // MTIOC4A output enable
MTU4.TMDR.BYTE = 0x02; // PWM mode 1
MTU4.TCR.BYTE = 0x21; // Counter setting, Internal clock: PCLKA/4
MTU4.TIORH.BYTE = 0x12; // Init=Low TGRB=Low TGRA=High MTU4.TGRA = 12000;
// 48MHz/1000/4 = 12000(1ms)
MTU4.TGRB = 120; // duty = 1%
MPC.PWPR.BIT.B0WI = 0; // PWPR.PFSWE write-protect disable
MPC.PWPR.BIT.PFSWE = 1; // PFS write-protect disable
MPC.P72PFS.BIT.PSEL = 1; // Select MTIOC4A
MPC.PWPR.BYTE = 0x80; // PFS write-protect enable
PORT7.PMR.BIT.B2 = 1; // P72 used as peripheral functions
IPR( MTU4 , TGIA4 ) = 1; // TGIA4 interrupt level 1
IEN( MTU4 , TGIA4 ) = 1; // TGIA4 interrupt enable

Processor Status Word
 The processor status word (PSW) indicates the results of
instruction execution or the state of the CPU.
82
(PSW)

Built-in Functions
 The compiler provides special instructions for the RX family.
 Include machine.h
83
Item Specifications Function
Processor interrupt priority level (IPL) void set_ipl(signed long level) Sets the interrupt priority level.
Processor status word (PSW) void set_psw(unsigned long data) Sets data to PSW.
Control of the interrupt enable bits (I)
void setpsw_i(void) Sets the interrupt enable bit to 1.
void clrpsw_i(void) Clears the interrupt enable bit to 0.
Floating-point status word (FPSW) void set_fpsw(unsigned long data) Sets data to FPSW
Interrupt table register (INTB) void set_intb(void * data) Sets data to INTB.
Special instructions
void wait(void) Stops program execution.
void nop(void) Expanded to a NOP instruction.
void main(void)
{
setpsw_i( ); // Sets the I bit of PSW to 1.
}

PWM Output Program (initialization, 2/2)
84
IPR( MTU4 , TGIA4 ) = 1; // TGIA4 interrupt level 1
IEN( MTU4 , TGIA4 ) = 1; // TGIA4 interrupt enable
// setpsw_i( ); // Interrupt enable.
MTU.TSTR.BIT.CST4 = 1; // MTU4 counting start
while( 1 )
{
nop( );
}
}
Application-type Project with CS+,
This setting already in PowerON_ResetPC function of resetprg.c.
#define PSW_init 0x00010000 // PSW bit pattern
set_psw(PSW_init); // Set Ubit & Ibit for PSW

Interrupt Function Creation
 An interrupt function declared by #pragma interrupt
guarantees register values before and after processing.
 When enable is specified, nested interrupt enable.
85
Item Form Options Specifications
Vector table vect= <vector number>
Specifies the vector number for which the interrupt
function address is stored.
Nested interrupt enable enable none
Sets the I flag in PSW to 1 at the beginning of the
function to enable nested interrupts.
Format:
#pragma interrupt ( function name (interrupt specification,...) )

PWM Output Program (interrupt function)
86
Function declaration vect.h
#pragma interrupt (Excep_MTU4_TGIA4(vect=156),enable)
void Excep_MTU4_TGIA4(void);
Function definition intprg.c
void Excep_MTU4_TGIA4(void)
{
extern int updown;
MTU4.TSR.BIT.TGFA = 0; // Clear Compare Flag
if( !updown ) // Duty increase?
if( MTU4.TGRB >= 11880 ) // Max duty check
updown = 1; // Duty decrease next time.
else
MTU4.TGRB += 12; // Duty increase 0.01%
else // Duty decrease ?
if( MTU4.TGRB <= 120 ) // Min duty check
updown = 0; // Duty increase next time.
else
MTU4.TGRB -= 12; // Duty decrease 0.01%
}
#include "vect.h"
#include "iodefine.h"

03 workshop

Recomendados

Recomendados

Mais conteúdo relacionado

Mais procurados

Mais procurados (20)

Semelhante a 03 workshop

Semelhante a 03 workshop (20)

Último

Último (20)

03 workshop