4. Block Diagram - 8155 256 X 8 Static RAM A B C Timer 8 8 6 Port A Port B Port C PA 0-7 PB 0-7 PC 0-5 8 AD 0-7 IO/M CE ALE RD WR Timer CLK TIMER OUT Vcc (+5 V) Vss (0 V) RESET I/O Devices 8085
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6. Interfacing 8085 with 8155 8085 256 X 8 Static RAM A B C Timer 8 8 6 Port A Port B Port C 8 AD 0-7 IO/M CE ALE RD WR RESET A 15 8085 8155
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10. Control Word Definition for 8155 Port A Port B 0, Input 1, Output Port C Interrupt Enable Port A Interrupt Enable Port B 0, Disable 1, Enable Timer D0 D1 D2 D3 D4 D5 D6 D7 D3 D2 PORT C 0 0 ALT1 0 1 ALT2 1 0 ALT3 1 1 ALT4 D7 D6 Timer 0 0 NOP 0 1 Stop 1 0 Stop after TC 1 0 Start
11. I/O functions of Port C I = Input O = Output STB = Strobe BF = Buffer Full INTR = Interrupt Request ALT D3 D2 PC5 PC4 PC3 PC2 PC1 PC0 ALT1 0 0 I I I I I I ALT2 0 1 O O O O O O ALT3 1 0 O O O STB A BF A INTR A ALT4 1 1 STB B BF B INTR B STB A BF A INTR A
12. Design an interfacing circuit to read data from an A/D converter using the 8155A in the peripheral mapped I/O . 8085 3-to-8 Decoder A/D Converter Analog Input Digital Input Por t A AD0-AD7 O 0 O 7 8155 Por t C Por t B SOC OE EOC O 2 CE E 2 E 1 A 2 A 1 A 0 A 11 A 12 A 13 A 14 A 15 IO/M RD WR RESET ALE LED Display BF A STB A PC5
13. Port Addresses of 8155 Chip Selection A7 A6 A5 A4 A3 0 0 0 1 0 = 10H = 11H = 12H = 13H = 14H = 15H A2 A1 A0 Port 0 0 0 Control/Status Register 0 0 1 Port A 0 1 0 Port B 0 1 1 Port C 1 0 0 LSB Timer 1 0 1 MSB Timer
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16. Control Word for configuration Port A Port B 0, Input 1, Output Port C IE Port A IE Port B 0, Disable 1, Enable Timer D0 D1 D2 D3 D4 D5 D6 D7 D3 D2 PORT C 0 0 ALT1 0 1 ALT2 1 0 ALT3 1 1 ALT4 D7 D6 Timer 0 0 NOP 0 1 Stop 1 0 Stop after TC 1 0 Start 0 1 0 1 0 0 0 0