Portland State University Presentation on Technology Forecasting Tools

Technology Forecasting Using
TRIZ Methods and Tools
Portland State University
Engineering Management of Technology
Winter ’09
Richard Platt
Owner – Principal
The Strategy + Innovation Group LLC

- All Rights Reserved -
- The Strategy + Innovation Group LLC - 2
Presenter Bio
Current Position: (09/06 – Present)
Owner of The Strategy + Innovation Group LLC
Previous Positions (Intel): (‘95 intern, 04/97 – 09/06)
Senior Instructor for Innovation Methods and Innovation/ TRIZ Program
Manager
– Recruited and trained 13 instructors + >850 Engineers, PM’s, Technology
Developers and R&D personnel
Quality and Reliability Engineer (EID)
Technology Development Program Manager in:
1. ATTD
2. Components Research
3. Server Architecture Lab
Manufacturing Engineer (ESG)
Customer Program Manager (OPSD - intern)
1 Intel Manufacturing Excellence Award
5 Divisional Recognition Awards
2 Patents and multiple defensive publications
Refer to LinkedIn page for further discussions
Certifications: Innovation Master® , TRIZ Expert (+240 hours training,
and testing), Lean and a Greenbelt in 6 Sigma

Where:
*This formula (in more simplified form) proposed first by Boris Goldovsky in 1974.
I = the degree of ideality
F = a function delivered of a positive effect
P = negative effect, expenses
i = a number of variable F
j = a number of variable P
Law of Ideality Equation
∞
∞

Higher Level Functionality
=
Higher
Value
Benefits
Costs
Improved performance
Lower expendituresFewer harmful effects
Simple Formula for Value
Business Goal:
Generate a profit
while delivering
unrivaled customer
value
Confidential

The Law of Ideality in Action
1/1,000,000 the size; 1/10,000,000 the weight
1/1,000,000 the cost
10,000,000 X the performance and reliability
FunctionalityFunctionality
andand
performanceperformance
increasesincreases
atat
lower costslower costs
Source: Intel

Benefits
Costs
Increasing Value
Benefits
Costs
Conventional way TRIZ way
Innovation can be risky and expensive, it typically involves
a random search for solutions (trial-and-error).
These solutions are often costly mistakes providing a time
advantage to competitors.

Infancy Rapid growth Maturity
Decline
Benefit-to-cost
Time
Technology Innovation: S-curve
Make it work
Maximize efficiency
Minimize cost
Prove idea
Next-generation

Moore’s Law & the Law of Ideality
S-Curves are located at every process change & successive generation
(all the way to 300mm wafers, from 1.0u to 0.8u, and so on)
MIPSMIPS
Pentium® Pro
Processor
Pentium® II
Processor
Pentium® III
Processor
Pentium® 4
Processor
Intel386TM DX
Microprocessor
Intel486TM DX CPU
Microprocessor
1
10
100
1000
10000
1985 1989 1993 1995 1997 1999 2001
MIPS
$/MIPS$/MIPS
0.01
0.1
1
10
100
$/MIPS
Silicon Technology
1.5µ
1.0µ
0.8µ
0.6µ
0.4µ
0.25µ
0.18µ
0.13µ
Pentium®
Processor
Source: Intel

The Main postulate of TRIZ
• Evolution of successful technologies is governed
by certain laws.
• This means that the transition…
…is predetermined.
Technology A
Technology B
Technology C
These are verified laws, tools and trends of engineering system evolution, not
opinion, & have been validated as statistically significant

An Example of a Law of Evolution
Stage of evolution A
Stage of evolution B
Stage of evolution C

Typical System vs. Consumer Trend
Product
Based
Economy
Service
Based
Economy
Experience
Based
Economy
Commodity
Based
Economy
Transformation
Based
Economy
Current System
1 2 3 4 5
Competitive Pressure
moves this way
Evolution of a Break-Through/Next
Generation System move this way
Confidential

General Principles of an Evolutionary Trend
INCREASING BENEFITS
INCREASING TECHNICAL CHALLENGE, RISK, etc
(TIME)
Immobile Single Joint Multiple Joint Liquid Gas FieldCompletely
flexible

• There are Universal Principles & Trends of Evolution
leading toward the “peak value”
– Can be used to predict “next big thing”
• Best innovations resolve conflicts (compromise-free)
• There are Universal Principles for resolving conflicts
Key Concepts

Integrated System Level Solution:
Embedded Silicon
within Rigid Core with Heat-pipe
Technology
By Richard Platt
(Former) Technology Development Program Manager Server Board &
System Technology

Why the Need for this Concept (1999)?
Inventor’s Comment: Intel has many researchers,
engineers & Intel Fellows working on evolving the
technologies for the silicon device and component level.
However I did not see the same amount and level of
investment of R&D resources being allocated at the
board or system level.
– This is especially of concern to the inventor since coming to
understand TRIZ (Theory of Inventive Problem Solving) that
evolving the technology in the super-system direction is just as an
important technology vector to pursue as the sub-system level
(where the primary focus is occurring within Intel today[1999]).
This concept is one of many potential concepts that
attempts to address evolvement of the technology to
the super-system. (Hopefully to block our competitors
from potentially outmaneuvering Intel in the
marketplace.)

Technology Trends Driving the Market
(1999)
#1 TREND: The Increasing # of I/O in IA; according to Moore’s Law*
states that # of transistors doubles on silicon devices every 18-24
months.
– This trend is driving the need for a enabling technologies to be
developed for the individual device, (i.e. wafer level), as well as at
the component level, board level and system levels to address the
scaling challenges.
– INVENTIVE SOLUTION NEEDED TO ADDRESS:
• Increasing complexity & decrease in size vs. Thermal management
and Manufacturability
– [(I): Device Complexity vs. (W): Use of energy by stationary Object].
– And/Or combinations
– [(I): Area of Stationary Object vs. (W): Object Generated Harmful Factors].
‘Moore’s Law’ correlates to the ‘Law of Ideality’ in TRIZ;
Law of Ideality = All engineering systems, evolve over time, providing
greater performance, functionality and benefit at lower cost and have
less detrimental aspects as a part of their design and manufacture.

Technology Trends Driving the Market
(1999)
#2 TREND: With the increase in the # of I/O in IA; there are greater
demands for more power for supporting the devices, especially in the
Server and Desktop product spaces (inventor’s background), as well
as in the mobile and networking product spaces.
• Increase in speed vs. Increased need to dissipate thermal energy
– [(I): Speed vs. (W): Temperature]
• Increase in thermal energy dissipation vs. small volumetric area.
– [(I): Use of energy by a Stationary Object vs. (W): Area of Stationary Object]
#3 TREND: With the increase in the # of I/O in IA; the pitch of I/O
balls both from die-to-package and package-to-board is shrinking
• Decrease in size vs. Manufacturability
– [(I): Area of Stationary Object vs. (W): Manufacturing Precision or Ease of
Manufacture].
– [(I): Quantity of a substance vs. (W): Ease of Manufacture or Manufacturing
Precision]

Silicon Device (Processor)
Thermal conductive Adhesive/Grease
Rigid
Core
– Al ?
Cu thermal transfer plate
Conductive Adhesive
MLB: Multi-Layer Board
Silicon Device (Processor)
Silver filled Resin or Epoxy
Embedded Thermal
Heat-pipe
Silicon device
Double-Sided Silicon Devices-In-Board (DSSDIB) –
Embedded processors
(current component designs using gold bumps or gold wire) in Imprinted
Circuit Boards w/ rigid cores.
µ-Via (4-6mil buried & blind)
Bump contact pads
Intel Patent Holder: Richard Platt
Technology Development
Intel Program Manager
Std Via (10mil drill/ 13mil fin)
Standard trace for routing on outer layer

Double-Sided Silicon Devices-In-Board (DSSDIB)
1. The processor is embedded w/in the PCB through the machining/molding process of
the rigid core and then imprinting the underside of the multi layer substrate to create a
routing cavity.
2. Silver filled epoxy is used on the top side of the component between the rigid core
material lining, (likely nickel plated copper for the lining due to thermal transfer
capabilities and aluminum for the rigid core).
3. The bottom of the imprinted cavity with the trace connections and the metal contact
pads come in contact with the gold bumps of the silicon device is coated with a
electrically conductive adhesive.
3. The heat-pipe running through the rigid core, essentially acts as a radiator close to the
processor thermally heat-sinking the thermal energy into the liquid w/in the heat-pipe.
Then through osmotic process of the thermal heat-pipe itself it transfers the heated
liquid/gas to an external cooling source, (i.e. fan) that vents the thermal energy out of
the system. This technology is already in use on laptops today.
4. This approach integrates all those technologies together along w/ the rigid core which
provides additional rigidity and strength to already heavy and dense PCBs. The rigid
core acts as stabilizer.
5. Traces (I/O), can then route out on the same layer as where the ball pads connect, and
then using μ-vias the design engineer can then route to the primary side, (top surface),
of the PCB.
6. Instead of needing the package to manage the environment, now the PCB can be the
protective package around the silicon.
7. Cost savings are significant w/ integrating the silicon directly into the substrate &/or the
rigid core.
8. The rigid core is coated w/ a non-conductive film to prevent electrical shorts.
9. Opportunity to do side access fiber optics integrated into silicon and edge of substrate.
(not shown).

Rigid Core
2 Plates A & B > Aligned with Pins > R.C. Through Holes Drilled or molded
> Heat Pipe Cavity > Retainer Rails > Silicon Device Cavity
Through Holes Drilled into
Rigid Core
Alignment Pins
Silicon Cavity
Heat Pipe Cavity
Note: NOT TO SCALE -- R.C. Thickness TBD
Cutaway Drawing Set—Not a manufacturing Flow!
Retainer Rails

Embedded Components
Cu Thermal Plate > Silver Epoxy > Silicon Device
Silicon Device
(Gold Bumped)
Cu Thermal
Silver Epoxy

High Density Interconnect Printed
Circuit Board (HDI PCB)
PCB Constructed > PCB mounted to respective half of Rigid Core via alignment
Pins and PCB registration holes
Note: Surface Mount Components Only (includes I/O Connectors)
Bare HDI Foil PCB mounts to
Rigid Core

Final Assembly
All Components are S.M.T. > Heat Pipe & Condenser > Side A/B Joined
S.M. I/O Connectors
Side A/B Join
(Registration Apparatus TBD)
S.M. Connectors w/
Attachment into R.C.
Heat Pipe / Condenser
Assembled into core

Final Assembled Unit
Enhanced electrical performance
Efficient thermal solution
Increased reliability
Low Profile
Lowest Total Cost product
Total Solution space =
70% Mfg & Assy process technologies + 30% product technology

Risk Assessment of Technology EffortTechnology Evaluation
Criteria Metric Multiplier Ranking Notes / Comments
Ease of Manufacturability
Specialty Manufacturing
Process Yes = 1; No = 10 1 1
need to bring in New Processes, such as
HDI-PCB capability, rigid core technology
w/ integrated heat pipes, all SMT solutions
for connectors would need to be developed.
(I have new IP I am generating for that.)
Materials stage: lab,
prototype, development or
production?
lab = 1, prototype = 3,
development = 5, production =
7 1 1
would need to develop a prototype line 1st
in house to get the capability up and
determine what the costs and issues would
be to develop into a HVM line.
Is material specialty or
commodity? specialty = 5, commodity =
10 1 10
HDI is standard technology readily available
today. Aluminum rigid core can be done
outside --outsourced in the short term.
Practical (least amount of
effort for gain achieved)
Comaparitive against one
project versus another.
Multiplier of other metrics w/in
the technology evaluation
criteria 1 1
Do not personnaly know of any other
approach that attempts a higher level of
integration with the exception of Sun and
IBM as comparitive systems
known vendor - sole supplier
Vendor known yes = 10, no =
5. Sole supplier = 5, multiple
suppliers = 10 1 10
Grohmann Engineering
licensing or legal issues
Intel IP Y = 10; N = 1. Have
to x-license from someone
else = 5 Ability to x-license to
others = 10 1 20
IDF's already submitted last year
cost
POR cost = 5, more than
POR cost = 1, less than POR
cost = 10 1 10
Total system cost would be lower and
enables a more efficient thermal x-fer
mechanism than what is used today. No
need to entertain refrigeration as a solution
availability of engineering
know-how (internal /external /
none availale) internal = 10, external = 5,
none available = 0 1 5
Grohmann Engineering, Fraunhofer Insititute
and others have seen this and believe that it
is a viable approach with the manufacturing
capabilities that exist today.
integration w/ VF
Y = 10, No = 5 1 10
This would have to be a path pursued for a
FOF model
R&D resources available
(internal/external/none
available)
internal = 10, external = 5,
none available = 0 1 0
Extremely controversial approach, and
requires an new perspective on architecture
and business model
Is it disruptive technology?
(Will this provide signifcant
competitive
advantage/compelling value
add to feature set)
Characteristics of Disruptive
Technology are: simpler,
cheaper & lower perfoming.
Yes = 1; No = 0, Generally
promise lower margins, not
higher profits. Yes = 1; No =
0, Intel's main customer's
can't use the technology and
don't want it Yes = 1; No = 0, 5 X 5 25
IDF submitted Yes = 10; No = 1 1 10

Technology Evaluation
Unit Cost Impact
No cost benefit to BOM,
process, test, silicon or
platform costs = 1 Potential
cost reduction to BOM,
process, test, silicon or
platform costs = 5 Clear cost
benefit to BOM, process, test,
silicon or platform costs = 10 1 10
Implication to Business
Model
Technology dramtically
changes the way Intel does
business or introduces more
business risk = 1
Manageable risks and
changes to business model =
5 Technology leverage or
improves business model or
represetns low / mitigateable
business risk =10 1 1
Return on Investment
Technology does not
demonstrate a return on
investment = 1 Technology
demonstrates a potential
return on investment = 5
Technology demonstrates a
clear return on investment =
10
Unknown. Would need a full in depth
finance analyst to investigate this. No
resources currently allocated to support
Reasonable business risk
Yes = 10; No = 1 1 10
Yes, since you would develop this in-house
and only select one of your customersw to
work with on this to develop the prototypes
to prove out the business model and the
technology. Business model now moves to
entire PCB being delivered to OEM, end-
user,
Applicability
Technology is limited to 1 or
2 products and/or market
segments = 1 ; Technology
can be applied across market
segments but is limited to
either cpu or non cpu.= 5
Technology can be applied
across market segments and
cpu and non cpu.= 10 1 10
Scaleability
Technology is limited to 1
generation = 1 ; Technology
can be applied across multiple
generations but limited
segments = 5 ; Technology
can be applied across multiple
generations and segments =
10 1 10
I/P control
Intel has very little control of
I/P = 1 Intel will share
technology I/P with supplier =
5 Intel owns I/P = 10 1 10

Technology maturity/ Time to
development
Technology will take 3 to 5
years to develop = 1
years to develop = 10 1 1
Potential benefit
Technology will have limited
benefit and is really an
extension of existing
technology =1 Technology
will provide performance or
cost benefit = 5 Technology
will provide performance and
cost benefit = 10 1 10
Risk
Technology may have
significant reliable issues.
Will require significant effort
and >4 years develop = 1
Technology may have some
reliable issues. Will require
moderate effort and 2 to 4
Technology may has no
apparent reliable 1 1
52
Technology Evaluation

Now doing it Faster
Using a software tool can speed up the process, instead of
hours or days, now you can do it in minutes

Backward
Citations
View Patent Details Patent
Forward
Citations
View Patent Details
5793611
Cooling device with thermally
separated electronic parts on a
monolithic substrate
6292366 7294529 Method for embedding a component in a base
5355942
Cooling multi-chip modules using
embedded heat pipes
Printed circuit
board with
embedded
integrated circuit
7286359 Use of thermally conductive vias to extract heat
from microelectronic chips and method of
manufacturing
5306866 Module for electronic package
7176382 Electrical circuit board and method for making the
same
5199165
Heat pipe-electrical interconnect
integration method for chip
modules
7165321 Method for manufacturing printed wiring board
with embedded electric device
4774630
Apparatus for mounting a
semiconductor chip and making
electrical connections thereto
6991966 Method for embedding a component in a base and
forming a contact
4739443 Thermally conductive module 6788537 Heat pipe circuit board
4734315 Low power circuitry components
6680441 Printed wiring board with embedded electric
device and method for manufacturing printed
wiring board with embedded electric device
4631636
High density packaging technique
for electronic systems
6490159 Electrical circuit board and method for making the
same
4327399 Heat pipe cooling arrangement for
integrated circuit chips
(Quick) Patent Strength Analysis
Original
Patent
12 more patents reference this patent

Evolutionary Potential
0 1 2 3 4 5
X
Customer Expectation
Repeat for other trends…
Dynamisation
Dimensionality
etc
Used by Permission DL Mann
“Blue” area (trend potential), can be
used to suggest R&D and TD direction
as well as a focused brainstorming tool
on current problems, instead of opinion
based decision making.

Evolutionary Potential….
…can be performed
- for a specific system
- for a component
within a system
- for a process
- for a whole company
- for an industry

Sub System A
System
Evolutionary Potential Hierarchy
Sub System B Sub System C Sub System D etc
X
Y
Blue plot area is the
potential, unexplored and
undefined, opportunity to
exploit and evolve the system
to the next TRUE
Evolutionary / Revolutionary
step.

Evolutionary Plot For PC (Laptop):
Confidential

0
1
2
3
4
5
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
1
2
3
4
5
6
7
8
9
10
Twin Focus of Business Trends:
Internal Organization External Market

Current Business Model Maturity
Customer Expectation
Customer Purchase Focus
Process Thinking
System Robustness
MBP(Sim)
MBP(Var)
MBP(IncDiff)
Segmentation
Sense Interaction
TransparencyBoundary Breakdown
Controllability
Needs Hierarchy
Human Involvement
Interaction
Listening
Market Research
Dynamization
Vertical/Horizontal
Benchmarking the MasterFoods business model against best business
practice from a consumer-facing perspective:
MasterFoods
Iams

Competitor’s Our Product or Service Our Competitive Advantage
Product or Service
+
“Global Benchmarking”
Analysis can also can be conducted along the lines of
the Evolution of Business, IT & Software best practices

Examples: Business Evolutionary Trends
Demographics Findographics Psychographics Autopoeisis
Trial and Error Process Mapping Multiple Processes Process of
Processes

Overall Motel
Front Desk House-KeepingBack OfficeGuest Services
Hierarchical Breakdown:
Evolutionary Plots of the business, technology, processes, products and services
creates an Innovation Roadmap for the Business Unit

Infancy Rapid growth Maturity
Decline
Benefit-to-cost
Time
Technology Innovation: S-curve
Make it work
Maximize efficiency
Minimize cost
Prove idea
Next-generation

Special Case: System Revival
Possible reasons:
• New technology/material emerging
• New situation

Example: History of Armor
Defense
effectiveness
Time
Police Anti-riot
Attire

Example: History of the Shield
Defense
effectiveness
Time

Example: Sailing Ships
Effectiveness (distance,
speed, capacity)
Time

1st Stage of the S-Curve: Indicators and
Recommendations
Indicators
New system, not yet on market.
Components from other systems, rather than custom components.
Integrates with supersystem elements. The new system must change or adapt to the supersystem.
Consumes resources not intended for it.
Number and magnitude of system modifications increase and then decrease almost to zero (like
Darwin's Law – only the strongest systems win).
System integrates with leading alternative systems.
Recommendations
One should work with existing infrastructure and resources.
It makes sense to integrate the ES with systems that are leading at the moment.
Main efforts should be concentrated on identifying and eliminating bottlenecks that prevent the
system from entering the market.
A forecast for supersystem development is required for systems that are in the 1st stage of evolution.
Profound changes in system composition and in composition of its components (up to switching to
another principle of operation) are admissible.
It makes sense to develop the system with the intention of using it in one specific field - where the
ratio of its advantages and disadvantages is the most acceptable.
It is necessary to analyze physical and supersystem limitations of development with the aim of finding
out the degree of promise of an ES.

2nd Stage of S-Curve: Indicators and
Recommendations
Indicators
Has not reached its development limits.
There are a number of potential niches.
Spreads to many areas.
Differentiation among different system types grows.
Uses existing supporting systems.
Linear relationship between improvements made and resources required.
Differences between system generations increases, then decreases almost to zero.
System begins to consume resources customized for it.
Recommendations
It makes sense to solve problems by adapting the system to new fields of application.
It is possible to focus on compromises and solutions aimed at limiting disadvantages,
without eliminating them entirely.
It is possible to utilize specially adapted resources of the supersystem.
Moderate-degree changes should be introduced to the system design and the design
of system components (without changing their principles of operation).

3rd Stage of S-Curve: Indicators and
Recommendations
Indicators
Has reached some development limits.
Development is limited by contradictions.
Is used in many areas.
Combines with alternative systems.
Acquires new functions not correlated with the main function.
A number of systems exist to support the system.
Improving functionality requires a disproportionate amount of resources.
System generations differ mainly by design and service functions.
Recommendations
For the near and moderately distant future, one should be solving problems aimed at
reducing costs, developing service sub-systems, and improving design.
For the distant future, one should try to switch to another principle of operation for the
ES or its components, which resolves contradictions hindering further development
(overcoming limits).
Deep trimming, integration of alternative systems, and other techniques of transition to
the supersystem are highly effective.

4th Stage of S-Curve: Indicators and
Recommendations
Indicators
Forced out by more effective systems, which reach the 2nd stage of evolution.
Supersystem changes reduce the need for the system.
Supersystem changes make the existence of the system difficult – for example, resources needed by
the system disappear.
Continues to function only in highly specialized fields.
Profitability decreases.
Moves into the category of souvenirs, decorative objects, antiques, and so on.
Begins to be used for entertainment; moves to the category of toys.
Moves to the category of sports apparatus.
Recommendations
For the near future, one should be solving problems aimed at reducing costs, developing service sub-
systems, and improve design.
For the moderately distant future, one should look for fields in which the system would still remain
competitive.
For the distant future, one should try to switch to another principle of operation (for the ES or its
components) which resolves contradictions hindering further development (limits overcoming).
Deep trimming, integration of alternative systems, and other techniques of transition to the
supersystem are highly effective.

Resources for Students
Systematic Innovation Website: If you tell them that I sent you, you
can get a 5% discount
http://www.systematic-innovation.com/Products/products01.htm

Systematic Innovation Website: If you tell them that I sent you, you
can get 5% discount

Systematic Innovation Website: If you tell them I sent you, you can get
a 5% off the price

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