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Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research
               and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                   Vol. 2, Issue 5, September- October 2012, pp.308-314

                   A Novel Fast Acting PI based DSTATCOM
                     1
                         Anil Kumar Baddipudi, 2Chintapally Archana
                                              1
                                                Assistant Professor
                            Department of Electrical and Electronics Engineering,
                                  S.V.C.E, Tirupathi, Chitoor (Dt), A.P, India.
                                              2
                                                Assistant Professor
                             Department of Electrical & Electronics Engineering,
          Viswa Bharathi Institute of Technology and Sciences, Nadargul,Rangareddy(Dt), A.P, India.



Abstract-
         The instantaneous response of the                         The shunt-connected custom power device,
distribution static compensator (DSTATCOM) is            called the DSTATCOM, injects current at the point
very important while compensating rapidly                of common coupling (PCC) so that harmonic
varying balanced, unbalanced and nonlinear               filtering, power factor correction, and load
loads. Any change in the load affects the dc-link        balancing can be achieved. The DSTATCOM
voltage directly. The proper operation of                consists of a current-controlled voltage-source
DSTATCOM requires variation of the dc-link               inverter (VSI) which injects current at the PCC
voltage     within    the    prescribed     limits.      through the interface inductor. The operation of VSI
Conventionally, a proportional-integral (PI)             is supported by a dc storage capacitor with proper dc
controller is used to maintain the dc-link voltage       voltage across it. One important aspect of the
to the reference value. It uses deviation of the         compensation is the extraction of reference currents.
capacitor voltage from its reference value as its        Various control algorithms are available to compute
input. However, the transient response of the            the reference compensator currents. However,
conventional PI dc-link voltage controller is slow.      instantaneous symmetrical component theory is
In this paper, a fast-acting dc-link voltage             preferred. Based on this algorithm, the compensator
controller based on the energy of a dc-link              reference currents are given as follows:
capacitor is proposed. Mathematical equations                              𝑉𝑠𝑎 + 𝛾 𝑉𝑠𝑏 − 𝑉𝑠𝑐
                                                              𝑖 ∗ = 𝑖 𝑙𝑎 −
                                                                𝑓𝑎                       2     𝑃𝑙𝑎𝑣𝑔 + 𝑃 𝑑𝑐
are given to compute the gains of the                                           𝑖=𝑎,𝑏,𝑐 𝑉𝑠𝑖
conventional controller based on fast-acting dc-
link voltage controllers to achieve similar fast                            𝑉𝑠𝑏 + 𝛾 𝑉𝑠𝑐 − 𝑉𝑠𝑎
transient response. The detailed simulations are             𝑖 ∗ = 𝑖 𝑙𝑏 −
                                                               𝑓𝑏                         2     𝑃𝑙𝑎𝑣𝑔 + 𝑃 𝑑𝑐
                                                                                 𝑖=𝑎,𝑏,𝑐 𝑉𝑠𝑖
carried out on MATLAB environment to validate
the proposed controller.
                                                                            𝑉𝑠𝑐 + 𝛾 𝑉𝑠𝑎 − 𝑉𝑠𝑏
                                                             𝑖 ∗ = 𝑖 𝑙𝑐 −
                                                               𝑓𝑐                          2  (𝑃𝑙𝑎𝑣𝑔 + 𝑃 𝑑𝑐 )
Keywords-      DC-link      voltage     controller,                               𝑖=𝑎,𝑏,𝑐 𝑉𝑠𝑖
DSTATCOM, fast transient response, THD, load
compensation, power factor, power quality (PQ),                   where γ = tan φ / √3, and φ is the desired
unbalance, voltage-source inverter (VSI),                phase angle between the supply voltages and
Proportional-Integral     (PI)    control,   CHB         compensated source currents in the respective
multilevel inverter, D-Q reference frame theory.         phases. The term Plavg is the dc or average value of
                                                         the load power. The term Pdc accounts for the losses
 I.      INTRODUCTION                                    in the VSI without any dc loads in its dc link. To
         The proliferation of power-electronics-         generate Pdc, a suitable closed-loop dc-link voltage
based equipment, nonlinear and unbalanced loads,         controller should be used, which will regulate the dc
has aggravated the power-quality (PQ) problems in        voltage to the reference value. The transient
the power distribution network. They cause               performance of the compensator is decided by the
excessive neutral currents, overheating of electrical    computation time of average load power and losses
apparatus, poor power factor, voltage distortion,        in the compensator. In most DSTATCOM
high levels of neutral-to-ground voltage, and            applications, losses in the VSI are a fraction of the
interference with communication systems [1], [2].        average load power. Therefore, the transient
The literature says that the evolution of different      performance of the compensator mostly depends on
custom power devices to mitigate the above power-        the computation of Plavg. In this paper, Plavg is
quality problems by injecting voltages/currents or       computed by using a moving average filter (MAF)
both into the system [3]–[6].                            to ensure fast dynamic response. The settling time of
                                                         the MAF is a half-cycle period in case of odd



                                                                                                 308 | P a g e
Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research
               and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                   Vol. 2, Issue 5, September- October 2012, pp.308-314

harmonics and one cycle period in case of even            magnitude of the D-STATCOM output voltages
harmonics presence in voltages and currents.              allows effective control of active and reactive power
Although the computation of Pdc is generally slow         exchanges between the DSTATCOM and the ac
and updated once or twice in a cycle, being a small       system. Such configuration allows the device to
value compared Plavg to, it does not play a significant   absorb or generate controllable active and reactive
role in transient performance of the compensator. In      power.
some applications, such as the telecommunications
industry uses several parallel-connected switch-
mode rectifiers to support dc bus voltage. Such an
arrangement draws nonlinear load currents from the
utility. This causes poor power factor and, hence,
more losses and less efficiency. Clearly, there are
PQ issues, such as unbalance, poor power factor,
and harmonics produced by telecom equipment in
power distribution networks. Therefore, the
functionalities of the conventional DSTATCOM                Figure –         1      Schematic       Diagram   of   a
should be increased to mitigate the aforementioned        DSTATCOM
PQ problems and to supply the dc loads from its dc
link as well. The load sharing by the ac and dc bus           The VSC connected in shunt with the ac system
depends upon the design and the rating of the VSI.        provides a multifunctional topology which can be
Here, there are two important issues. The first one is    used for up to three quite distinct purposes:
the regulation of the dc-link voltage within              1. Voltage regulation and compensation of reactive
prescribed limits under transient load conditions.        power;
The second one is the settling time of the dc–link        2. Correction of power factor
voltage controller. Conventionally, a PI controller is    3. Elimination of current harmonics.
used to maintain the dc-link voltage. It uses the         Here, such device is employed to provide
deviation of the capacitor voltage from its reference     continuous voltage regulation using an indirectly
value as its input. However, the transient response       controlled converter. As shown in Figure-1 the
of the conventional dc-link voltage controllers is        shunt injected current Ish corrects the voltage sag by
slow, especially in applications where the load           adjusting the voltage drop across the system
changes rapidly. In this paper, a fast-acting dc-link     impedance Zth. The value of Ish can be controlled by
voltage controller based on the dc-link capacitor         adjusting the output voltage of the converter. The
energy is proposed. The detailed modeling and             shunt injected current Ish can be written as,
simulation verifications are carried out by using
MATLAB environment to prove the efficacy of this          Ish = IL – IS = IL – ( Vth – VL ) / Zth
fast-acting dc-link voltage controller. There is no                  (1)
systematic procedure to design the gains of the
conventional PI controller used to regulate the dc-       Ish /η = IL / θ     (2)
link voltage of the DSTATCOM. But some,
mathematical equations are given to design the gains      The complex power injection of the D-STATCOM
of the conventional controller based on the fast-         can be expressed as,
acting dc-link voltage controllers to achieve similar
fast transient response.                                  Ssh = VL Ish*       (3)

 II.DESIGN OF             MULTILEVEL          BASED                 It may be mentioned that the effectiveness
DSTATCOM                                                  of the DSTATCOM in correcting voltage sag
A. Principle of DSTATCOM                                  depends on the value of Zth or fault level of the load
                                                          bus. When the shunt injected current Ish is kept in
          A D-STATCOM (Distribution Static                quadrature with VL, the desired voltage correction
Compensator), which is schematically depicted in          can be achieved without injecting any active power
Figure-1, consists of a two-level Voltage Source          into the system. On the other hand, when the value
Converter (VSC), a dc energy storage device, a            of Ish is minimized, the same voltage correction can
coupling transformer connected in shunt to the            be achieved with minimum apparent power injection
distribution network through a coupling transformer.      into the system.
The VSC converts the dc voltage across the storage
device into a set of three-phase ac output voltages.      B. Control for Harmonics Compensation
These voltages are in phase and coupled with the ac                The Modified Synchronous Frame method
system through the reactance of the coupling              called the instantaneous current component (id-iq)
transformer. Suitable adjustment of the phase and         method that is similar to the Synchronous Reference



                                                                                                      309 | P a g e
Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research
               and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                   Vol. 2, Issue 5, September- October 2012, pp.308-314

Frame theory (SRF) method. The transformation               control problems. The control signal from PID
angle is now obtained with the voltages of the ac           controller to regulate dc link voltage is expressed as
network. The major difference is that, due to voltage       Uc = Kp (Vdc ref – Vdc) + 𝐾 𝑖       𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 𝑑𝑡 +
harmonics and imbalance, the speed of the reference          𝐾 𝑑 𝑑/𝑑𝑡(𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 )            (7)
frame is no longer constant. It varies instantaneously
depending of the waveform of the 3-phase voltage                      In (7), Kp, Ki and Kd are proportional,
system. In this method the compensating currents            integral, and derivative gains of the PID controller,
are obtained from the instantaneous active and              respectively. The proportional term provides overall
reactive current components of the nonlinear load.          control action proportional to the error signal. An
In the same way, the mains voltages V (a,b,c) and           increase in proportional controller gain (Kp) reduces
the available currents il (a,b,c) in α-β components         rise time and steady-state error but increases the
must be calculated as given by (4), where C is              overshoot and settling time. An increase in integral
Clarke Transformation Matrix. However, the load             gain (Ki) reduces steady state error but increases
current components are derived from a SRF based             overshoot and settling time. Increasing derivative
on the Park transformation, where „θ‟ represents the        gain (Kd) will lead to improved stability. However,
instantaneous voltage vector angle (5).                     practitioners have often found that the derivative
                                                            term can behave against anticipatory action in case
               𝐼 𝑙𝑎
 𝐼 𝑙𝛼                                                       of transport delay. A cumbersome trial-and-error
               𝐼 𝑙𝑏
 𝐼 𝑙𝛽 =   𝐶                              (4)                method to tune its parameters made many
               𝐼 𝑙𝑐                                         practitioners switch off or even exclude the
                                                            derivative term. Therefore, the description of
𝐼 𝑙𝑑    𝑐𝑜𝑠𝜃          𝑠𝑖𝑛𝜃   𝐼 𝑙𝛼                𝑉𝛽
                                            −1              conventional and the proposed fast-acting dc-link
𝐼 𝑙𝑞 = −𝑠𝑖𝑛𝜃          𝑐𝑜𝑠𝜃   𝐼 𝑙𝛽 , 𝜃 = 𝑡𝑎𝑛      𝑉𝛼
                                                      (5)
                                                            voltage controllers using PI controllers are given in
                                                            the following subsections.

                                                            A. Conventional DC-Link Voltage Controller
                                                                     The conventional PI controller used for
                                                            maintaining the dc-link voltage is shown in figure-6.
                                                            To maintain the dc-link voltage at the reference
                                                            value, the dc-link capacitor needs a certain amount
                                                            of real power, which is proportional to the
                                                            difference between the actual and reference
                                                            voltages. The power required by the capacitor can
Figure-2 Block diagram of SRF method                        be expressed as follows:
                                                            Pdc = Kp (Vdc ref – Vdc) + 𝐾 𝑖       𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 𝑑𝑡
         Figure-2 shows the block diagram SRF                        (8)
method. Under balanced and sinusoidal voltage
conditions angle θ is a uniformly increasing function
of time. This transformation angle is sensitive to
voltage harmonics and unbalance; therefore dθ/dt
may not be constant over a mains period. With
transformation given below the direct voltage
component .

III. DC-LINK VOLTAGE CONTROLLERS                            Figure-6 Schematic diagram of the conventional dc-
         The sudden removal of load would result in         link voltage controller
an increase in the dc-link voltage above the
reference value, whereas a sudden increase in load
would reduce the dc-link voltage below its reference
value. As mentioned before, the source supplies an
unbalanced nonlinear ac load directly and a dc load
through the dc link of the DSTATCOM, as shown in
figure-1. Due to transients on the load side, the dc
bus voltage is significantly affected. To regulate this     Figure-7 Schematic diagram of the fast-acting dc-
dc-link voltage, closed-loop controllers are used.          link voltage controller
The proportional-integral-derivative (PID) control
provides a generic and efficient solution to many                  The dc-link capacitor has slow dynamics
                                                            compared to the compensator, since the capacitor



                                                                                                    310 | P a g e
Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research
                        and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                            Vol. 2, Issue 5, September- October 2012, pp.308-314

         voltage is sampled at every zero crossing of phase          gain is selected, integral gain is tuned around and
         supply voltage. The sampling can also be performed          chosen to be 0.5. It is found that if Kie is greater than
         at a quarter cycles depending upon the symmetry of          Kpe / 2, the response tends to be oscillatory and if Kie
         the dc-link voltage waveform. The drawback of this          is less than Kpe / 2, then response tends to be
         conventional controller is that its transient response      sluggish. Hence, Kie is chosen to be Kpe / 2.
         is slow, especially for fast-changing loads. Also, the
         design of PI controller parameters is quite difficult            IV. DESIGN OF CONVENTIONAL
         for a complex system and, hence, these parameters           CONTROLLER BASED ON THE FAST-
         are chosen by trial and error. Moreover, the dynamic        ACTING      DC-LINK     VOLTAGE
         response during the transients is totally dependent         CONTROLLER
         on the values of Kp, and Ki, when Pdc is comparable                    The conventional dc-link voltage controller
         to Plavg.                                                   can be designed based on equations given for the
                                                                     fast-acting dc-link voltage controller as in (11) and
         B. Fast-Acting DC Link Voltage Controller                   can be written as
                  To overcome the disadvantages of the
                                                                      𝑃 𝑑𝑐 = 𝐾 𝑝𝑒 𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 +
         aforementioned controller, an energy-based dc-link
         voltage controller is proposed. The energy required          𝐾 𝑖𝑒   𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 𝑑𝑡      (13)
         by the dc-link capacitor (Wdc) to charge from actual
         voltage (Vdc) to the reference value (Vdc ref) can be         It can also be written as
         computed as                                                𝑃 𝑑𝑐 = 𝐾 ′𝑝 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 + 𝐾 𝑖′               𝑉 𝑑𝑐   𝑟𝑒𝑓   − 𝑉 𝑑𝑐 𝑑𝑡 (14)
         Wdc = ½ Cdc (𝑉 2 𝑟𝑒𝑓 − 𝑉 2 )
                        𝑑𝑐        𝑑𝑐         (9)                       Where
                                                                        𝐾 ′𝑝 = 𝐾 𝑝𝑒 (𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐 )                                   (15)
         In general, the dc-link capacitor voltage has ripples          𝐾 𝑖′ = 𝐾 𝑖𝑒 (𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐                                    (16)
         with double frequency, that of the supply frequency.
         The dc power (Pdc) required by the dc-link capacitor        It is observed from the aforementioned equations
         is given as                                                 that the gains of proportional and integral controllers
                 𝑊       1
          𝑃′𝑑𝑐 = 𝑇 𝑑𝑐 = 2𝑇 𝐶 𝑑𝑐 (𝑉 2 𝑟𝑒𝑓 − 𝑉 2 ) (10)
                                   𝑑𝑐        𝑑𝑐                      vary with respect to time. However, for small
                  𝑐        𝑐
                                                                     ripples in the dc-link voltage, Vdc ≈ Vdc ref, therefore,
         where Tc is the ripple period of the dc-link capacitor      we can approximate the above gains to the
                                                                     following
         voltage. However, due to the lack of integral term,
         there is a steady-state error while compensating the         𝐾 ′𝑝 ≈ 2𝐾 𝑝𝑒 𝑉 𝑑𝑐 𝑟𝑒𝑓
         combined ac and dc loads. This is eliminated by
         including an integral term. The input to this               The relations give approximate gains for a
         controller is the error between the squares of              conventional PI controller. This is due to the fact
         reference and the actual capacitor voltages. This           that Vdc ref + Vdc is not really equal to 2Vdc ref until
         controller is shown in figure-7 and the total dc            variation in Vdc is small during transients. Hence,
         power required by the dc-link capacitor is computed         the designed conventional PI controller works only
         as follows:                                                 on approximation. The open-loop gains for the two
                                                                                                               𝐾 ′
Pdc = Kpe (𝑉 2 𝑟𝑒𝑓 − 𝑉 2 ) + 𝐾 𝑖𝑒
             𝑑𝑐        𝑑𝑐           𝑉 2 𝑟𝑒𝑓 − 𝑉 2 𝑑𝑡 (11)
                                      𝑑𝑐        𝑑𝑐                                                    𝐾 ′𝑝 (𝑠+ ′ 𝑖 )
                                                                                                                𝐾𝑝
                                                                                           𝑃 𝑑𝑐
                                                                     cases are given by           =
                                                                                            𝐸𝑟              𝑠
         The coefficients Kpe and Kie are the proportional and                                                   𝐾1
                                                                                                                  𝑖
         integral gains of the proposed energy-based dc-link         where Er = Vdc ref - Vdc. Since             𝐾1
                                                                                                                       is the same as Kie /
                                                                                                                  𝑝
         voltage controller. As an energy-based controller, it       Kpe, the higher gain in the conventional PI controller
         gives fast response compared to the conventional PI         renders less stability than that of the proposed
         controller. Thus, it can be called a fast acting dc-link    energy-based dc-link controller. For nearly the same
         voltage controller. The ease in the calculation of the      performance, the conventional PI controller has
         proportional and integral gains is an additional            gains which are 364 (40/0.11 from Table-III) times
         advantage. The value of the proportional controller         larger than that of that proposed one. Also, the
         gain (Kpe) can be given as                                  amplifier units used to realize these gains need more
                                                                     design considerations and are likely to saturate when
         Kpe = Cdc / 2Tc                       (12)                  used with higher gains.

         For example, if the value of dc-link capacitor is
         2200 μF and the capacitor voltage ripple period as
         0.01 s, then Kpe is computed as 0.11 by using (12).
         The selection of Kie depends upon the tradeoff
         between the transient response and overshoot in the
         compensated source current. Once this proportional



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Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research
               and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                   Vol. 2, Issue 5, September- October 2012, pp.308-314

TABLE -III: SIMULATION PARAMETERS




     V. SELECTION OF THE DC-LINK
                                                                 Figure-8 Matlab/Simulink power circuit
CAPACITOR                                                model of DSTATCOM
          The value of the dc-link capacitor can be
selected based on its ability to regulate the voltage             Figure-9 shows the three phase source
under transient conditions.                              voltages, three phase source currents and load
Let us assume that the compensator in Fig. 1 is          currents respectively without DSTATCOM. It is
connected to                                             clear that without DSTATCOM load current and
a system with the rating of X kilovolt amperes. The      source currents are same.
energy of the system is given by X x 1000 J/s. Let
us further assume that the compensator deals with
half (i.e.X/2) and twice (i.e., 2X) capacity under the
transient conditions for cycles with the system
voltage period of Ts. Then, the change in energy to
be dealt with by the dc capacitor is given as
ΔE = (2X – X/2) nT                    (21)

Now this change in energy (21) should be supported
by the energy stored in the dc capacitor. Let us
allow the dc capacitor to change its total dc-link
voltage from 1.4 Vm to 1.8 Vm during the transient
conditions where Vm is the peak value of phase
voltage. Hence, we can write
½ Cdc [(1.8Vm)2 – (1.4Vm)2] = (2X – X/2) nT (22)         Figure-9 Source voltage, current and load current
which implies that                                       without DSTATCOM
            3𝑋𝑛𝑇
Cdc = (1.8𝑉 )2 −(1.4𝑉 )2           (23)                           Figure-10 shows the three phase source
          𝑚        𝑚
                                                         voltages, three phase source currents and load
For example, consider a 10-kVA system (i.e., X =         currents respectively with DSTATCOM. It is clear
10 kVA), system peak voltage Vm = 325.2 V, n =           that with DSTATCOM even though load current is
0.5, and T = 0.02 s. The value of Cdc computed           non sinusoidal source currents are sinusoidal.
using (23) is 2216 μF. Practically, 2000 μF is
readily available and the same value has been taken
for simulation and experimental studies.

IV  MATLAB/SIMULINK             MODELING         AND
SIMULATION RESULTS
         Figure-8 shows the Matab/Simulink power
circuit model of DSTATCOM. It consists of five
blocks named as source block, non linear load
block, control block, APF block and measurements
block. The system parameters for simulation study
are source voltage of 11kv, 50hz AC supply, DC bus       Figure-10 Source voltage, current and load current
capacitance 1550e-6 F, Inverter series inductance 10     with DSTATCOM
mH, Source resistance of 0.1 ohm and inductance of
0.9 mH. Load resistance and inductance are chosen                 Figure-11 shows the DC bus voltage. The
as 30mH and 60 ohms respectively.                        DC bus voltage is regulated to 11kv by using PI
                                                         regulator.


                                                                                             312 | P a g e
Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research
               and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                   Vol. 2, Issue 5, September- October 2012, pp.308-314




                                                       Figure-14 Harmonic spectrum of Phase-A Source
                                                       current without DSTATCOM
                                                       Figure-15 shows the harmonic spectrum of Phase –
                                                       A Source current with DSTATCOM. The THD of
         Figure-11 DC Bus Voltage with PI              source current without DSTACOM is 5.05%
controller




                                                       Figure-15 Harmonic spectrum of Phase-A Source
                                                       current with DSTATCOM

                                                         VI CONCLUSION
         Figure-12 DC Bus Voltage with fast PI                   A new control scheme which maintains the
controller                                             power balance at the PCC to regulate the DC
                                                       capacitor voltages is proposed. A new PI control
         Figure-12 shows the DC bus voltage with       scheme has been implemented to control the VSI
fast PI controller. Form the figure it is clear that   used in the D-STATCOM. The DC link voltage of
with fast PI controller DC link voltage controlled     the DSTATCOM has been regulated to the reference
with less time.                                        DC      link voltage under           varying loads.
                                                       Matlab/Simulink base model is developed and
         Figure-13 shows the phase-A source            simulation results are presented. From the results,
voltage and current, even though the load is non       the transient response by the conventional controller
linear RL load the source power factor is unity.       and ts= 0.24sec for DC link voltage, where the
                                                       transient response by using fast acting DC link
                                                       controller is ts=0.12sec for voltage. Finally, it is
                                                       concluded that by fast acting DC-link control the
                                                       settling time for DC link capacitor is reduced.

                                                                References
                                                         [1]    K.A Corzine, and Y.L Familiant, “A New
                                                                Cascaded Multi-level H-Bridge Drive,”
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current                                                         pp.125-131. Jan 2002.
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Figure-14 shows the harmonic spectrum of Phase –                converters – A new bread of converters,
A Source current without DSTATCOM. The THD                      ”IEEE Trans. Ind.Appli., vol.32, no.3,
of source current without DSTACOM is 36.89%.                    pp.509-517. May/ Jun. 1996.
                                                         [3]    T.A.Maynard, M.Fadel and N.Aouda,
                                                                “Modelling of multilevel converter,” IEEE
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                                                                Jun.1997.
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Fast Acting PI Controller Improves DSTATCOM Transient Response

  • 1. Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 5, September- October 2012, pp.308-314 A Novel Fast Acting PI based DSTATCOM 1 Anil Kumar Baddipudi, 2Chintapally Archana 1 Assistant Professor Department of Electrical and Electronics Engineering, S.V.C.E, Tirupathi, Chitoor (Dt), A.P, India. 2 Assistant Professor Department of Electrical & Electronics Engineering, Viswa Bharathi Institute of Technology and Sciences, Nadargul,Rangareddy(Dt), A.P, India. Abstract- The instantaneous response of the The shunt-connected custom power device, distribution static compensator (DSTATCOM) is called the DSTATCOM, injects current at the point very important while compensating rapidly of common coupling (PCC) so that harmonic varying balanced, unbalanced and nonlinear filtering, power factor correction, and load loads. Any change in the load affects the dc-link balancing can be achieved. The DSTATCOM voltage directly. The proper operation of consists of a current-controlled voltage-source DSTATCOM requires variation of the dc-link inverter (VSI) which injects current at the PCC voltage within the prescribed limits. through the interface inductor. The operation of VSI Conventionally, a proportional-integral (PI) is supported by a dc storage capacitor with proper dc controller is used to maintain the dc-link voltage voltage across it. One important aspect of the to the reference value. It uses deviation of the compensation is the extraction of reference currents. capacitor voltage from its reference value as its Various control algorithms are available to compute input. However, the transient response of the the reference compensator currents. However, conventional PI dc-link voltage controller is slow. instantaneous symmetrical component theory is In this paper, a fast-acting dc-link voltage preferred. Based on this algorithm, the compensator controller based on the energy of a dc-link reference currents are given as follows: capacitor is proposed. Mathematical equations 𝑉𝑠𝑎 + 𝛾 𝑉𝑠𝑏 − 𝑉𝑠𝑐 𝑖 ∗ = 𝑖 𝑙𝑎 − 𝑓𝑎 2 𝑃𝑙𝑎𝑣𝑔 + 𝑃 𝑑𝑐 are given to compute the gains of the 𝑖=𝑎,𝑏,𝑐 𝑉𝑠𝑖 conventional controller based on fast-acting dc- link voltage controllers to achieve similar fast 𝑉𝑠𝑏 + 𝛾 𝑉𝑠𝑐 − 𝑉𝑠𝑎 transient response. The detailed simulations are 𝑖 ∗ = 𝑖 𝑙𝑏 − 𝑓𝑏 2 𝑃𝑙𝑎𝑣𝑔 + 𝑃 𝑑𝑐 𝑖=𝑎,𝑏,𝑐 𝑉𝑠𝑖 carried out on MATLAB environment to validate the proposed controller. 𝑉𝑠𝑐 + 𝛾 𝑉𝑠𝑎 − 𝑉𝑠𝑏 𝑖 ∗ = 𝑖 𝑙𝑐 − 𝑓𝑐 2 (𝑃𝑙𝑎𝑣𝑔 + 𝑃 𝑑𝑐 ) Keywords- DC-link voltage controller, 𝑖=𝑎,𝑏,𝑐 𝑉𝑠𝑖 DSTATCOM, fast transient response, THD, load compensation, power factor, power quality (PQ), where γ = tan φ / √3, and φ is the desired unbalance, voltage-source inverter (VSI), phase angle between the supply voltages and Proportional-Integral (PI) control, CHB compensated source currents in the respective multilevel inverter, D-Q reference frame theory. phases. The term Plavg is the dc or average value of the load power. The term Pdc accounts for the losses I. INTRODUCTION in the VSI without any dc loads in its dc link. To The proliferation of power-electronics- generate Pdc, a suitable closed-loop dc-link voltage based equipment, nonlinear and unbalanced loads, controller should be used, which will regulate the dc has aggravated the power-quality (PQ) problems in voltage to the reference value. The transient the power distribution network. They cause performance of the compensator is decided by the excessive neutral currents, overheating of electrical computation time of average load power and losses apparatus, poor power factor, voltage distortion, in the compensator. In most DSTATCOM high levels of neutral-to-ground voltage, and applications, losses in the VSI are a fraction of the interference with communication systems [1], [2]. average load power. Therefore, the transient The literature says that the evolution of different performance of the compensator mostly depends on custom power devices to mitigate the above power- the computation of Plavg. In this paper, Plavg is quality problems by injecting voltages/currents or computed by using a moving average filter (MAF) both into the system [3]–[6]. to ensure fast dynamic response. The settling time of the MAF is a half-cycle period in case of odd 308 | P a g e
  • 2. Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 5, September- October 2012, pp.308-314 harmonics and one cycle period in case of even magnitude of the D-STATCOM output voltages harmonics presence in voltages and currents. allows effective control of active and reactive power Although the computation of Pdc is generally slow exchanges between the DSTATCOM and the ac and updated once or twice in a cycle, being a small system. Such configuration allows the device to value compared Plavg to, it does not play a significant absorb or generate controllable active and reactive role in transient performance of the compensator. In power. some applications, such as the telecommunications industry uses several parallel-connected switch- mode rectifiers to support dc bus voltage. Such an arrangement draws nonlinear load currents from the utility. This causes poor power factor and, hence, more losses and less efficiency. Clearly, there are PQ issues, such as unbalance, poor power factor, and harmonics produced by telecom equipment in power distribution networks. Therefore, the functionalities of the conventional DSTATCOM Figure – 1 Schematic Diagram of a should be increased to mitigate the aforementioned DSTATCOM PQ problems and to supply the dc loads from its dc link as well. The load sharing by the ac and dc bus The VSC connected in shunt with the ac system depends upon the design and the rating of the VSI. provides a multifunctional topology which can be Here, there are two important issues. The first one is used for up to three quite distinct purposes: the regulation of the dc-link voltage within 1. Voltage regulation and compensation of reactive prescribed limits under transient load conditions. power; The second one is the settling time of the dc–link 2. Correction of power factor voltage controller. Conventionally, a PI controller is 3. Elimination of current harmonics. used to maintain the dc-link voltage. It uses the Here, such device is employed to provide deviation of the capacitor voltage from its reference continuous voltage regulation using an indirectly value as its input. However, the transient response controlled converter. As shown in Figure-1 the of the conventional dc-link voltage controllers is shunt injected current Ish corrects the voltage sag by slow, especially in applications where the load adjusting the voltage drop across the system changes rapidly. In this paper, a fast-acting dc-link impedance Zth. The value of Ish can be controlled by voltage controller based on the dc-link capacitor adjusting the output voltage of the converter. The energy is proposed. The detailed modeling and shunt injected current Ish can be written as, simulation verifications are carried out by using MATLAB environment to prove the efficacy of this Ish = IL – IS = IL – ( Vth – VL ) / Zth fast-acting dc-link voltage controller. There is no (1) systematic procedure to design the gains of the conventional PI controller used to regulate the dc- Ish /η = IL / θ (2) link voltage of the DSTATCOM. But some, mathematical equations are given to design the gains The complex power injection of the D-STATCOM of the conventional controller based on the fast- can be expressed as, acting dc-link voltage controllers to achieve similar fast transient response. Ssh = VL Ish* (3) II.DESIGN OF MULTILEVEL BASED It may be mentioned that the effectiveness DSTATCOM of the DSTATCOM in correcting voltage sag A. Principle of DSTATCOM depends on the value of Zth or fault level of the load bus. When the shunt injected current Ish is kept in A D-STATCOM (Distribution Static quadrature with VL, the desired voltage correction Compensator), which is schematically depicted in can be achieved without injecting any active power Figure-1, consists of a two-level Voltage Source into the system. On the other hand, when the value Converter (VSC), a dc energy storage device, a of Ish is minimized, the same voltage correction can coupling transformer connected in shunt to the be achieved with minimum apparent power injection distribution network through a coupling transformer. into the system. The VSC converts the dc voltage across the storage device into a set of three-phase ac output voltages. B. Control for Harmonics Compensation These voltages are in phase and coupled with the ac The Modified Synchronous Frame method system through the reactance of the coupling called the instantaneous current component (id-iq) transformer. Suitable adjustment of the phase and method that is similar to the Synchronous Reference 309 | P a g e
  • 3. Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 5, September- October 2012, pp.308-314 Frame theory (SRF) method. The transformation control problems. The control signal from PID angle is now obtained with the voltages of the ac controller to regulate dc link voltage is expressed as network. The major difference is that, due to voltage Uc = Kp (Vdc ref – Vdc) + 𝐾 𝑖 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 𝑑𝑡 + harmonics and imbalance, the speed of the reference 𝐾 𝑑 𝑑/𝑑𝑡(𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 ) (7) frame is no longer constant. It varies instantaneously depending of the waveform of the 3-phase voltage In (7), Kp, Ki and Kd are proportional, system. In this method the compensating currents integral, and derivative gains of the PID controller, are obtained from the instantaneous active and respectively. The proportional term provides overall reactive current components of the nonlinear load. control action proportional to the error signal. An In the same way, the mains voltages V (a,b,c) and increase in proportional controller gain (Kp) reduces the available currents il (a,b,c) in α-β components rise time and steady-state error but increases the must be calculated as given by (4), where C is overshoot and settling time. An increase in integral Clarke Transformation Matrix. However, the load gain (Ki) reduces steady state error but increases current components are derived from a SRF based overshoot and settling time. Increasing derivative on the Park transformation, where „θ‟ represents the gain (Kd) will lead to improved stability. However, instantaneous voltage vector angle (5). practitioners have often found that the derivative term can behave against anticipatory action in case 𝐼 𝑙𝑎 𝐼 𝑙𝛼 of transport delay. A cumbersome trial-and-error 𝐼 𝑙𝑏 𝐼 𝑙𝛽 = 𝐶 (4) method to tune its parameters made many 𝐼 𝑙𝑐 practitioners switch off or even exclude the derivative term. Therefore, the description of 𝐼 𝑙𝑑 𝑐𝑜𝑠𝜃 𝑠𝑖𝑛𝜃 𝐼 𝑙𝛼 𝑉𝛽 −1 conventional and the proposed fast-acting dc-link 𝐼 𝑙𝑞 = −𝑠𝑖𝑛𝜃 𝑐𝑜𝑠𝜃 𝐼 𝑙𝛽 , 𝜃 = 𝑡𝑎𝑛 𝑉𝛼 (5) voltage controllers using PI controllers are given in the following subsections. A. Conventional DC-Link Voltage Controller The conventional PI controller used for maintaining the dc-link voltage is shown in figure-6. To maintain the dc-link voltage at the reference value, the dc-link capacitor needs a certain amount of real power, which is proportional to the difference between the actual and reference voltages. The power required by the capacitor can Figure-2 Block diagram of SRF method be expressed as follows: Pdc = Kp (Vdc ref – Vdc) + 𝐾 𝑖 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 𝑑𝑡 Figure-2 shows the block diagram SRF (8) method. Under balanced and sinusoidal voltage conditions angle θ is a uniformly increasing function of time. This transformation angle is sensitive to voltage harmonics and unbalance; therefore dθ/dt may not be constant over a mains period. With transformation given below the direct voltage component . III. DC-LINK VOLTAGE CONTROLLERS Figure-6 Schematic diagram of the conventional dc- The sudden removal of load would result in link voltage controller an increase in the dc-link voltage above the reference value, whereas a sudden increase in load would reduce the dc-link voltage below its reference value. As mentioned before, the source supplies an unbalanced nonlinear ac load directly and a dc load through the dc link of the DSTATCOM, as shown in figure-1. Due to transients on the load side, the dc bus voltage is significantly affected. To regulate this Figure-7 Schematic diagram of the fast-acting dc- dc-link voltage, closed-loop controllers are used. link voltage controller The proportional-integral-derivative (PID) control provides a generic and efficient solution to many The dc-link capacitor has slow dynamics compared to the compensator, since the capacitor 310 | P a g e
  • 4. Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 5, September- October 2012, pp.308-314 voltage is sampled at every zero crossing of phase gain is selected, integral gain is tuned around and supply voltage. The sampling can also be performed chosen to be 0.5. It is found that if Kie is greater than at a quarter cycles depending upon the symmetry of Kpe / 2, the response tends to be oscillatory and if Kie the dc-link voltage waveform. The drawback of this is less than Kpe / 2, then response tends to be conventional controller is that its transient response sluggish. Hence, Kie is chosen to be Kpe / 2. is slow, especially for fast-changing loads. Also, the design of PI controller parameters is quite difficult IV. DESIGN OF CONVENTIONAL for a complex system and, hence, these parameters CONTROLLER BASED ON THE FAST- are chosen by trial and error. Moreover, the dynamic ACTING DC-LINK VOLTAGE response during the transients is totally dependent CONTROLLER on the values of Kp, and Ki, when Pdc is comparable The conventional dc-link voltage controller to Plavg. can be designed based on equations given for the fast-acting dc-link voltage controller as in (11) and B. Fast-Acting DC Link Voltage Controller can be written as To overcome the disadvantages of the 𝑃 𝑑𝑐 = 𝐾 𝑝𝑒 𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 + aforementioned controller, an energy-based dc-link voltage controller is proposed. The energy required 𝐾 𝑖𝑒 𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 𝑑𝑡 (13) by the dc-link capacitor (Wdc) to charge from actual voltage (Vdc) to the reference value (Vdc ref) can be It can also be written as computed as 𝑃 𝑑𝑐 = 𝐾 ′𝑝 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 + 𝐾 𝑖′ 𝑉 𝑑𝑐 𝑟𝑒𝑓 − 𝑉 𝑑𝑐 𝑑𝑡 (14) Wdc = ½ Cdc (𝑉 2 𝑟𝑒𝑓 − 𝑉 2 ) 𝑑𝑐 𝑑𝑐 (9) Where 𝐾 ′𝑝 = 𝐾 𝑝𝑒 (𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐 ) (15) In general, the dc-link capacitor voltage has ripples 𝐾 𝑖′ = 𝐾 𝑖𝑒 (𝑉 𝑑𝑐 𝑟𝑒𝑓 + 𝑉 𝑑𝑐 (16) with double frequency, that of the supply frequency. The dc power (Pdc) required by the dc-link capacitor It is observed from the aforementioned equations is given as that the gains of proportional and integral controllers 𝑊 1 𝑃′𝑑𝑐 = 𝑇 𝑑𝑐 = 2𝑇 𝐶 𝑑𝑐 (𝑉 2 𝑟𝑒𝑓 − 𝑉 2 ) (10) 𝑑𝑐 𝑑𝑐 vary with respect to time. However, for small 𝑐 𝑐 ripples in the dc-link voltage, Vdc ≈ Vdc ref, therefore, where Tc is the ripple period of the dc-link capacitor we can approximate the above gains to the following voltage. However, due to the lack of integral term, there is a steady-state error while compensating the 𝐾 ′𝑝 ≈ 2𝐾 𝑝𝑒 𝑉 𝑑𝑐 𝑟𝑒𝑓 combined ac and dc loads. This is eliminated by including an integral term. The input to this The relations give approximate gains for a controller is the error between the squares of conventional PI controller. This is due to the fact reference and the actual capacitor voltages. This that Vdc ref + Vdc is not really equal to 2Vdc ref until controller is shown in figure-7 and the total dc variation in Vdc is small during transients. Hence, power required by the dc-link capacitor is computed the designed conventional PI controller works only as follows: on approximation. The open-loop gains for the two 𝐾 ′ Pdc = Kpe (𝑉 2 𝑟𝑒𝑓 − 𝑉 2 ) + 𝐾 𝑖𝑒 𝑑𝑐 𝑑𝑐 𝑉 2 𝑟𝑒𝑓 − 𝑉 2 𝑑𝑡 (11) 𝑑𝑐 𝑑𝑐 𝐾 ′𝑝 (𝑠+ ′ 𝑖 ) 𝐾𝑝 𝑃 𝑑𝑐 cases are given by = 𝐸𝑟 𝑠 The coefficients Kpe and Kie are the proportional and 𝐾1 𝑖 integral gains of the proposed energy-based dc-link where Er = Vdc ref - Vdc. Since 𝐾1 is the same as Kie / 𝑝 voltage controller. As an energy-based controller, it Kpe, the higher gain in the conventional PI controller gives fast response compared to the conventional PI renders less stability than that of the proposed controller. Thus, it can be called a fast acting dc-link energy-based dc-link controller. For nearly the same voltage controller. The ease in the calculation of the performance, the conventional PI controller has proportional and integral gains is an additional gains which are 364 (40/0.11 from Table-III) times advantage. The value of the proportional controller larger than that of that proposed one. Also, the gain (Kpe) can be given as amplifier units used to realize these gains need more design considerations and are likely to saturate when Kpe = Cdc / 2Tc (12) used with higher gains. For example, if the value of dc-link capacitor is 2200 μF and the capacitor voltage ripple period as 0.01 s, then Kpe is computed as 0.11 by using (12). The selection of Kie depends upon the tradeoff between the transient response and overshoot in the compensated source current. Once this proportional 311 | P a g e
  • 5. Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 5, September- October 2012, pp.308-314 TABLE -III: SIMULATION PARAMETERS V. SELECTION OF THE DC-LINK Figure-8 Matlab/Simulink power circuit CAPACITOR model of DSTATCOM The value of the dc-link capacitor can be selected based on its ability to regulate the voltage Figure-9 shows the three phase source under transient conditions. voltages, three phase source currents and load Let us assume that the compensator in Fig. 1 is currents respectively without DSTATCOM. It is connected to clear that without DSTATCOM load current and a system with the rating of X kilovolt amperes. The source currents are same. energy of the system is given by X x 1000 J/s. Let us further assume that the compensator deals with half (i.e.X/2) and twice (i.e., 2X) capacity under the transient conditions for cycles with the system voltage period of Ts. Then, the change in energy to be dealt with by the dc capacitor is given as ΔE = (2X – X/2) nT (21) Now this change in energy (21) should be supported by the energy stored in the dc capacitor. Let us allow the dc capacitor to change its total dc-link voltage from 1.4 Vm to 1.8 Vm during the transient conditions where Vm is the peak value of phase voltage. Hence, we can write ½ Cdc [(1.8Vm)2 – (1.4Vm)2] = (2X – X/2) nT (22) Figure-9 Source voltage, current and load current which implies that without DSTATCOM 3𝑋𝑛𝑇 Cdc = (1.8𝑉 )2 −(1.4𝑉 )2 (23) Figure-10 shows the three phase source 𝑚 𝑚 voltages, three phase source currents and load For example, consider a 10-kVA system (i.e., X = currents respectively with DSTATCOM. It is clear 10 kVA), system peak voltage Vm = 325.2 V, n = that with DSTATCOM even though load current is 0.5, and T = 0.02 s. The value of Cdc computed non sinusoidal source currents are sinusoidal. using (23) is 2216 μF. Practically, 2000 μF is readily available and the same value has been taken for simulation and experimental studies. IV MATLAB/SIMULINK MODELING AND SIMULATION RESULTS Figure-8 shows the Matab/Simulink power circuit model of DSTATCOM. It consists of five blocks named as source block, non linear load block, control block, APF block and measurements block. The system parameters for simulation study are source voltage of 11kv, 50hz AC supply, DC bus Figure-10 Source voltage, current and load current capacitance 1550e-6 F, Inverter series inductance 10 with DSTATCOM mH, Source resistance of 0.1 ohm and inductance of 0.9 mH. Load resistance and inductance are chosen Figure-11 shows the DC bus voltage. The as 30mH and 60 ohms respectively. DC bus voltage is regulated to 11kv by using PI regulator. 312 | P a g e
  • 6. Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 5, September- October 2012, pp.308-314 Figure-14 Harmonic spectrum of Phase-A Source current without DSTATCOM Figure-15 shows the harmonic spectrum of Phase – A Source current with DSTATCOM. The THD of Figure-11 DC Bus Voltage with PI source current without DSTACOM is 5.05% controller Figure-15 Harmonic spectrum of Phase-A Source current with DSTATCOM VI CONCLUSION Figure-12 DC Bus Voltage with fast PI A new control scheme which maintains the controller power balance at the PCC to regulate the DC capacitor voltages is proposed. A new PI control Figure-12 shows the DC bus voltage with scheme has been implemented to control the VSI fast PI controller. Form the figure it is clear that used in the D-STATCOM. The DC link voltage of with fast PI controller DC link voltage controlled the DSTATCOM has been regulated to the reference with less time. DC link voltage under varying loads. Matlab/Simulink base model is developed and Figure-13 shows the phase-A source simulation results are presented. From the results, voltage and current, even though the load is non the transient response by the conventional controller linear RL load the source power factor is unity. and ts= 0.24sec for DC link voltage, where the transient response by using fast acting DC link controller is ts=0.12sec for voltage. Finally, it is concluded that by fast acting DC-link control the settling time for DC link capacitor is reduced. References [1] K.A Corzine, and Y.L Familiant, “A New Cascaded Multi-level H-Bridge Drive,” Figure-13 Phase-A source voltage and IEEE Trans. Power.Electron., vol.17, no.1, current pp.125-131. Jan 2002. [2] J.S.Lai, and F.Z.Peng “Multilevel Figure-14 shows the harmonic spectrum of Phase – converters – A new bread of converters, A Source current without DSTATCOM. The THD ”IEEE Trans. Ind.Appli., vol.32, no.3, of source current without DSTACOM is 36.89%. pp.509-517. May/ Jun. 1996. [3] T.A.Maynard, M.Fadel and N.Aouda, “Modelling of multilevel converter,” IEEE Trans. Ind.Electron., vol.44, pp.356-364. Jun.1997. [4] P.Bhagwat, and V.R.Stefanovic, “Generalized structure of a multilevel 313 | P a g e
  • 7. Anil Kumar Baddipudi, Chintapally Archana / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 5, September- October 2012, pp.308-314 PWM Inverter,” IEEE Trans. Ind. Appln, Vol.1A-19, no.6, pp.1057-1069, Nov./Dec..1983. [5] J.Rodriguez, Jih-sheng Lai, and F Zheng peng, “Multilevel Inverters; A Survey of Topologies, Controls, and Applications,” IEEE Trans. Ind. Electron., vol.49 , no4., pp.724-738. Aug.2002. [6] Roozbeh Naderi, and Abdolreza rahmati, “Phase-shifted carrier PWM technique for general cascaded inverters,” IEEE Trans. Power.Electron., vol.23, no.3, pp.1257- 1269. May.2008. [7] Bhim Singh, Kamal AlHaddad & Ambrish Chandra, 1999, A Review of Active Filter for Power Quality Improvements, IEEE Trans on Industrial Electronics, 46(5), pp.960970 [8] Mauricio Angulo, Pablo Lezana, Samir Kouro, Jos´e Rodr´ıguez and Bin Wu,”Level-shifted PWM for Cascaded Multilevel Inverters with Even Power Distribution” IEEE Power Electronics specialist conference, 17-21 june 2007, pp.2373-2378. [9] B. P. McGrath and D. G. Holmes, “Multicarrier PWM strategies for multilevel inverters,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 858–867, August 2002. 314 | P a g e