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INTERNATIONAL JOURNAL OF ELECTRONICS AND 
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME 
COMMUNICATION  
ENGINEERING  TECHNOLOGY (IJECET) 
ISSN 0976 – 6464(Print) 
ISSN 0976 – 6472(Online) 
Volume 5, Issue 7, July (2014), pp. 09-14 
© IAEME: http://www.iaeme.com/IJECET.asp 
Journal Impact Factor (2014): 7.2836 (Calculated by GISI) 
	
	 
9 
 
IJECET 
© I A E M E 
BIG BANG-BIG CRUNCH ALGORITHM FOR MINIMIZING POWER 
CONSUMPTION BY EMBEDDED SYSTEMS 
John Wilson 
PG Scholar, Department of Electronics and Communication Engineering 
PSG College of Technology, Coimbatore, TN, India 
S. Sakthivel 
Associate professor, Department of Electrical Electronics Engineering 
V.R.S. College of Engineering and Technology, Villupuram, TN, India 
ABSTRACT 
The paper presents a nature inspired algorithm that copies the big bang theory of evolution. 
This algorithm is simple with regard to number of parameters. Embedded systems are powered by 
batteries and enhancing the operating time of the battery by reducing the power consumption is vital. 
Embedded systems consume power while accessing the memory during their operation. An efficient 
method for power management is proposed in this work. The proposed method, reduce the energy 
consumption in memories from 76% up to 98% as compared to other methods reported in the 
literature. 
1. INTRODUCTION 
Large number of optimization algorithms based of intelligence found in nature is developed 
over last few decades for solving real-world optimization problems. Among them, we have many 
heuristics like Simulated Annealing (SA) [1] and optimization algorithms that make use of social or 
evolutionary behaviors like Particle Swarm Optimization (PSO) [2]-[3]. SA and PSO are quite 
popular heuristics for solving complex optimization problems, but they have some strengths and 
limitations. 
Particle Swarm Optimization (PSO) is based on the social behavior of individuals living 
together in groups. Each individual tries to improve itself by observing other group members and 
imitating the better ones. This way, the group members are performing an optimization procedure 
which is described in [3]. The performance of the algorithm depends on how the particles move in 
the search space, given that the velocity is updated iteratively. Large research body is therefore
International Journal of Electronics and Communication Engineering  Technology (IJECET), ISSN 0976 – 
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME 
 
devoted to the analysis and proposal of different motion rules [4]-[6]. The PSO may sometimes 
experience premature convergence. Hybrid PSOs are proposed for overcoming this behavior.
10 
 
In this paper, we present a simple and easy to implement algorithm, called BB-BC, which 
exploits intuitively the feature of big bang theory. We also validate the strength of BB-BC algorithm 
in power consumption minimization in embedded systems memories. The algorithm reduce the 
energy consumption in memories from 76% up to 98% as compared to Tabu Search (TS). 
The rest of the paper is organized as follows. Section 2 introduces, briefly, BB-BC algorithm. 
In Section 3, the energy consumption problem is stated. In Section 4, BB-BC is used to solve the 
energy consumption problem in memory. In addition, simulation results are provided and compared 
with those of [7]. Conclusions and further research aspects are given in Section 5. 
2. BIG BANG–BIG CRUNCH (BB–BC) OPTIMIZATION ALGORITHM 
2.1 Overview 
This algorithm involves two phases in its searching mechanism, viz big bang phase and big 
crunch phase as explained below. 
2.1.1 Big Bang phase 
The BB–BC is a meta heuristic global optimization method and is developed by Erol and 
Eksin [8]. It involves two phases: The Big Bang phase and the Big Crunch phase. In the Big Bang 
phase, candidate solutions are randomly distributed over the search space. Randomness can be seen 
as equivalent to the energy dissipation in nature while convergence to a local or global optimum 
point can be viewed as gravitational attraction. Since energy dissipation creates disorder from 
ordered particles, we will use randomness as a transformation from a converged solution to the birth 
of totally new solution candidates. The creation of the initial population randomly is called the Big 
Bang phase. In this phase, the candidate solutions are spread all over the search space in a uniform 
manner. 
2.1.2 Big crunch phase 
The Big Bang phase is followed by the Big Crunch phase. The Big Crunch is a convergence 
operator that has many inputs but only one output, which is named as the ‘‘centre of mass”, since the 
only output has been derived by calculating the centre of mass [8]. The point representing the centre 
of mass that is denoted by Xc is calculated according to the following equation.
where Xi is a point within an D-dimensional search space generated, f(Xi) is a fitness function value 
of this point, NP is the population size in Big Bang phase. The convergence operator in the Big 
Crunch phase is different from ‘exaggerated’ selection since the output term may contain additional 
information (new candidate or member having different parameters than others) than the 
participating ones, hence differing from the population members. This one step convergence is 
superior compared to selecting two members and finding their centre of gravity. This method takes 
the population members as a whole in the Big Crunch phase that acts as a squeezing or contraction 
operator; and it, therefore, eliminates the necessity for two-by-two combination calculations.
International Journal of Electronics and Communication Engineering  Technology (IJECET), ISSN 0976 – 
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME 
 
11 
 
After the Big Crunch phase, the algorithm must create new members to be used as the Big 
Bang of the next iteration step. This can be done in various ways, the simplest one being jumping to 
the first step and creating an initial population. The algorithm will have no difference than random 
search method by so doing since latter iterations will not use the knowledge gained from the previous 
ones; hence, the convergence of such an algorithm will most probably be very low. In this work, the 
new candidates are generated around the centre of mass and knowledge of centre of mass of previous 
iteration is used for better convergence. The parameters to be supplied to normal random point 
generator are the centre of mass of the previous step and the standard deviation. The deviation term 
can be fixed, but decreasing its value along with the elapsed iterations produces better results. 
    
   
 
	 
where r is a normal random number,  is a parameter limiting the size of the search space, Xmax and 
Xmin are the upper and lower limits, and t is the iteration step. Since normally distributed numbers can 
be exceeding ±1, it is necessary to limit the population to the prescribed search space boundaries. 
This narrowing down restricts the candidate solutions into the search space boundaries. This BB-BC 
algorithm is similar to PSO in searching behavior. 
3. REDUCING MEMORY ENERGY CONSUMPTION IN EMBEDDED SYSTEMS 
3.1. Description of the Memory Problem. According to trends in [22], memory will become the 
major energy consumer in an embedded system. Indeed, embedded systems must integrate multiple 
complex functionalities which needs bigger battery and memory. Hence, reducing memory energy 
consumption of these systems has never been as topical. In this paper, we will focus on software 
techniques for the memory management. In order to reduce memory energy consumption, most 
authors rely on Scratch-Pad Memories (SPMs) rather than caches [23]. Although cache memory 
helps a lot with program speed, it is not the appropriate for most of the embedded systems. In fact, 
cache increases the system size and its energy cost (cache area plus managing logic). Like cache, 
SPM consists of small, fast SRAM. The main difference is that SPM is directly and explicitly 
managed at the software level, either by the developer or by the compiler which makes it more 
predictable. SPM requires up to 40% less energy and 34% less area than cache [24]. In this paper, we 
will therefore use an SPM in our memory architecture. Due to the reduced SPM size, we allocate 
space for interesting data only whereas, the remaining is placed in main memory (DRAM). In order 
to determine interesting data, we use data profiling to gather memory access frequency information. 
The Tabu Search (TS) approach consists of allocating space for data in SPM based on TS principles 
[25]. More details about how TS is implemented can be found in [11]. 
In order to compute energy cost of the system, we propose an energy consumption estimation 
model, for our memory architecture composed by an SPM, an instruction cache and a DRAM. 
Equation (3) gives the energy model where the three terms refer to the total energy consumed, 
respectively, in SPM, in instruction cache and in DRAM. 
   !    #$	 
In this model, we distinguish between the two cache write policies: Write-Through (WT) and 
Write-Back (WB). In a WT cache, every write to the cache causes a synchronous write to DRAM. 
Alternatively, in a WB cache, writes are not immediately mirrored to DRAM. Instead, the cache 
tracks which of its locations have been written over and then, it marks these locations as dirty. The 
data in these locations is written back to DRAM when that data is evicted from the cache [9]. In this
International Journal of Electronics and Communication Engineering  Technology (IJECET), ISSN 0976 – 
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME 
 
paper, the aim is to minimize the energy for the detailed estimation model presented as follows: 
12 
 
  % !   !#  % !   !'	 
Espmw Energy consumed during a writing into SPM. 
Nspmr Reading access number to SPM. 
Nspmw Writing access number to SPM. 
Eicr 
Energy consumed during a reading from instruction 
cache. 
Eicw 
Energy consumed during a writing into instruction 
cache. 
Nicr Reading access number to instruction cache. 
Nicw Writing access number to instruction cache. 
Edramr Energy consumed during a reading from DRAM. 
Edramw Energy consumed during a writing into DRAM. 
Ndramr Reading access number to DRAM. 
Ndramw Writing access number to DRAM. 
W Pi The considered cache write policy: WT or WB. In case 
of WT, W Pi = 1 else in case of WB then W Pi = 0. 
Dirty Bit used in case of WB to indicate during the 
DBik access k if the instruction cache line has been modified 
before (DBi = 1) or not (DBi = 0). 
hik 
Type of the access k to the instruction cache. In case of 
cache hit, hik = 1. In case of cache miss, hik = 0. 
As SPM has got a lot of advantages, it is clearly preferable to put asmuch data as possible in 
it. In other words, we must maximize terms Nspmr and Nspmw in the model. Hence, the problem 
becomes to maximize the number of accesses to the SPM. It is therefore a combinatorial 
optimization problem like knapsack problem [27]. We want to fill SPM that can hold a maximum 
capacity of C with some combination of data from a list of N possible data each with sizei and access 
numberi so that the access number of the data allocated into SPM is maximized. This problem has a 
single linear constraint, a linear objective function which sums the sizes of the data allocated into 
SPM, and the added restriction that each data will be in the SPM or not. If N is the total number of 
data, then a solution is just a finite sequence s of N terms such that s[n] is either 0 or the size of the 
nth data. s[n] = 0 if and only if the nth data is not selected in the solution. This solution must satisfy 
the constraint of not exceeding the maximum SPM capacity. 
4. EXPERIMENTAL RESULTS 
In order to compute the energy cost of studied memory architecture composed by an SPM, an 
instruction cache and a DRAM, we proposed an energy consumption estimation model which is 
explained in [11]. BB-BC algorithm and TS have been implemented. 
In experiments, 30 diffrent executions for each heuristic are performed and the best and 
average results obtained on these 30 executions are recorded. In this case, the best and the average 
solutions give similar results. Figure 1 shows that BB-BC achieves better performances than TS on 
energy savings. In fact, BB-BC heuristics consume from 76.23% (StatemateCE) to 98.92% (ShaCE) 
less energy than TS.

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  • 1. INTERNATIONAL JOURNAL OF ELECTRONICS AND International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME COMMUNICATION ENGINEERING TECHNOLOGY (IJECET) ISSN 0976 – 6464(Print) ISSN 0976 – 6472(Online) Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME: http://www.iaeme.com/IJECET.asp Journal Impact Factor (2014): 7.2836 (Calculated by GISI) 9 IJECET © I A E M E BIG BANG-BIG CRUNCH ALGORITHM FOR MINIMIZING POWER CONSUMPTION BY EMBEDDED SYSTEMS John Wilson PG Scholar, Department of Electronics and Communication Engineering PSG College of Technology, Coimbatore, TN, India S. Sakthivel Associate professor, Department of Electrical Electronics Engineering V.R.S. College of Engineering and Technology, Villupuram, TN, India ABSTRACT The paper presents a nature inspired algorithm that copies the big bang theory of evolution. This algorithm is simple with regard to number of parameters. Embedded systems are powered by batteries and enhancing the operating time of the battery by reducing the power consumption is vital. Embedded systems consume power while accessing the memory during their operation. An efficient method for power management is proposed in this work. The proposed method, reduce the energy consumption in memories from 76% up to 98% as compared to other methods reported in the literature. 1. INTRODUCTION Large number of optimization algorithms based of intelligence found in nature is developed over last few decades for solving real-world optimization problems. Among them, we have many heuristics like Simulated Annealing (SA) [1] and optimization algorithms that make use of social or evolutionary behaviors like Particle Swarm Optimization (PSO) [2]-[3]. SA and PSO are quite popular heuristics for solving complex optimization problems, but they have some strengths and limitations. Particle Swarm Optimization (PSO) is based on the social behavior of individuals living together in groups. Each individual tries to improve itself by observing other group members and imitating the better ones. This way, the group members are performing an optimization procedure which is described in [3]. The performance of the algorithm depends on how the particles move in the search space, given that the velocity is updated iteratively. Large research body is therefore
  • 2. International Journal of Electronics and Communication Engineering Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME devoted to the analysis and proposal of different motion rules [4]-[6]. The PSO may sometimes experience premature convergence. Hybrid PSOs are proposed for overcoming this behavior.
  • 3. 10 In this paper, we present a simple and easy to implement algorithm, called BB-BC, which exploits intuitively the feature of big bang theory. We also validate the strength of BB-BC algorithm in power consumption minimization in embedded systems memories. The algorithm reduce the energy consumption in memories from 76% up to 98% as compared to Tabu Search (TS). The rest of the paper is organized as follows. Section 2 introduces, briefly, BB-BC algorithm. In Section 3, the energy consumption problem is stated. In Section 4, BB-BC is used to solve the energy consumption problem in memory. In addition, simulation results are provided and compared with those of [7]. Conclusions and further research aspects are given in Section 5. 2. BIG BANG–BIG CRUNCH (BB–BC) OPTIMIZATION ALGORITHM 2.1 Overview This algorithm involves two phases in its searching mechanism, viz big bang phase and big crunch phase as explained below. 2.1.1 Big Bang phase The BB–BC is a meta heuristic global optimization method and is developed by Erol and Eksin [8]. It involves two phases: The Big Bang phase and the Big Crunch phase. In the Big Bang phase, candidate solutions are randomly distributed over the search space. Randomness can be seen as equivalent to the energy dissipation in nature while convergence to a local or global optimum point can be viewed as gravitational attraction. Since energy dissipation creates disorder from ordered particles, we will use randomness as a transformation from a converged solution to the birth of totally new solution candidates. The creation of the initial population randomly is called the Big Bang phase. In this phase, the candidate solutions are spread all over the search space in a uniform manner. 2.1.2 Big crunch phase The Big Bang phase is followed by the Big Crunch phase. The Big Crunch is a convergence operator that has many inputs but only one output, which is named as the ‘‘centre of mass”, since the only output has been derived by calculating the centre of mass [8]. The point representing the centre of mass that is denoted by Xc is calculated according to the following equation.
  • 4. where Xi is a point within an D-dimensional search space generated, f(Xi) is a fitness function value of this point, NP is the population size in Big Bang phase. The convergence operator in the Big Crunch phase is different from ‘exaggerated’ selection since the output term may contain additional information (new candidate or member having different parameters than others) than the participating ones, hence differing from the population members. This one step convergence is superior compared to selecting two members and finding their centre of gravity. This method takes the population members as a whole in the Big Crunch phase that acts as a squeezing or contraction operator; and it, therefore, eliminates the necessity for two-by-two combination calculations.
  • 5. International Journal of Electronics and Communication Engineering Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME 11 After the Big Crunch phase, the algorithm must create new members to be used as the Big Bang of the next iteration step. This can be done in various ways, the simplest one being jumping to the first step and creating an initial population. The algorithm will have no difference than random search method by so doing since latter iterations will not use the knowledge gained from the previous ones; hence, the convergence of such an algorithm will most probably be very low. In this work, the new candidates are generated around the centre of mass and knowledge of centre of mass of previous iteration is used for better convergence. The parameters to be supplied to normal random point generator are the centre of mass of the previous step and the standard deviation. The deviation term can be fixed, but decreasing its value along with the elapsed iterations produces better results. where r is a normal random number, is a parameter limiting the size of the search space, Xmax and Xmin are the upper and lower limits, and t is the iteration step. Since normally distributed numbers can be exceeding ±1, it is necessary to limit the population to the prescribed search space boundaries. This narrowing down restricts the candidate solutions into the search space boundaries. This BB-BC algorithm is similar to PSO in searching behavior. 3. REDUCING MEMORY ENERGY CONSUMPTION IN EMBEDDED SYSTEMS 3.1. Description of the Memory Problem. According to trends in [22], memory will become the major energy consumer in an embedded system. Indeed, embedded systems must integrate multiple complex functionalities which needs bigger battery and memory. Hence, reducing memory energy consumption of these systems has never been as topical. In this paper, we will focus on software techniques for the memory management. In order to reduce memory energy consumption, most authors rely on Scratch-Pad Memories (SPMs) rather than caches [23]. Although cache memory helps a lot with program speed, it is not the appropriate for most of the embedded systems. In fact, cache increases the system size and its energy cost (cache area plus managing logic). Like cache, SPM consists of small, fast SRAM. The main difference is that SPM is directly and explicitly managed at the software level, either by the developer or by the compiler which makes it more predictable. SPM requires up to 40% less energy and 34% less area than cache [24]. In this paper, we will therefore use an SPM in our memory architecture. Due to the reduced SPM size, we allocate space for interesting data only whereas, the remaining is placed in main memory (DRAM). In order to determine interesting data, we use data profiling to gather memory access frequency information. The Tabu Search (TS) approach consists of allocating space for data in SPM based on TS principles [25]. More details about how TS is implemented can be found in [11]. In order to compute energy cost of the system, we propose an energy consumption estimation model, for our memory architecture composed by an SPM, an instruction cache and a DRAM. Equation (3) gives the energy model where the three terms refer to the total energy consumed, respectively, in SPM, in instruction cache and in DRAM. ! #$ In this model, we distinguish between the two cache write policies: Write-Through (WT) and Write-Back (WB). In a WT cache, every write to the cache causes a synchronous write to DRAM. Alternatively, in a WB cache, writes are not immediately mirrored to DRAM. Instead, the cache tracks which of its locations have been written over and then, it marks these locations as dirty. The data in these locations is written back to DRAM when that data is evicted from the cache [9]. In this
  • 6. International Journal of Electronics and Communication Engineering Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME paper, the aim is to minimize the energy for the detailed estimation model presented as follows: 12 % ! !# % ! !' Espmw Energy consumed during a writing into SPM. Nspmr Reading access number to SPM. Nspmw Writing access number to SPM. Eicr Energy consumed during a reading from instruction cache. Eicw Energy consumed during a writing into instruction cache. Nicr Reading access number to instruction cache. Nicw Writing access number to instruction cache. Edramr Energy consumed during a reading from DRAM. Edramw Energy consumed during a writing into DRAM. Ndramr Reading access number to DRAM. Ndramw Writing access number to DRAM. W Pi The considered cache write policy: WT or WB. In case of WT, W Pi = 1 else in case of WB then W Pi = 0. Dirty Bit used in case of WB to indicate during the DBik access k if the instruction cache line has been modified before (DBi = 1) or not (DBi = 0). hik Type of the access k to the instruction cache. In case of cache hit, hik = 1. In case of cache miss, hik = 0. As SPM has got a lot of advantages, it is clearly preferable to put asmuch data as possible in it. In other words, we must maximize terms Nspmr and Nspmw in the model. Hence, the problem becomes to maximize the number of accesses to the SPM. It is therefore a combinatorial optimization problem like knapsack problem [27]. We want to fill SPM that can hold a maximum capacity of C with some combination of data from a list of N possible data each with sizei and access numberi so that the access number of the data allocated into SPM is maximized. This problem has a single linear constraint, a linear objective function which sums the sizes of the data allocated into SPM, and the added restriction that each data will be in the SPM or not. If N is the total number of data, then a solution is just a finite sequence s of N terms such that s[n] is either 0 or the size of the nth data. s[n] = 0 if and only if the nth data is not selected in the solution. This solution must satisfy the constraint of not exceeding the maximum SPM capacity. 4. EXPERIMENTAL RESULTS In order to compute the energy cost of studied memory architecture composed by an SPM, an instruction cache and a DRAM, we proposed an energy consumption estimation model which is explained in [11]. BB-BC algorithm and TS have been implemented. In experiments, 30 diffrent executions for each heuristic are performed and the best and average results obtained on these 30 executions are recorded. In this case, the best and the average solutions give similar results. Figure 1 shows that BB-BC achieves better performances than TS on energy savings. In fact, BB-BC heuristics consume from 76.23% (StatemateCE) to 98.92% (ShaCE) less energy than TS.
  • 7. International Journal of Electronics and Communication Engineering Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME Figure 1: Comparison of power consumption minimization by TS and BB-BC algorithms 13 5. CONCLUSIONS In this paper, we have designed a nature inspired algorithm, the BB-BC that copies mechanism of the big bang theory. The proposed method minimizes the power consumption of embedded systems considerably when compared to the tabu search annealing algorithm. The method discussed here is highly useful for operation of embedded systems. In total, the problem of reducing energy consumption in embedded systems memories, it has been shown that BB-BC performs well in terms of accuracy, convergence rate, stability and robustness. REFERENCES [1] M. Locatelli, “Simulated annealing algorithms for continuous global optimization,” in Handbook of Global Optimization, P. M. Pardalos and H. E. Romeijn, Eds., vol. 2, pp. 179–230, Kluwer Academic, 2001. [2] M. Pant, R. Thangaraj, and A. Abraham, “Particle swarm based metaheuristics for function optimization and engi-neering applications,” in Proceedings of the 7th Computer Information Systems and Industrial Management Applications (CISIM ’08), vol. 7, pp. 84–90, IEEE Computer Society, Washington, DC, USA, 2008. [3] J. Kennedy and C. E. Russell, “Swarm intelligence,” in Morgan Kaufmann, Academic Press, 2001. [4] A. M. Marco, T. Stutzle¨ et al., “Convergence behavior of the fully informed particle swarm optimization algorithm,” in Proceedings of the 10th Annual Conference on Genetic and Evolutionary Computation (GECCO ’08), pp. 71–78, 2008. [5] A. P. Engelbrecht, Fundamentals of Computational Swarm Intelligence, John Wiley Sons, 2005. [6] R. Poli, J. Kennedy, and T. Blackwell, “Particle swarm opti-mization. An overview,” in Swarm Intelligence, vol. 1, pp. 33– 57, 2007.
  • 8. International Journal of Electronics and Communication Engineering Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 7, July (2014), pp. 09-14 © IAEME 14 [7] M. I. Aouad, R. Schott, and O. Zendra, “A tabu search heuristic for scratch-pad memory management,” in Proceedings of the International Conference on Software Engineering and Technology (ICSET ’10), vol. 64, pp. 386–390, WASET, Rome, Italy, 2010. [8] K. Erol Osman, Ibrahim Eksin, “New optimization method : Big Bang-Big Crunch”, Elsevier, Advances in Engineering Software 37 (2006), pp. 106–111. [9] S. Kirkpatrick, C. D. Gelatt Jr., and M. P. Vecchi, “Optimiza-tion by simulated annealing,” Science, vol. 220, no. 4598, pp. 671–680, 1983. [10] J. Kennedy and R. C. Eberhart, “Particle swarm optimization,” in Proceedings of the IEEE International Conference on Neural Networks, pp. 1942–1948, IEEE Computer Society, 1995. [11] Y. Shi and R. C. Eberhart, “A modified particle swarm optimizer,” in Proceedings of the IEEE Congress on Evolutionary Computation (CEC ’98), pp. 69–73, IEEE Computer Society, 1998. [12] Y. Shi and R. C. Eberhart, “Empirical study of particle swarm optimization,” in Proceedings of the Congress on Evolutionary Computation (CEC ’99), pp. 1945–1950, 1999. [13] W. J. Xia and Z. M. Wu, “A hybrid particle swarm optimization approach for the job-shop scheduling problem,” International Journal of Advanced Manufacturing Technology, vol. 29, no. 3-4, pp. 360–366, 2006. [14] D. Chaojun and Z. Qiu, “Particle swarm optimization algo-rithm based on the idea of simulated annealing,” International Journal of Computer Science and Network Security, vol. 6, no. 10, pp. 152–157, 2006. [15] L. Fang, P. Chen, and S. Liu, “Particle swarm optimization with simulated annealing for tsp,” in Proceedings of the 6th WSEAS International Conference on Artificial Intelligence, Knowledge Engineering and Data Bases (AIKED ’07), pp. 206– 210, World Scientific and Engineering Academy and Society (WSEAS), Stevens Point, Wis, USA, 2007. [16] X. Wang and J. Li, “Hybrid particle swarm optimization with simulated annealing,” in Proceedings of the 3rd International Conference on Machine Learning and Cybernetics (ICMLC ’04), vol. 4, pp. 2402–2405, 2004. [17] S. Kirkpatrick, “Optimization by simulated annealing: quanti-tative studies,” Journal of Statistical Physics, vol. 34, no. 5-6, pp. 975–986, 1984. [18] L. Morten, K. R. Thomas, and T. Krink, Hybrid Particle Swarm Optimization with Breeding and Subpopulations, Springer, Berlin, Germany, 2000. [19] “ITRS, System Drivers,” 2007, http://www.itrs.net/Links/ 2007ITRS/2007 Chapters/2007 SystemDrivers.pdf . [20] M. I. Aouad and O. Zendra, “A survey of scratch-pad memory management techniques for low-power and -energy,” in Proceedings of the 2nd ECOOP Workshop on Implementation, Compilation, Optimization of Object-Oriented Languages, Programs and Systems (ICOOOLPS ’07), pp. 31–38, Berlin, Germany, 2007. [21] B. Fradj, A. El Ouardighi, C. Belleudy, and M. Auguin, “Energy aware memory architecture configuration,” SI-GARCH Computer Architecture News, vol. 33, no. 3, pp. 3–9, 2005. [22] M. Gendreau, An Introduction to Tabu Search, vol. 57, Kluwer Academic, Boston, Mass, USA, 2003. [23] A. Tanenbaum, Architecture de l’ordinateur, 5th edition, 2005. [24] U. P. H. Kellerer and D. Pisinger, Knapsack Problems, Springer, Berlin, Germany, 2004. [25] “Benchmarks,” http://www.loria.fr/ıidrissma/benchs.zip. [26] Cheshta Jain, Dr. H.K. Verma and Dr. L.D. Arya, “Determination of Controller Gains for Frequency Control Based on Modified Big Bang-Big Crunch Technique Accounting the Effect of AVR”, International Journal of Electrical Engineering Technology (IJEET), Volume 3, Issue 3, 2012, pp. 52 - 62, ISSN Print: 0976-6545, ISSN Online: 0976-6553.