1. 職場經驗分享
Sharing the Working
Experience
ASIC • IP • AND BEYOND
March 2005
Frank Cheng 鄭順發
International Business Operations /
Field Marketing Development
frankcheng@faraday-tech.com
frankcheng@faraday-

2. Contents
 Self Introduction
 Sharing in Working Experience
 Job Opportunities
 Open Discussion
2

3. Contents
 Self Introduction
 Sharing in Working Experience
 Job Opportunities
 Open Discussion
3

4. Self Introduction - I
 Graduated from 電子資訊研究所 in 1996
- 甲組
 Live in HsinChu
 Married with 2 sons
 Career history
 1st job in SRRC 同步輻射研究中心 (1996/7-1997/7) - 1yr
 2nd job in ITRI’s 量測中心 (1997/7-1999/6) - 2yrs
 3rd job in AMIC (1999/6-2000/2) -.75yr
聯笙電子
 4th job in Faraday 智原科技 (2000/2 ~ ) - 5yr
4

5. Self Introduction - II
 SRRC 同步輻射研究中心 (1996/7~1997/7)
 Division: 注射器組
 Maintained the Booster(加速環) 設備
 Power system
 Electronic controlling system
 Maintain Work Station and Setup Website
 Why did I work for SRRC??? ????
 Higher salary $$$$$
 A stabile job $$$$$
 To be a civil servant
 Why did I quit this job???
lost ~1/3
 Radiation
 A bit too stable
5

6. Self Introduction - III
 ITRI 量測中心 (1997/7 ~1999/6)
 Division: 超音波部
 Digital system designer for Ultrasonic Diagnostic System
 Developed the controller of whole system and system platform
 Built up the FPGA design flow (Actel) and Interfaced the ASIC house.
 Developed the Nebulizer（霧化器) product
 Why did I work for ITRI???
 Trend in biological medicinal engineering
 A good opportunity because the whole division would be spun off
from ITRI.
 A good training environment, Graduate student alike
 Why did I quit this job???
 Manager did not want to spin off
 Get back to IC design field
6

7. Self Introduction - IV
 AMIC (1999/6 ~2000/2)
 Division: Consumer Product
 Developed the 8 bit uP based audio decompression chip
 Why did I work for AMIC???
 IC design trend for acoustic recognition
 Recall the IC design capability
 Economic Issues
 Why did I quit this job???
 主管操守有問題……..
7

8. Self Introduction - V
About Faraday
 Core Technology Division
 Responsible for MIPS-clone CPU implementation and migration
in different process.
 Companion IP designer
 SIS – ARM Service Center
 Transferring ARM’s framework of SoC technology to Faraday
 Built up the ARM developing flow in Faraday
 Customer service and promotion for ARM core based ASIC
8

9. Self Introduction - V
 IP Service Development
 Post-Sales for 8bit uP (80xx), 32bit processor core such as ARM
core, MIPS-clone core and Companion IP
 Pre-Sales for SoC based IP and Related Platform
 OBD (Overseas Business Department)
 Responsible for Overseas ASIC/IP project
 Responsible for the development of SoCreative! Platform
9

10. Self Introduction - V
 IBO國際營運中心 – Field Marketing Development
 Research in Strategy Marketing
 Come out the new product plan and then
 Research in specific topic for subsidiary company
 Technical supporting for Faraday’s customer in Europe, Japan
and USA
 SoC based ASIC project cooking
 Product Promotion
 Resource backup
10

11. Contents
 Self Introduction
 Sharing in Working Experience
 Job Opportunities
 Open Discussion
11

12. My Personal Opinions – I
 Job Position
未來
現在 ＝
..我真的是RD ..我還是RD
立志：我要做RD
工作資歷的累積 - 影響未來
滾石不生苔 –頻換工作
專業設計能力
Project Project CTO
RD
Leader Manager
? Years
? Years ? Years
12

13. My Personal Opinions – II
 Job Position
未來
現在 ＝
我還是RD????
立志：我要做RD
FAE Promotion
RD Marketing
(Post-Sales) (Pre-Sales)
Digital
Design
$$$$
13

14. My Personal Opinions – III
 Job Outlook
- Your Target -
$$$$$ VS. 工作
不要幻想在科學園區就能賺大錢
不是每一個人都在 聯發科技
工作靠實力,賺錢靠運氣
能力好 ＋公司營運好 ＝＄＄＄＄＄＄＄（機會＋運氣）
能力不好 ＋公司營運好 ＝＄＄＄＄＄＄ （運氣）
能力好 ＋公司營運不好＝＄＄ （找機會）
能力不好 ＋公司營運不好＝＄ (????, 向上努力吧!)
14

15. My Personal Opinions – IV
 你即使離職了，公司………還是活得好好的……… ^_^
 拋開本位主義
Marketing/Sales
RD/Project Leader
1. 為何Sales老是接一些奇怪的案子? 1. 公司業績不好, 老板催訂單
2. 接案子 - 沒問題
2. Sales 只出一張嘴？ Design 有 Bug - 沒關係
Bug 無解,Re-design- 沒辦法
3. 產品Delay一下有啥關係? 3. Schedule Delay
錢收了, Time-to-Market (?)
15

16. My Personal Opinions – V
 坐這山  望那山
 他都沒做什麼事?
 Sales – 尊嚴, 客戶財務結構, 業績……
 Designer – 研發, Schedule 壓力
 Ｍarketing – 市場分析, 產品決策
 Service 人員沒啥技術能力?
 罰站, 被罵, 向客戶賠不是……
 總機小姐甜美的聲音……….客戶也會時常問候 ……… ^.^
公司會賺錢 : 研發,銷售, 客服
大家努力而成，絕非個人
16

17. Suggestions
–
 肯定自我/他人工作價值 工作愉快，相處融洽
–
 積極主動 多做未必是錯，機會在將來
–
 廣結善緣 圈子很小，到處是熟人
–
 溝通能力 各式各樣職務
– Global Company
 語文能力
(D-Link, BenQ, Acer, Foxconn, TSMC, UMC, ..) => CEO is Italian.
 國際觀
 Customer from Great China, Europe, Korea, Japan, USA
 Competitor in WW
 Business in WW
 No Time Lag for Internal Business EUP <- TWN -> USA
01:00 09:00 17:00
17

18. Contents
 Self Introduction
 Sharing Working Experience
 Job Opportunities
 Open Discussion
18

19. Job Opportunities
 Head Count : 2 for Field Marketing
 Strategize, Conceive, Research RISC CPU and SOC Related
Product Plan
 Technical promotion, support on platform-based SoC design
 Needed Background
 Major in EE or Computer Engineering
 Experience in IC/SOC Integration, IP Technology or Chip-Set
Design (at least 4 years)
Frank Cheng 鄭順發, 03-5787888 ext. 8606
frankcheng@faraday-tech.com
19

20. Q&A
Thank You!
20

21. Faraday: at a Glance
 Spun off from UMC in 1993
 UMC owns 20%+ of Faraday
 UMC & Faraday still share same chairman
 Strategic IP partnership
 Fabless ASIC and IP provider
 Solid business model of 45% GM, 25% net, 30%+ CAGR
 Diversified customers & markets
 Listed in Taiwan exchange in 1999
 Today’s operation
 500+ employees worldwide, 330+ in R&D
21

22. Contact Faraday www.faraday-tech.com
Faraday USA Faraday Netherlands Faraday Japan Faraday China Faraday Taiwan (HQ)
Amsterdam Tokyo Shanghai Hsinchu & Taipei
Sunnyvale, CA
TEL: + 31.23.56.20496 TEL: + 81.3.5214.0070 TEL: + 86.21.6406.7523 TEL: + 886.3.5787888
TEL: +1. 408.522.8888
sales@faraday-tech.com eusales@faraday-tech.com sales@faraday-tech.com sales@faraday-tech.com.cn sales@faraday-tech.com
22

23. Financial Achievements
2004 revenue:
110.8 Million USD
$155M
4,000
35%+ CAGR since
‘97
3,500
CAGR = 37.68%
3,000
2,500
Million NTD
2,000
1,500
1,000
500
0
1997 1998 1999 2000 2001 2002 2003
23

24. Faraday Offers
ASIC Design Services, SoC Design Services, Proven IP
Solutions
ASIC Front-End ASIC Back-End
IP
Mask Tooling
Architecture Specifications
Libraries / Memories
Behavior Modeling
Wafer Manufacturing Services
RTL Code Generation
Microprocessors
IC Packaging Services
Synthesis
Gate Level Verification
Circuit Probing & Final Testing
Digital / Analog
Test Pattern Generation
Reliability Test Services
Physical Implementation
Platform Product Engineering
Post Layout Verification
System-on-a-Chip
24

25. ASIC Infrastructure & Expertise
 More than 100 people in ASIC Technology
 ASIC implementation, testing, yield, and FA (70)
 Design methodology & integration (35)
 Production planning, logistic, and quality (25)
 10 years of experience on average
 More than $50M invested in infrastructure
 eRD, ERP, Testers, ESD machine, die/wafer bank
 Complete integration of R&D, FIN, customer project, and production
shipment
 More than 200 project tape-outs in ’04 alone
 40% test chips
 10% in 0.13um, including four customer ASICs
25

26. 2003 Sales Breakdown (2-1)
By application
Image Others
5.1% 2.1%
Video/Display
10.0%
Peripheral
31.2%
Consumer
13.8%
Communication
11.0%
Storage
26.8%
PS: Ex-IP sales revenue
26

27. 2003 Sales Breakdown (2-2)
By customer type By geography
Europe
IDM
Others 0.9% Korea
2.3% China
1.4%
0.8%
Foundry
Japan2.6%
Design House
6.8% 55.6% 4.1% Taiwan
65.3%
System House
33.9%
USA
`
`
26.3%
27

28. Technology
Roadmaps
ASIC • IP • AND BEYOND

29. Cell Library Roadmap
＊
65nm 65nm SP
＊
＊
90nm LL-Rvt / Low-K
＊ ＊
90nm 90nm SP-Rvt / Low-K
＊ ＊
90nm LL-Hvt / Low-K
＊
130nm L130E SP / FSG
130nm
0.15µm 0.15µm SP＊
2004-07 10 2005-01 4 7 10 2006-01 4 7 10 2007-01
Note: The right edge of each block denotes
＊
Legend Description：Rvt： Regular Threshold Voltage
the IP’s formal release date. For more details,
Hvt： High Threshold Voltage
please visit our website at:
SP ： Standard Performance
www. faraday-tech. com
LL ： Low Leakage
29

30. Memory Compiler Roadmap
＊
65nm SP
65nm
＊
＊
90nm LL-Rvt / Low-K
＊
90nm SP-Svt / FSG
90nm ＊
90nm SP-Svt / Low-K
＊ ＊
90nm SP-Hvt / Low-K
＊
130m L130E HS / FSG
130nm
130nm L130E Fusion / FSG
＊
130nm L130E SP / FSG
＊
130nm L130E LL / FSG
0.15µm ＊
0.15µm SP
2004-07 10 2005-01 4 7 10 2006-01 4 7 10 2007-01
＊
Legend Description：Rvt：Regular Threshold Voltage Note: The right edge of each block
HS： High Speed denotes the IP’s formal release date. For
Hvt：High Threshold Voltage more details, please visit our website at:
SP ：Standard Performance
www. faraday-tech. com
LL：Low Leakage
30

31. Analog Essential IP Roadmap
＊
90nmSP / FSG 1GHz PLL
90nm
＊
130nm HS / FSG 400MHz PLL ＊
90nm SP / FSG 2GHz PLL
130nm
＊
130nm HS / FSG 1GHz PLL
＊
0.15µm
130nm HS / FSG 1.6GHz PLL
0.15µm 1.5V 300MHz PLL
＊
0.18µm
130nm HS / FSG MiniPLL
PLL
0.18µm GII MiniPLL
0.25µm
90nm REG
130nm REG
0.18µm REG
REG
0.35µm
0.15µm REG
130nm BG
0.18µm GII POR
POR / BG 0.15µm POR
90nm BG
＊
＊
90nm SP / FSG 800Mb/s DLL
130nm HS / FSG 533Mb/s DLL
DLL ＊ ＊
130nm HS / FSG 400Mb/s DLL 130nm HS / FSG Wide Range DLL
0.15µm 1.5V 400Mb/s DLL
PWM 0.18µm GII > 50mA PWM ＊
＊
130nm HS > 50mA PWM 90nm SP PWM
RC-OSC 0.18µm GII RC-OSC 130nm RC-OSC ＊
90nm SP / FSG RC-OSC
＊
0.18µm GII VDT 130nm HS VDT 90nm VDT
VDT
2004-07 10 2005-01 4 7 10 2006-01 4 2006-07 10 2007-01
Note: The right edge of each block
＊
Legend Description：HS： High Speed
denotes the IP’s formal release date. For
SP ： Standard Performance
more details, please visit our website at:
www. faraday-tech. com 31

32. Analog Data Conversion &
Serial Link IP Roadmaps
130nm 10-bit 80MHz ADC
130nm 8-bit 125MHz ADC
90nm
0.25µm 6-bit 44MHz
130nm
ADC 0.18µm 10-bit 80MHz ADC
0.15µm
130nm 12-bit 100MSPS DAC
DAC 0.18µm 8-bit 44MSPS DAC 0.18µm
0.25µm
0.25µm 10-bit 150MSPS
3-channel DAC
3-channel 0.35µm
0.18µm 10-bit 150MSPS 3-channel DAC
DAC
130nm 10-bit 150MSPS 3-chanel DAC
0.25µm 16-bit 0.25µm 18-bit
Sigma-Delta
Audio Codec Audio Codec
Codec
0.18µm 16-bit Audio Codec
130nm 16-bit Audio Codec
0.35µm RSDS
RSDS TX 0.25µm RSDS
130nm LVDS
0.18µm LVDS
LVDS 0.35µm LVDS 0.25µm LVDS 0.18µm 1.8V
0.25µm mini
TX / RX
LVDS
LVDS
10 2007-01
2004-07 10 2005-01 4 7 2006-01 4 7 10 7
10
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
32

33. USB IP Roadmap
90nm
130nm
0.15µm
USB 2.0 Host PIE
FPGA USB2.0 Host PIE 0.18µm
FUSBH200
0.25µm
FPGA USB2.0 2-port
Host PIE FUSBH210 0.35µm
USB 2.0 OTG PIE FPGA USB2.0 OTG PIE
FPGA
FOTG200
USB2.0
130nm USB 2.0 2-port PHY
2-port PHY
USB 2.0 0.18µm USB 2.0 Device PHY v36
Device PHY
0.25µm USB2.0 90nm USB 2.0 OTG PHY
USB 2.0 OTG PHY
OTG PHY
＊
130nm USB2.0 OTG PHY SP
130nm USB2.0 OTG
＊
PHY HS
2004-7 10 2005-01 4 7 10 2006-01 4 7 10
Note: The right edge of each block
＊
Legend Description： HS：High Speed
denotes the IP’s formal release date. For
SP：Standard Performance
more details, please visit our website at:
33
www. faraday-tech. com

34. Serial-ATA IP Roadmap
90nm
130nm
0.15µm
0.18µm
Serial-ATA 130nm 3Gbps SATA PHY
PHY
0.25µm
130nm Multi-Port SATA PHY 0.35µm
FPGA
Serial-ATA FPGA Serial-ATA Controller
With AHB I/F
Controller
2004-7 10 2005-01 4 7 10 2006-01 4 7 10
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
34

35. PCI Express IP Roadmap
90nm
130nm
PCI Express
PHY 0.18µm Single lane PHY x 1 lane 0.15µm
0.18µm
0.25µm
130nm Single-lane PHY x 1 lane
0.35µm
FPGA
130nm Multi-lane PHY x 4 lane
FPGA PCI-Express Controller
PCI Express
End-point (PIPE)
Controller
2004-7 10 2005-01 4 7 10 2006-01 4 7 10
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
35

36. Ethernet Roadmap
90nm
0.25µm
130nm
10/100
10/100 Ethernet PHY
0.15µm
Ethernet
PHY 0.18µm 10/100 4- port
0.18µm
Ethernet PHY
0.25µm
＊
130nm HS 10/100 Ethernet PHY
0.35µm
2004-7 10 2005-01 4 7 10 2006-01 4 7 10
＊
Note: The right edge of each block
Legend Description：HS：High Speed
denotes the IP’s formal release date. For
more details, please visit our website at:
www. faraday-tech. com
36

37. Digital IP Roadmap
Wireless LAN 802.11a / b / g
MAC / BBP
Communication
10 / 100 MAC Gigabit MAC
DES / 3DES Security Engine
Multimedia
MPEG4 Encoder / Decoder
TV Encoder
LCD Controller
Peripheral
MS Pro Card Controller
DDRII Controller
DDRI Controller
4 7 10 2004-01 4 7 10 2005-01
2003-01
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
37

38. Faraday CPU Roadmap
90nm
Clock (MHz)
130nm
＊
800 0.15µm
90nm HS FA626
0.18µm
0.25µm
500 0.35µm
＊
130nm HS FA626
FPGA
400
＊
300 130nm LL FA526L
＊
130nm HS FA526 HS
130nm FA501
0.18µm FA526
200
0.18µm FA510
2004-7 10 2005-01 4 7 10 2006-01 4 7 10
Note: Left and right edges indicate Tape
＊ Legend Description：HS：High Speed
out and Silicon proven schedule
LL：Low Leakage
respectively. For more details please visit
our website at: www. faraday-tech. com
38

39. Faraday StarCell™ IP
Faraday provides a comprehensive portfolio of Peripheral IPs , as the
following list ,which are available right now：
 CF Host Controller
 DMA Controller
 Memory Stick Host Controller
 Static Memory Controller
 GPIO
 SDRAM Controller
 10 / 100M Ethernet MAC / PHY
 UART
 PCI 33 / 66
 Timer
 USB 1.1 Device Controller / PHY
 Watchdog Timer
 USB 2.0 Device Controller / PHY
 Real Time Clock
 Smart Media Host Controller
 Interrupt Controller
 USB 1.1 FS / LS OTG
 SD Host Controller
 DDR Memory Controller
 KBD / Mouse Controller
 LCD Controller
 Synchronous Serial Port
 TV Encoder
 Fast IrDA Controller
39

40. DSP Roadmap
90nm
130nm Fusion 130nm Fusion 130nm
130nm
FD216 FD230-24
0.15µm
0.18µm
0.25µm
0.35µm
FPGA
0.18µm
0.18µm FD216_HA0A
Hardcore
(w/ mailbox)
0.18µm
Co-Processor
0.25µm
FD216_H90A
Hardcore
10
2004-7 2006-01 4 7 10 2007-01
10 7
2005-01 4
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
40

41. Networking Platform Roadmap
NetComposer-II:
• 600MHz 32-bit CPU
(FA626, 130nm, 1.08V, 125°C)
• 8 Programmable Serdes
NetComposer-I:
• GMAC (*2)
• 500MHz 32-bit CPU
• Switch Fabric
(FA626, 130nm, 1.08V, 125°C)
• Coherence Engine
• GMAC (*2)
• MPCA (Customer Engine)
• Switch Fabric
• PCI-X 133MHz
• Coherence Engine
• DDR-400 Controller with ECC
• MPCA (Customer Engine)
• PCI-X 133MHz
Net-
• DDR-333 Controller
Composer-II
(NC-II)
Net-
Composer-I
(NC-I)
Q4
Q4 Q3
Q2
Q1
2004 2006
2005
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
41

42. Multimedia Platform Roadmap
FIE8200:
• FA526 Cache 16K/16K
• MPEG4 Codec CIF~D1 @ 30fps
• JPEG standard Codec
• ISP, 2D/3D Graphic Engine
FIE8150:
• 300K MPCA (Metal Programmable
• FA526 Cache 16K/16K Cell Array)
• MPEG4 Codec CIF~D1 @ 30fps
• JPEG standard Codec
FIE8200
• TFT LCD, PCI, USB 2.0 OTG, IDE
• 10/100 Ethernet
FIE8100:
• WLAN802.11a/b/g
• FA526 Cache 16K/16K
• 300K MPCA (Metal Programmable
• MPEG4 Codec CIF~D1 @ 36fps
Cell Array)
• JPEG standard Codec
• USB 2.0 Device
• TFT LCD controller FIE8150
• TV encoder
FIE8100
Q3 Q4
Q3 Q4 Q2
Q1
2005
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
42

43. IA Platform Roadmap
UWB Wireless FIE7200
USB
• 0.13µm process
• UWB MAC+BBP+RF
FIE7110
Ultra Low Power
WLAN + Wi-Fi Phone FIE7100
Wi-Fi Phone
VoIP
• 0.13µm process
• 0.18µm process • FA501, USB OTG
• FA526, FD230-16 • WLAN 802.11g,
• WLAN 802.11g, • Audio/Video Codec,
• LCD controller • LCD controller, TV encoder
USB OTG
Ultra Low Power
FIE7000 FIE7010
PAP PAP
• 0.13µm process
• 0.18µm process
• FA501, USB OTG
• FA526, USB OTG
• 20-bit Audio DAC,
• Audio Codec,
• LCD controller,
• LCD controller,
• TV encoder, IDE/CFII
• IDE/CFII
Q4 Q1
Q3
Q2
Q1
2005 2006
Note: The right edge of each block denotes the IP’s formal release date. For more details, please
visit our website at: www.faraday-tech.com
43

44. Structured ASIC Family Roadmap
＊
＊ ＊ ＊
＊
90nm SP-Hvt MPCA Library 90nm LL-Hvt MPCA Library
90nm 90nm
130nm
＊
＊
＊ ＊
＊ ＊
90nm SP-Hvt MPIO 90nm LL-Hvt MPIO
0.15µm
130nm 130nm
＊ ＊ ＊ ＊
HS MPCA HS MPIO
0.18µm
130nm 130nm
130nm
130nm TEMPLATE MP-Ware
＊
＊
＊ LL MPIO 0.35µm
LL MPCA
130nm ＊
130nm
FPGA
130nm TEMPLATE Producer II
＊
＊
SP MPIO
SP MPCA
130nm TEMPLATE FIT9800
130nm TEMPLATE FIT9700
130nm TEMPLATE FIT9500 130nm TEMPLATE FIT9600
0.15µm
0.15µm
0.15µm ＊
＊
＊ ＊
SP MPIO
SP MPCA
0.18µm ＊ 0.18µm
0.18µm ＊
＊
GII MPCA LL MPCA
0.18µm ＊
GII MPIO
＊
0.25/0.22µm MPIO
2004-07 10 2005-01 4 7 10 2006-01 4 7 10 2007-01
Note: The right edge of each block
＊ Legend Description: Hvt： High Threshold Voltage
denotes the IP’s formal release date. For
SP ： Standard Performance
more details, please visit our website at:
LL ：Low Leakage
www.faraday-tech.com
MPCA：Metal Programmable Cell Array
MPIO：Metal Programmable IO
44
HS：High Speed

45. Welcome to join Faraday
45