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計算機結構
( 習題: Nand2tetris 硬體部分 )
陳鍾誠
2017 年 9 月 2 日
本文衍生自維基百科
Chapter 0–Background
● Digital Logic
● Hardware Description Language
Digital Logic
Truth Table
Logic Expression
Gates
Composite Gates
HDL
(Hardware Description Language)
http://nand2tetris.org/chapters/appendix%20A.pdf
HDL
Hardware Simulator
NAND Gate
Karnaugh map (1)
https://zh.wikipedia.org/wiki/%E5%8D%A1%E8%AF%BA%E5%9B%BE
Karnaugh map (2)
https://en.wikipedia.org/wiki/Karnaugh_map
Karnaugh map (3)
https://zh.wikipedia.org/wiki/%E5%8D%A1%E8%AF%BA%E5%9B%BE
Exercise (1)
https://en.wikipedia.org/wiki/Seven-segment_display
Exercise (2)
Exercise (3)
Chapter 1 - Boolean Logic
Project 1: Elementary Logic Gates
Not
And
Or
Xor (1)
Xor (2)
Xor (3)
Mux (1)
Mux (2)
MUX (3)
MUX Chip
https://zh.wikipedia.org/wiki/7400%E7%B3%BB%E5%88%97IC%E5%88%97%E8%A1%A8
DMUX (1)
DMUX (2)
DMUX (3)
Not16
And16
Or16
Mux16
Or8Way
Mux4Way (1)
Mux4Way (2)
Mux4Way16
...
Mux8Way
Mux8Way16
...
DMux4Way (1)
DMux4Way (2)
DMux8Way
DMUX Chip
Chapter 2 - Boolean Arithmetic
Project 2: Combinational Chips
Binary Addition
2's complement
Half Adder (1)
Half Adder (2)
Full Adder (1)
Full Adder (2)
Add16 (1)
Add16 (2)
Inc16
●Inc16 = Add16(in, 1)
ALU (1)
ALU (2)
ALU
● without handling of status outputs
ALU● complete
Chapter 3 - Sequential Logic
Project 3: Sequential Chips
DFF : D Flip-Flop
Bit ?
Bit
Register
RAM
RAM8
RAM64
RAM512 、 RAM4K 、 RAM16k ...
● Just the same way ...
PC (Program Counter)
PC (2)
PC (3)
Chapter 4 - Machine Language
Project 4: Machine Language Programming
Assembly (1)
Assembly (2)
Assembly (3)
Assembly (4)
Mult.asm
Assembly (I/O)
●Membory-Mapped I/O
Memory (mapped to device)
Fill.asm
Chapter 5 - Computer Architecture
Project 5: Computer Architecture
Von Neumann Architecture
Harvard architecture
Memory (1)
Memory (2)
Memory (3)
CPU (1)
CPU (2)
CPU (3)
CPU (4)
CPU (4)
Computer (1)
Computer (2)
Computer (3)
Computer (4)
It's your turn
●Do it yourself
●You can make it !
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計算機結構 (習題:Nand2tetris硬體部分)

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計算機結構 (習題:Nand2tetris硬體部分)

  1. 1. 計算機結構 ( 習題: Nand2tetris 硬體部分 ) 陳鍾誠 2017 年 9 月 2 日 本文衍生自維基百科
  2. 2. Chapter 0–Background ● Digital Logic ● Hardware Description Language
  3. 3. Digital Logic
  4. 4. Truth Table
  5. 5. Logic Expression
  6. 6. Gates
  7. 7. Composite Gates
  8. 8. HDL (Hardware Description Language) http://nand2tetris.org/chapters/appendix%20A.pdf
  9. 9. HDL
  10. 10. Hardware Simulator
  11. 11. NAND Gate
  12. 12. Karnaugh map (1) https://zh.wikipedia.org/wiki/%E5%8D%A1%E8%AF%BA%E5%9B%BE
  13. 13. Karnaugh map (2) https://en.wikipedia.org/wiki/Karnaugh_map
  14. 14. Karnaugh map (3) https://zh.wikipedia.org/wiki/%E5%8D%A1%E8%AF%BA%E5%9B%BE
  15. 15. Exercise (1) https://en.wikipedia.org/wiki/Seven-segment_display
  16. 16. Exercise (2)
  17. 17. Exercise (3)
  18. 18. Chapter 1 - Boolean Logic
  19. 19. Project 1: Elementary Logic Gates
  20. 20. Not
  21. 21. And
  22. 22. Or
  23. 23. Xor (1)
  24. 24. Xor (2)
  25. 25. Xor (3)
  26. 26. Mux (1)
  27. 27. Mux (2)
  28. 28. MUX (3)
  29. 29. MUX Chip https://zh.wikipedia.org/wiki/7400%E7%B3%BB%E5%88%97IC%E5%88%97%E8%A1%A8
  30. 30. DMUX (1)
  31. 31. DMUX (2)
  32. 32. DMUX (3)
  33. 33. Not16
  34. 34. And16
  35. 35. Or16
  36. 36. Mux16
  37. 37. Or8Way
  38. 38. Mux4Way (1)
  39. 39. Mux4Way (2)
  40. 40. Mux4Way16 ...
  41. 41. Mux8Way
  42. 42. Mux8Way16 ...
  43. 43. DMux4Way (1)
  44. 44. DMux4Way (2)
  45. 45. DMux8Way
  46. 46. DMUX Chip
  47. 47. Chapter 2 - Boolean Arithmetic
  48. 48. Project 2: Combinational Chips
  49. 49. Binary Addition
  50. 50. 2's complement
  51. 51. Half Adder (1)
  52. 52. Half Adder (2)
  53. 53. Full Adder (1)
  54. 54. Full Adder (2)
  55. 55. Add16 (1)
  56. 56. Add16 (2)
  57. 57. Inc16 ●Inc16 = Add16(in, 1)
  58. 58. ALU (1)
  59. 59. ALU (2)
  60. 60. ALU ● without handling of status outputs
  61. 61. ALU● complete
  62. 62. Chapter 3 - Sequential Logic
  63. 63. Project 3: Sequential Chips
  64. 64. DFF : D Flip-Flop
  65. 65. Bit ?
  66. 66. Bit
  67. 67. Register
  68. 68. RAM
  69. 69. RAM8
  70. 70. RAM64
  71. 71. RAM512 、 RAM4K 、 RAM16k ... ● Just the same way ...
  72. 72. PC (Program Counter)
  73. 73. PC (2)
  74. 74. PC (3)
  75. 75. Chapter 4 - Machine Language
  76. 76. Project 4: Machine Language Programming
  77. 77. Assembly (1)
  78. 78. Assembly (2)
  79. 79. Assembly (3)
  80. 80. Assembly (4)
  81. 81. Mult.asm
  82. 82. Assembly (I/O) ●Membory-Mapped I/O
  83. 83. Memory (mapped to device)
  84. 84. Fill.asm
  85. 85. Chapter 5 - Computer Architecture
  86. 86. Project 5: Computer Architecture
  87. 87. Von Neumann Architecture
  88. 88. Harvard architecture
  89. 89. Memory (1)
  90. 90. Memory (2)
  91. 91. Memory (3)
  92. 92. CPU (1)
  93. 93. CPU (2)
  94. 94. CPU (3)
  95. 95. CPU (4)
  96. 96. CPU (4)
  97. 97. Computer (1)
  98. 98. Computer (2)
  99. 99. Computer (3)
  100. 100. Computer (4)
  101. 101. It's your turn ●Do it yourself ●You can make it !

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