A series of questions are asked regarding logic gates and cascaded inverters: 1) If a HIGH is applied to point A in a figure of cascaded inverters, the logic levels at points B through F would be LOW, HIGH, LOW, HIGH, LOW, respectively. 2) Applying a waveform to point A would result in inverted waveforms at subsequent points B through F. 3) The rectangular symbol for a 4-input AND gate is requested to be drawn.