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Introduction to Embedded System

this presentation provides a very good information about Embedded and Computer Architecture
Written By Eng: Zakriua Gomma

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Introduction to Embedded System

  1. 1. By: Zakriua Gomma Email: zakriua.gomma37@gmail.com Introduction to Embedded System
  2. 2. What is an Embedded System?  Embedded : means hidden inside so one can’t see it .  System : means multiple components interfaced together for do special purpose .  Embedded System : is a special-purpose computer system designed to perform certain dedicated functions.  Functionalities : are done by dedicated HW and SW with limited resources.  On average, a person interacts with 100s of embedded systems on daily basis.
  3. 3. What is an Embedded System?
  4. 4. Embedded Systems - Examples • Any PC Mouse, Keyboard, or USB Device. • Microcontroller: 8-bit.
  5. 5. Embedded Systems - Examples • Any Disk Drive has an embedded Microcontroller • Any Printer has an embedded Microcontroller
  6. 6. Embedded Systems - Examples • Product: Creative Labs Zen Vision:MVideo & MP3 Player. • Microcontroller: TI TMS320 DSP. • Canon EOS 30D Digital Camera. • DIGIC II Image Processor.
  7. 7. Embedded Systems - Examples • NASA's Twin Mars Rovers. • Microprocessor: Radiation Hardened 20MHz PowerPC From IBM • Commercial Real-time OS. • Software and OS was developed during multi-year flight to Mars and downloaded using a radio link.
  8. 8. Embedded Systems - Examples • Agilent Oscilloscope. • Microprocessor: X86. • OS: Windows XP. • Product: Atronic Slot Machine. • Microprocessor: X86. • OS: Windows CE.
  9. 9. Embedded Systems - Examples • Sphero BB-8 • ARM Cortex-M4 core 32bit From ST
  10. 10. Embedded Systems - Examples Sphero BB-8 From inside
  11. 11. Embedded Systems - Examples • Sony Aiborobotic dog. • Microprocessor: 64-bits MIPS RISC.
  12. 12. Embedded Systems - Examples • BMW 745i • Windows CE OS. • 53 8-bit µP. • 11 32-bit µP. • 7 16-bit µP. • Multiple Networks.
  13. 13. Embedded Systems - Examples
  14. 14. Embedded Systems Applications
  15. 15. Computer Hardware Microprocessor A Large Memory: (Primary & Secondary) (Ram ,Rom ,Cache) Input Units: (Mouse, Keyboard ,Scanner ,etc.) Output Units: (Monitor ,Printer ,etc.) I/O Units: (FAX ,Ethernet,etc.) Storage Units: (Hard disk.)
  16. 16. Computer Hardware
  17. 17. Computer Hardware
  18. 18. Embedded System Hardware Microcontroller which contain : Processor, Timers, Interrupt controller, I/O Devices, Memories, Ports, etc. All on Single Chip Or System On Chip (SOC).
  19. 19. Embedded System Hardware
  20. 20. MicrocontrollerMicroprocessor Slower clock speedHigher Clock speed CPU,RAM, ROM, I/O and timer are all on a single chip CPU is stand-alone, RAM, ROM, I/O, timer are separate Fix amount of on-chip ROM, RAM, I/O ports Designer can decide on the amount of ROM, RAM and I/O ports CheapExpansive Single-purposeGeneral-purpose Low Access time for memoryHigh Access time for memory Low powerVery High power
  21. 21. CPU Architectures 1) Princeton Architecture (Von Neumann Architecture) : Between 1945 & 1951 John von Neumann set down the structure, layout, interaction, cooperation, realization , implementation, functionality and activity for the whole computer as a system. The Von Neumann Architecture is characterized by: -  A memory, arithmetical-logical unit (ALU), control unit, input and output device…. etc.  All parts of a computer are connected together by Bus.  Memory and Devices are controlled by CPU .  Data can pass through bus in half duplex mode to and from CPU.  Memory is split to small cells with the same size. Their ordinal numbers are called address numbers.  Each time CPU fetches a program instruction it may have to perform one or more read/write operation “instruction” from/to data memory space. It must wait until these subsequent “instruction“ are complete before it can fetch and decode the next program instruction.
  22. 22. CPU Architectures Princeton Architecture (Von Neumann Architecture) :
  23. 23. CPU Architectures Princeton Architecture (Von Neumann Architecture) :
  24. 24. CPU Architectures Princeton Architecture (Von Neumann Architecture) :
  25. 25. CPU Architectures 2) Harvard Architecture: The Harvard Mark II was finished at Harvard University in 1947 . It wasn’t so modern as the computer from von Neumann team. But it introduced a slightly different architecture. Memory for data was separated from the memory for instruction. This concept is known as the Harvard Architecture :  There is no need to make the two memories share characteristics. In particular, the word width, timing, implementation technology, and memory address structure can differ.  The CPU can read an instruction and perform a data memory access at the same time..  This speeds up execution time but increases the cost of more hardware complexity.  If, for instance, every instruction run in the CPU requires an access to memory, the computer gains nothing for increased CPU speed—a problem referred to as being "memory bound".
  26. 26. CPU Architectures Harvard Architecture:
  27. 27. Von NeumannHarvard Used in conventional processo rs found in PCs and Servers, and embedded systems with only control functions. Used in DSPs and other processors found in latest embedded systems and Mobile communication systems, audio, speech, image processing systems One bus is simpler for the control unit design Control unit for two buses is more complicated and more expensive The code is executed serially and takes more clock cycles The code is executed in parallel Avg computation speed is lowAvg computation speed is high
  28. 28. CPU Architectures For Processors : Von Neumann is used in Processors because, unlike MCUs, processors don’t have internal memory or peripherals and the connection to memory is through external bus and Von Neumann is suitable because:  Cost: less buses means less cost.  Space: we don’t need to waste large space of motherboard.  Processors mainly deal with only one memory, RAM which holds the data and instructions, so only one bus will be suitable and the slow access will be substituted by the high speed of the processor and using the cash memory. For Microcontroller : Harvard architecture is used in MCU because:  Microcontroller contains everything on the chip. RAM, flash, and peripherals and due to the small size using multiple buses is not an issue.  Microcontroller speed is not high so multiple buses will help with the limited speed of MCU. Which is the best ?
  29. 29. CPU Structure The basic elements of the CPU are: • ALU  Arithmetic & Logic Unit  Responsible for performing logic and arithmetic calculations. • Floating-Point Unit (FPU)  performs arithmetic operations on floating point numbers. • Registers  Registers are used to store data beside the ALU  Registers are used to transfer data to/from memory  Registers carry the inputs of ALU, as well as, receiving the output of the ALU. • Internal CPU Bus  It is a special bus.  It is responsible for transferring data between registers, ALU, and system memory • Control Unit  It is responsible for organizing the actions of the CPU  It can be thought of as the heart of the CPU
  30. 30. CPU Structure Arithmetic logic unit : • ALU is a digital circuit that performs :  Arithmetic operations : o Add, Sub,….etc.  Logical operations : o And, Or, Not,…etc. • Operates and stores results in general registers • Stores operation status in flag/status registers  Carry occurrence, overflow occurrence
  31. 31. CPU Structure FPU ( Floating-Point Unit): • The FPU performs arithmetic operations on floating point numbers. • An FPU is complicated to design, although the IEEE 754 standard helps to answer some of the specific questions about implementation • 8086 : First computer to implement IEEE FP • Three types of the Floating-Point Data :  The half-precision floating-point format (16-bit data)  The single-precision floating-point format (32-bit data)  The double-precision floating-point format (64-bit data)
  32. 32. CPU Structure IEEE Floating Point Standard 754 (FPS) 1. Half precision :  16-bits – 10-bit mantissa – 5-bit exponent – 1-bit sign 2. Single precision :  32-bits – 23-bit mantissa – 8-bit exponent – 1-bit sign 3. Double precision :  64-bits – 52-bit mantissa – 11-bit exponent – 1-bit sign 31 30 23 22 0 S Exponent Mantissa (bits 0-22) 63 62 52 51 0 S Exponent Mantissa (bits 0-51) 15 14 10 9 0 S Exponent Mantissa (bits 0-22)
  33. 33. Pipeline : • Continuous and parallel streaming of instruction to the CPU. • A method of achieving higher execution speed at same clock speed.
  34. 34. Pipeline :
  35. 35. Pipeline :
  36. 36. Pipeline :
  37. 37. Pipeline :
  38. 38. Pipeline With a Branch Penalty :
  39. 39. Super Pipeline :
  40. 40. Superscalar vs. Super pipeline • Simple pipeline system performs only one pipeline stage per clock cycle • Super pipelined system is capable of performing two pipeline stages per clock cycle • Superscalar performs only one pipeline stage per clock cycle in each parallel pipeline
  41. 41. MIPS: • The number of machine code instructions a computer can process while executing a "standard" program is measured in MIPS (Million Instructions Per Second). Specifically • MIPS is a method of measuring the raw speed of a computer's processor and is defined as the number of machine instructions (in millions) that a processor can execute in one second. • 𝑀𝐼𝑃𝑆 = 𝑃𝑟𝑜𝑐𝑒𝑠𝑠𝑜𝑟 𝐶𝑙𝑜𝑐𝑘 𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 (𝑀𝐶𝐿𝐾) 𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝐶𝑦𝑐𝑙𝑒𝑠 𝑝𝑒𝑟 𝐼𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛 (𝐶𝑃𝐼) ∗ 1,000,000 = 𝑐𝑦𝑐𝑙𝑒𝑠 / 𝑠𝑒𝑐𝑜𝑛𝑑 𝑐𝑦𝑐𝑙𝑒𝑠 / 𝑖𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛 = 𝑚𝑖𝑙𝑙𝑖𝑜𝑛 𝑖𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛𝑠 𝑠𝑒𝑐𝑜𝑛𝑑
  42. 42. MIPS: ClockMIPSProcessor 5 MHz.33Intel 8086 12.5 MHz12.5Analog Devices ADSP -2100 20 MHz5Microchip PIC16F 600 MHz2.054Intel Pentium III 1.2 GHz3,561AMD Athlon 500 MHz28,293,540NEC Earth Simulator ( 5120 cores) 100 MHz125ARM Cortex-M3 1 GHz2,100Qualcomm Scorpion (Cortex A8) 1.2 GHz4,744Raspberry Pi 2 3 GHz238,310Intel Core i7 5960X 3.2 GHz9,726Pentium 4 Extreme Edition
  43. 43. MIPS:
  44. 44. Instruction set architecture (ISA)  The computer ISA defines all of the programmer-visible components and operations of the computer  memory organization  address space -- how may locations can be addressed?  addressability -- how many bits per location?  register set  how many? what size? how are they used?  instruction set  opcodes  data types  addressing modes  ISA provides all information needed for someone that wants to write a program in machine language (or translate from a high-level language to machine language).
  45. 45. CISC & RISC RISCCISC Reduced Instruction set ComputerComplex Instruction Set Computer Less no of instructionsMore no of instructions Programming is difficultProgramming is easy PIC,AVR, ARM8085,8086,Pentium Only LOAD/STORE refer memoryAny instructions may refer memory Highly pipelinedNot pipelined or less pipelined large code sizesSmall code sizes Instructions execute in one clock cycle. Instructions generally take more than 1 clock to execute. Simple in DesignComplex in Design
  46. 46. Memory Unit: • Memory is a part of the Any Computer System used for data storage. • Types of Memory :  Volatile Memory .  Non Volatile Memory .
  47. 47. Memory Unit: Volatile memory : RAM memory (Random Access Memory) : • Refers to the ability to access any memory cell directly. RAM is much faster than ROM . It used to write and read data values while program running . • Volatile : if you remove the power supply its contents are lost. • Any variable used in a program is allocated into RAM. • local variables, pointers, functions, recursive functions results in using large amounts of RAM • Types Of RAM :  Dynamic RAM (DRAM)  Static RAM (SRAM)
  48. 48. Memory Unit: Static RAM Dynamic RAM
  49. 49. Dynamic RAM (DRAM)Static RAM (SRAM) Made From capacitorsMade From flip-flops. Low cost (per bit)High cost (per bit) Low using powerHigh using power SlowFast Used in main memoryUsed in cache Memory Low in SizeLarge In size Automatically discharges after sometime, need refreshing Will retain state forever
  50. 50. Memory Unit:
  51. 51. Memory Unit:
  52. 52. Memory Unit: Small amount of memory that is faster than RAM Slower than registers Built using SRAM Range from few KB to few MB Use by CPU to store frequently used instructions & data Spatial & temporal locality Use multiple levels of cache L1 Cache – Very fast, usually within CPU itself L2 Cache – Slower than L1, but faster than RAM Today there’s even L3 Cache Cache Memory
  53. 53. Memory Unit: L1 & L2 Cache
  54. 54. Memory Unit: Cache Read Operations
  55. 55. Memory Unit: Caching in Multi-Core Systems
  56. 56. Memory Unit: Caching in Multi-Core Systems (Cont.)
  57. 57. Memory Unit: Core i7 Die & Major Components
  58. 58. Memory Unit: Non-Volatile memory : • ROM(Read Only Memory):  Permanent memory(Non-Volatile memory).  Used as Program Memory in Micro-Controller.  ROM generally slower than RAM.  The size of program that can be written depends on  Written upon programming the microcontroller.  Can't be written/modified at run time. • ROM Types:  Masked ROM .  OTP ROM .  UV EPROM .  EEPROM .  Flash EEPROM .
  59. 59. Memory Unit: 1-Masked ROM (MPROM) : -Programmed by the manufacturer. -The term ‘masked’comes from the manufacturing process. -In case of a large-scale production, the price is very low.
  60. 60. Memory Unit: 2-OTP (One Time Programmable): - Also called programmable ROM(PROM). - Enables programmer to download a program into it one time only. - Used when the firmware is stable and the product is shipping in bulk to customers. - If an error is detected after downloading, the only thing you can do is to download the correct program to another chip.
  61. 61. Memory Unit: 3- UV EPROM (UV Erasable Programmable ROM) - It enables data to be erased under strong ultraviolet light - After a few minutes it is possible to download a new pro gram - the package of this microcontroller has recognizable“”wi ndow””on the upper side. It enables surface of the silicon chip to be lit by an UV lamp, which has as a result that complete program cleared and a new program download enabled
  62. 62. Memory Unit: 4-EEPROM(Electrically Erasable Programmable ROM) - Can be erased by exposing it to an electrical charge. - The contents of this memory may be changed during run time (similar to RAM),but remains permanently saved even if the power supply is off (similar to ROM) - EEPROM is often used to read and store values , created during operation, which must be permanently saved. - Acts as peripheral of microcontroller. - Take more time in read/write access than RAM - The max number to Write/Erase Cycles is usually100,000 but in Read is infinity
  63. 63. Memory Unit: 5-Flash EEPROM - Invented in the 80s in the laboratories of Intel. - Represented as the successor to the EEPROM. - Flash is normally organized as sectors (256B - 16KB). - Large blocks of memory erased at once, rather than one word at a time like EEPROM , So FLASH is much faster th an EEPROM . Take more time in read/write access than RAM - The max number to Write/Erase Cycles is usually10,000 but in Read is infinity
  64. 64. Memory Unit: speedCost per bit Max Erase cycles Erase sizeWriteable ? Volatile ? Type FastExpensiveunlimitedByteYesYesSRAM ModerateModerateunlimitedByteYesYesDRAM FastInexpensi ve ----NONoMasked ROM FastModerate----OnceNoPROM FastModerateLimited(consult (datasheet Entire chipYesNoEPROM Fast to read slow to write ExpensiveLimited(consult (datasheet byteYesNoEEPROM Fast to read slow to write ModerateLimited(consult datasheet) sectorYesNoFLASH
  65. 65. Microcontrollers Selection Criteria:
  66. 66. Microcontrollers Selection Criteria: HC11(Motorola)PIC(Microchip)8051(Intel)AVR(Atmel) Von NeumannHarvardVon-NeumannHarvardArchitecture CISCRISCCISCRISCInstruction Type 8MHz20MHz24MHz20MHzMax speed 84121Cycle/Instruction 1MIPS5MIPS2MIPS20MIPSInstruction/second 20032215132N of Instructions 32KB64KB32KB256KBMax program size 8-bit14-bit8-bit16-bitData bus Width