コンセプトキット(84,000円)で簡単にPSpiceで位相余裕度シミュレーションが出来ます。ビー・テクノロジーにお問い合わせ下さい。 メールアドレス：info@bee-tech.com

1. Copyright (C) Bee Technologies Inc. 2011 1 PWM Buck Converter Average Model フィードバック制御におけるアベレージモデルを活用した位相余裕度のシミュレーションの活用方法を解説していきます。 2011年2月2日(水曜日) 株式会社ビー・テクノロジーhttp://www.bee-tech.com/horigome@bee-tech.com

2. お客様を徹底的にサポートする Copyright (C) Bee Technologies Inc. 2011 2 [第三の壁]シミュレーションが実機波形と合わない。ゼロから動かすのは物凄く工数がかかる。 [第二の壁] 自分がシミュレーションしたい電子部品のスパイスモデルが揃わない。 各回路方式のシミュレーションのテンプレートをご提供デザインキット シンプルキット [第一の壁] 回路解析シミュレータの導入 スパイス・パークデバイスモデリングサービスでサポート お客様の回路図を回路解析シミュレーションデータ一式でご提供

3. 事業の全体概要 Copyright (C) Bee Technologies Inc. 2011 3 [スパイスモデル]デバイスモデリングサービス(58種類のデバイスモデリング) スパイス・パーク www.spicepark.com シンプルモデル(NEW)←ブロックベースのスパイスモデル [デザインキット]回路方式のテンプレート コンセプトキット(NEW)←(概念設計のテンプレート) デザインキット(各回路方式のテンプレート) 回路解析シミュレータSpice 系回路解析シミュレータPSpice,LTspice,MultiSim,MicroCap,HSPICE,SmartSPICE,Simplorer, and so on

4. デバイスモデリングサービスお客様の必要なスパイスモデルをご提供致します Copyright (C) Bee Technologies Inc. 2011 4

5. スパイス・パーク Copyright (C) Bee Technologies Inc. 2011 5 http://www.spicepark.com メールアドレスとパスワードのご登録でご利用できます。グローバル版も順次公開中-> http://www.spicepark.net 3,593モデルをご提供(2011年1月31日現在)

6. コンセプトキット Copyright (C) Bee Technologies Inc. 2011 6

7. デザインキット(パッケージ商品) Copyright (C) Bee Technologies Inc. 2011 7 要望が多いインバータ回路方式を中心に20種類の新製品を開発中。

8. デザインキット(カスタムサービス) Copyright (C) Bee Technologies Inc. 2011 8 お客様の回路図を提供してもらいデバイスモデリング、シミュレーション技術を 付加して、シミュレーション一式をご提供する。お客様は、解析に専念出来る。 お客様が準備するものは回路図と材料表(BOM)です。

9. デバイスモデリング教材 Copyright (C) Bee Technologies Inc. 2011 9

10. 情報提供 Copyright (C) Bee Technologies Inc. 2011 10 http://beetech-icyk.blogspot.com/ http://www.bee-tech.com メールマガジンで情報配信 Bee Style: http://www.spicepark.com/ スパイス・パークのログイン後トップページにて、PDFでバックナンバーも含めPDF形式で参照及びダウンロード出来ます。 各種セミナー、ワークショップご参加下さい

11. Concept Kit:PWM Buck Converter Average Model Copyright (C) Bee Technologies Inc. 2011 11 発売予定日：2011年2月中旬、84,000円(税込み)

12. Contents Concept of Simulation Buck Converter Circuit Averaged Buck Switch Model Buck Regulator Design Workflow Setting PWM Controller’s Parameters. Programming Output Voltage: Rupper, Rlower Inductor Selection: L Capacitor Selection: C, ESR Stabilizing the Converter (Example) Load Transient Response Simulation (Example) Appendix Type 2 Compensation Calculation using Excel Feedback Loop Compensators Simulation Index Copyright (C) Bee Technologies Inc. 2011 12

14. C

15. ESR

17. VREFVOUT VREF Models:

18. Buck Converter Circuit Copyright (C) Bee Technologies Inc. 2011 14 Power Switches Filter & Load PWM Controller

22. Step2: Set C1=1kF, C2=1fF, (always keep the default value) and R2= calculated value (Rupper//Rlower) as the initial values.

23. Step3: Select a crossover frequency (about 10kHz or fc < fosc/4). Then complete the table.

24. Step4: Read the Gain and Phase value at the crossover frequency (10kHz) from the Bode plot, Then put the values to the table

25. Step5: Select the phase margin at the fc ( > 45 ). Then change the K value until it gives the satisfied phase margin, for this example K=6 is chosen for Phase margin = 46.

26. Remark: If K-factor fail to gives the satisfied phase margin, Increase the output capacitor C then try Step1 to Step5 again.5 Load Transient Response Simulation 6

27. Buck Regulator Design Workflow Copyright (C) Bee Technologies Inc. 2011 17 3 4 5 2 1

29. VP= (Error Amp. Gain  vFB ) / d

30. vFB = vFBH – vFBL

31. d = dMAX – dMIN

32. Error Amp. Gain is 100 (approximated) where VP is the sawtooth peak voltage. vFBH is maximum FB voltage where d = 0 vFBL is minimum FB voltage where d =1(100%) dMAX is maximum duty cycle, e.g. d = 0(0%) dMIN is minimum duty cycle, e.g. d =1(100%) Setting PWM Controller’s Parameters Copyright (C) Bee Technologies Inc. 2011 18 1 The PWM block is used to transfer the error voltage (between FB and REF) to be the duty cycle.  If vFBH and vFBLare not provided, the default value, VP=2.5 could be used.

33. Copyright (C) Bee Technologies Inc. 2011 19 Setting PWM Controller’s Parameters (Example) 1  If the VP ( sawtooth signal amplitude ) does not informed by the datasheet, It can be approximated from the characteristics below. from VP= (Error Amp. Gain  vFB )/d Error Amp. Gain = 100 (approximated) from the graph on the left, vFB= 25mV (15m - (-10m)) d = 1 – 0 = 1 VP ≈ ( 100  25mV )/1 ≈ 2.5V vFBH vFB = 25mV vFBL d = 1 (100%) dMIN dMAX LM2575: Feedback Voltage vs. Duty Cycle  If vFBH and vFBLare not provided, the default value, VP=2.5 could be used.

36. VI,max is input maximum voltage

37. RL,min is load resistance at the minimum output current ( IOUT,min )

38. fosc is switching frequency3

39. Inductor Selection: L (Example) Copyright (C) Bee Technologies Inc. 2011 22 Inductor Value from Given: VI,max = 40V, VOUT = 5V IOUT,min = 0.2A RL,min = (VOUT /IOUT,min ) = 25 fosc = 52kHz Then: LCCM 210(uH), L = 330(uH) is selected 3

41. Capacitor Selection: C, ESR (Example) Copyright (C) Bee Technologies Inc. 2011 24 Capacitor Value From and Given: VI, max = 40 V VOUT = 5 V L (H) = 330 Then: C 188 (F) In addition: ESR 100m 4

44. Copyright (C) Bee Technologies Inc. 2011 27 Stabilizing the Converter (Example) 5 The element of the Type 2 compensator ( R2, C1, and C2 ), that stabilize the converter, can be extracted by using Type 2 Compensator Calculator (Excel sheet) and open-loop simulation with the Average Switch Models (ac models). Step2 Set C1=1kF, C2=1fF, and R2=calculated value (Rupper//Rlower) as the initial values. Step1 Open the loop with LoL=1kH and CoL=1kF then inject an AC signal to generate Bode plot.  C1=1kF is AC shorted, and C2 1fF is AC opened (or Error-Amp without compensator).

45. Stabilizing the Converter (Example) Copyright (C) Bee Technologies Inc. 2011 28 5 Step3 Select a crossover frequency (about 10kHz or fc < fosc/4 ), for this example, 10kHz is selected. Then complete the table. values from 2 Calculated value of the Rupper//Rlower values from 1

46. Copyright (C) Bee Technologies Inc. 2011 29 Stabilizing the Converter (Example) 5 Gain: T(s) = H(s)GPWM Step4 Read the Gain and Phase value at the crossover frequency(10kHz) from the Bode plot, Then put the values to the table. Phase  atfc Tip: To bring cursor to the fc = 10kHz type “ sfxv(10k) ” in Search Command. Cursor Search

47. Stabilizing the Converter (Example) Copyright (C) Bee Technologies Inc. 2011 30 5 Step5 Select the phase margin at fc (> 45 ). Then change the K value (start from K=2) until it gives the satisfied phase margin, for this example K=6 is chosen for Phase margin = 46. As the result; R2, C1, and C2 are calculated. Remark: If K-factor fail to gives the satisfied phase margin, Increase the output capacitor C then try Step1 to Step5 again.  K Factor enable the circuit designer to choose a loop cross-over frequency and phase margin, and then determine the necessary component values to achieve these results. A very big K value (e.g. K > 100) acts like no compensator (C1 is shorted and C2 is opened).

48. Stabilizing the Converter (Example) Copyright (C) Bee Technologies Inc. 2011 31 5 The element of the Type 2 compensator ( R2, C1, and C2 ) extraction can be completed by Type 2 Compensator Calculator (Excel sheet) with the converter average models (ac models) and open-loop simulation. The calculated values of the type 2 elements are, R2=122.780k, C1=0.778nF, and C2=21.6pF. *Analysis directives: .AC DEC 100 0.1 10MEG

49. Copyright (C) Bee Technologies Inc. 2011 32 Stabilizing the Converter (Example) 5 Gain and Phase responses after stabilizing Gain: T(s) = H(s) G(s)GPWM Phase  atfc Phase margin = 45.930 at the cross-over frequency - fc = 9.778kHz. Tip: To bring cursor to the cross-over point (gain = 0dB) type “ sfle(0) ” in Search Command. Cursor Search

50. Load Transient Response Simulation (Example) Copyright (C) Bee Technologies Inc. 2011 33 The converter, that have been stabilized, are connected with step-load to perform load transient response simulation. 5V/2.5 = 0.2A step to 0.2+0.8=1.0A load *Analysis directives: .TRAN 0 20ms 0 1u

52. Copyright (C) Bee Technologies Inc. 2011 36 B. Feedback Loop Compensators Type1 Compensator Type2 Compensator Type2a Compensator Type2b Compensator Type3 Compensator