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PRESENTATION TOPIC : CHAPTER 6
Function of Combinational Logic
Submitted By…
Md Sefat Anam
ID: 173-0379-203,
Dept. of CSE , FST.
Submitted To…
Alea Afrin
Lecturer, Dept. of EEE,
Faculty of Science & Technology
Submitted Date…
04 August 2019
 Basic Overview of logic function
 Basic Adder
 Decoders
 Encoders
 Multiplexer
 Demultiplexer
 The AND gate
 The OR gate
 The NOT gate (or inverter)
 The NAND gate
 The NOR gate
 The Exclusive OR gate
 The Exclusive XNOR gate
 An adder is a digital logic circuit in electronics
that implements addition of numbers. Adders
are classified into two types: half adder and
full adder. The half adder circuit has two
inputs: A and B, which add two input digits
and generate a carry and sum. The full adder
circuit has three inputs: A and C, which add
the three input numbers and generate a carry
and sum. This Presentation gives brief
information about half adder and full adder in
tabular forms and circuit diagrams
10
 Half adder is a combinational logic circuit with two
inputs and two outputs. The half adder circuit is
designed to add two single bit binary number A and
B. It is the basic building block for addition of
two single bit numbers. This circuit has two
outputs carry and sum
11
Block Diagram
12
Half-Adder Logic Circuit
 Inputs: A and B
 Outputs: S (for sum) and C (for carry)
 The simplified Boolean functions for the two inputs can be
obtained directly from the truth table.
Truth-Table of Half-Adder
Sum = A XOR B
Carry = A AND B
 Full adder is developed to overcome the
drawback of Half Adder circuit. It can add two
one-bit numbers A and B, and carry c. The
full adder is a three input and two output
combinational circuit.
Block Diagram
 A full adder can be implemented with two
half adders and an OR gate
15
Logic circuit of Full-Adder
 A full adder is a combinational circuit that forms the arithmetic
sum of three input bits
◦ It consists of three inputs and two outputs.
16
Truth-Table of Full-Adder
 An Encoder is a combinational circuit that performs
the reverse operation of Decoder. It has maximum of
2n input lines and ‘n’ output lines. It will produce a
binary code equivalent to the input, which is active
High. Therefore, the encoder encodes 2n input lines
with ‘n’ bits. It is optional to represent the enable
signal in encoders.
17
18
Logic circuit of Encoder
Block Diagram of Encoder
19
Function
Truth Table of Encoder
20
 Decoder is a combinational circuit that has ‘n’
input lines and maximum of 2noutput lines.
One of these outputs will be active High based
on the combination of inputs present, when
the decoder is enabled. That means decoder
detects a particular code. The outputs of the
decoder are nothing but the min terms of ‘n’
input variables (lines), when it is enabled
21
Logic circuit of Decoder
Block Diagram of Decoder
22
Function
Truth-Table of Decoder
23
 Multiplexer is a combinational circuit that has
maximum of 2n data inputs, ‘n’ selection lines and
single output line. One of these data inputs will be
connected to the output based on the values of
selection lines.
 Since there are ‘n’ selection lines, there will be
2n possible combinations of zeros and ones. So,
each combination will select only one data input.
Multiplexer is also called as Mux.
24
Truth Table
Output Equation :
Block Diagram
 De-Multiplexer is a combinational circuit that
performs the reverse operation of Multiplexer. It has
single input, ‘n’ selection lines and maximum of
2noutputs. The input will be connected to one of
these outputs based on the values of selection lines.
 Since there are ‘n’ selection lines, there will be
2n possible combinations of zeros and ones. So,
each combination can select only one output. De-
Multiplexer is also called as De-Mux.
25
26
Function
Block Diagram
Truth Table
Have any question ?
CHAPTER 6: Function of Combination Logic From Flyod ( Digital Logic Design )

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CHAPTER 6: Function of Combination Logic From Flyod ( Digital Logic Design )

  • 1. PRESENTATION TOPIC : CHAPTER 6 Function of Combinational Logic Submitted By… Md Sefat Anam ID: 173-0379-203, Dept. of CSE , FST. Submitted To… Alea Afrin Lecturer, Dept. of EEE, Faculty of Science & Technology Submitted Date… 04 August 2019
  • 2.  Basic Overview of logic function  Basic Adder  Decoders  Encoders  Multiplexer  Demultiplexer
  • 3.  The AND gate
  • 4.  The OR gate
  • 5.  The NOT gate (or inverter)
  • 7.  The NOR gate
  • 9.  The Exclusive XNOR gate
  • 10.  An adder is a digital logic circuit in electronics that implements addition of numbers. Adders are classified into two types: half adder and full adder. The half adder circuit has two inputs: A and B, which add two input digits and generate a carry and sum. The full adder circuit has three inputs: A and C, which add the three input numbers and generate a carry and sum. This Presentation gives brief information about half adder and full adder in tabular forms and circuit diagrams 10
  • 11.  Half adder is a combinational logic circuit with two inputs and two outputs. The half adder circuit is designed to add two single bit binary number A and B. It is the basic building block for addition of two single bit numbers. This circuit has two outputs carry and sum 11 Block Diagram
  • 13.  Inputs: A and B  Outputs: S (for sum) and C (for carry)  The simplified Boolean functions for the two inputs can be obtained directly from the truth table. Truth-Table of Half-Adder Sum = A XOR B Carry = A AND B
  • 14.  Full adder is developed to overcome the drawback of Half Adder circuit. It can add two one-bit numbers A and B, and carry c. The full adder is a three input and two output combinational circuit. Block Diagram
  • 15.  A full adder can be implemented with two half adders and an OR gate 15 Logic circuit of Full-Adder
  • 16.  A full adder is a combinational circuit that forms the arithmetic sum of three input bits ◦ It consists of three inputs and two outputs. 16 Truth-Table of Full-Adder
  • 17.  An Encoder is a combinational circuit that performs the reverse operation of Decoder. It has maximum of 2n input lines and ‘n’ output lines. It will produce a binary code equivalent to the input, which is active High. Therefore, the encoder encodes 2n input lines with ‘n’ bits. It is optional to represent the enable signal in encoders. 17
  • 18. 18 Logic circuit of Encoder Block Diagram of Encoder
  • 20. 20  Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2noutput lines. One of these outputs will be active High based on the combination of inputs present, when the decoder is enabled. That means decoder detects a particular code. The outputs of the decoder are nothing but the min terms of ‘n’ input variables (lines), when it is enabled
  • 21. 21 Logic circuit of Decoder Block Diagram of Decoder
  • 23. 23  Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’ selection lines and single output line. One of these data inputs will be connected to the output based on the values of selection lines.  Since there are ‘n’ selection lines, there will be 2n possible combinations of zeros and ones. So, each combination will select only one data input. Multiplexer is also called as Mux.
  • 25.  De-Multiplexer is a combinational circuit that performs the reverse operation of Multiplexer. It has single input, ‘n’ selection lines and maximum of 2noutputs. The input will be connected to one of these outputs based on the values of selection lines.  Since there are ‘n’ selection lines, there will be 2n possible combinations of zeros and ones. So, each combination can select only one output. De- Multiplexer is also called as De-Mux. 25